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    • 4. 发明申请
    • MRAM embedded smart power integrated circuits
    • MRAM嵌入式智能电源集成电路
    • US20070002609A1
    • 2007-01-04
    • US11170874
    • 2005-06-30
    • Young ChungRobert BairdMark DurlamGregory GrynkewichEric Salter
    • Young ChungRobert BairdMark DurlamGregory GrynkewichEric Salter
    • G11C11/14
    • G11C11/1659H01F10/3254
    • An integrated circuit device includes a magnetic random access memory (“MRAM”) architecture and a smart power integrated circuit architecture formed on the same substrate using the same fabrication process technology. The fabrication process technology is a modular process having a front end process and a back end process. In the example embodiment, the smart power architecture includes a power circuit component, a digital logic component, and an analog control component formed by the front end process, and a sensor architecture formed by the back end process. The MRAM architecture includes an MRAM circuit component formed by the front end process and an MRAM cell array formed by the back end process. In one practical embodiment, the sensor architecture includes a sensor component that is formed from the same magnetic tunnel junction core material utilized by the MRAM cell array. The concurrent fabrication of the MRAM architecture and the smart power architecture facilitates an efficient and cost effective use of the physical space available over active circuit blocks of the substrate, resulting in three-dimensional integration.
    • 集成电路装置包括使用相同的制造工艺技术在同一衬底上形成的磁性随机存取存储器(“MRAM”)架构和智能电力集成电路架构。 制造工艺技术是具有前端工艺和后端工艺的模块化工艺。 在该示例性实施例中,智能功率架构包括由前端处理形成的电源电路部件,数字逻辑部件和模拟控制部件以及由后端处理形成的传感器架构。 MRAM架构包括由前端处理形成的MRAM电路部件和由后端处理形成的MRAM单元阵列。 在一个实际实施例中,传感器架构包括由MRAM单元阵列使用的相同的磁性隧道结芯体材料形成的传感器部件。 MRAM架构和智能电源架构的并行制造有助于在衬底的有源电路块上可用的物理空间的有效和成本有效的使用,导致三维集成。
    • 5. 发明申请
    • Antifuse element and electrically redundant antifuse array for controlled rupture location
    • 防腐元件和电气冗余反熔丝阵列,用于受控断裂位置
    • US20060226509A1
    • 2006-10-12
    • US11095302
    • 2005-03-31
    • Won MinRobert BairdJiang-Kai ZuoGordon Lee
    • Won MinRobert BairdJiang-Kai ZuoGordon Lee
    • H01L29/00
    • H01L23/5252H01L2924/0002H01L2924/00
    • An antifuse element (102) having end corners (120, 122) of a gate electrode (104) positioned directly above an active area (106) or bottom electrode. The minimum programming voltage between the gate electrode (104) and the active area (106) creates a current path through an insulating layer (110) positioned therebetween. The high electric field created at the end corners (120, 122) of the gate electrode (104) results in a breakdown and rupture of the insulating layer (110) at points directly beneath the end corners (120, 122). This localization of the insulating layer (110) at the corners (120,122) provides for lower post program resistance and variation, and faster programming at a lower programming power. The antifuse elements (102) when integrated into an array (300, 320, 400, 550) provide for increased packing density. The array is fabricated to include multiple active areas (304) for individual antifuse element (302) programming or a common active area (324,405,426,506) for multi-element programming.
    • 具有位于有源区域(106)或底部电极正上方的栅电极(104)的端角(120,122)的反熔断元件(102)。 栅电极(104)和有源区(106)之间的最小编程电压产生通过位于它们之间的绝缘层(110)的电流路径。 在栅电极(104)的端角(120,122)处产生的高电场导致在端角(120,122)正下方的绝缘层(110)的破裂和破裂。 绝缘层(110)在拐角(120,122)处的定位提供较低的后编程电阻和变化,并且以较低的编程功率进行更快的编程。 当反熔丝元件(102)集成到阵列(300,320,400,550)中时,提供了增加的堆积密度。 阵列被制造为包括用于单个反熔丝元件(302)编程的多个有效区域(304)或用于多元件编程的公共有效区域(324,405,426,506)。
    • 9. 发明授权
    • System and method for maintaining write order fidelity in a distributed environment
    • 在分布式环境中维护写命令保真度的系统和方法
    • US07565498B1
    • 2009-07-21
    • US11268116
    • 2005-11-07
    • Robert BairdAnand A. Kekre
    • Robert BairdAnand A. Kekre
    • G06F13/00
    • G06F3/0659G06F3/061G06F3/067G06F11/2058
    • Various systems and methods for maintaining write order fidelity in a distributed environment are disclosed. One method, which can be performed by each node in a cluster, involves associating a current sequence number with each of several write operations included in a set of independent write operations. In response to detecting that one of the write operations in the set is ready to complete, a new sequence number is selected, and that new sequence number is thereafter used as the current sequence number. None of write operations in the set is allowed to return to the application that initiated the write operations until the new sequence number has been advertised to each other node in the cluster. The method also involves receiving a message advertising a first sequence number from another node in the cluster, and subsequently using the first sequence number as the current sequence number.
    • 公开了用于在分布式环境中维持写顺序保真度的各种系统和方法。 可以由集群中的每个节点执行的一种方法涉及将当前序列号与包括在一组独立写入操作中的多个写入操作中的每一个相关联。 响应于检测到集合中的一个写入操作准备好完成,则选择新的序列号,并且此后使用该新的序列号作为当前序列号。 集合中的写入操作都不允许返回到启动写入操作的应用程序,直到新的序列号已经发布到集群中的每个其他节点。 该方法还涉及从集群中的另一节点接收从第一序列号通告的消息,随后使用第一序列号作为当前序列号。