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1. 发明授权

US5504857A Highly available fault tolerant relocation of storage with atomicity 失效
标题翻译：具有原子性的存储的高可用性容错重定位
公开(公告)号：US5504857A
公开(公告)日：1996-04-02
申请号：US26278
申请日：1993-03-04
申请人： Robert Baird , Gerald P. Bozman , George Eisenberger , Albert Kamerman , Alexander S. Lett , John J. McAssey , James J. Myers , William H. Tetzlaff , Pong-sheng Wang
发明人： Robert Baird , Gerald P. Bozman , George Eisenberger , Albert Kamerman , Alexander S. Lett , John J. McAssey , James J. Myers , William H. Tetzlaff , Pong-sheng Wang
IPC分类号： G06F12/00 , G06F11/14 , G06F12/08 , G06F11/00
CPC分类号： G06F12/08 , G06F11/1402
摘要： A computer implemented method for robustly copying pages to system managed storage in order to maintain data in a consistent state and in order to provide continuous access availability of the pages to executing applications. The method achieves data consistency by atomically shadow copying application referenced pages and amending directories in a failure independent medium on (1) an access path interrupt as well as on (2) a page update basis. Availability is enhanced by duplexing the pages and directories as part of the atomic shadow copying step.
摘要翻译：一种计算机实现的方法，用于将页面强大地复制到系统管理的存储器，以便将数据维持在一致状态，并且为了提供执行应用程序的页面的持续访问可用性。该方法通过原子阴影复制应用程序引用的页面并在（1）访问路径中断以及（2）页面更新）的故障独立介质中修改目录来实现数据一致性。通过将页面和目录作为原子影子复制步骤的一部分进行双面打印来增强可用性。

2. 发明授权

US5226143A Multiprocessor system includes operating system for notifying only those cache managers who are holders of shared locks on a designated page by global lock manager 失效
标题翻译：多处理器系统包括操作系统，用于仅通知全球锁定经理在指定页面上的共享锁的持有人的高速缓存管理器
公开(公告)号：US5226143A
公开(公告)日：1993-07-06
申请号：US493581
申请日：1990-03-14
申请人： Robert Baird , Gerald P. Bozman , Alexander S. Lett , James J. Myers , William H. Tetzlaff
发明人： Robert Baird , Gerald P. Bozman , Alexander S. Lett , James J. Myers , William H. Tetzlaff
IPC分类号： G06F12/08
CPC分类号： G06F12/0815
摘要： A conditional broadcast or notification facility of a global lock manager is utilized to both serialize access to pages stored in local caches of counterpart processors in a distributed system and to ensure consistency among pages common to the caches. Exclusive use locks are obtained in advance of all write operations. When a page is to be updated, which page is cached in a processor other than that of the requester, then a delay is posed to the grant of the exclusive lock, all shared use lock holders to the same page notified, local copies are invalidated, exclusive lock granted, page is updated and written through cache, after which the lock is demoted to shared use.

3. 发明授权

US5218696A Method for dynamically expanding and rapidly accessing file directories 失效
标题翻译：用于动态扩展和快速访问文件目录的方法
公开(公告)号：US5218696A
公开(公告)日：1993-06-08
申请号：US946829
申请日：1992-09-17
申请人： Robert Baird , Robert R. Berbec , Gerald P. Bozman , Alexander S. Lett , James J. Myers , William H. Tetzlaff , Jay H. Unger
发明人： Robert Baird , Robert R. Berbec , Gerald P. Bozman , Alexander S. Lett , James J. Myers , William H. Tetzlaff , Jay H. Unger
IPC分类号： G06F9/44 , G06F17/30
CPC分类号： G06F17/30171 , G06F17/30091 , G06F17/30952 , G06F9/44 , Y10S707/99931 , Y10S707/99938
摘要： A computer-implemented method for the name-oriented accessing of files having at least zero records, any access path to files and records through an external store coupling the computer being defined by a pair of related directories. A first directory of record entries is sorted on a two-part token. The token consists of a unique sequence number assigned to the record and the sequence number of any parent record entry. Each record entry includes the token, file or record name, and external store address or pointer A traverse through the tokens constitutes a leaf-searchable B-tree.Rapid access to target records is by way of a name-sorted, inverted directory of names and tokens as a subset and which is reconstitutable from the first directory in the event of unavailability.
摘要翻译：用于面向名称访问具有至少零记录的文件的计算机实现的方法，通过耦合由一对相关目录定义的计算机的外部存储器的文件和记录的任何访问路径。记录条目的第一个目录按照两部分令牌进行排序。令牌由分配给记录的唯一序列号和任何父记录条目的序列号组成。每个记录条目包括令牌，文件或记录名，外部存储地址或指针A穿过令牌构成叶可搜索的B树。对目标记录的快速访问是通过名称排序的反转目录的名称和令牌作为子集，并且在不可用的情况下可从第一个目录重新构建。

4. 发明授权

US5410697A Concurrency management using version identification of shared data as a supplement to use of locks 失效
标题翻译：并发管理使用共享数据的版本识别作为使用锁的补充
公开(公告)号：US5410697A
公开(公告)日：1995-04-25
申请号：US132433
申请日：1993-10-06
申请人： Robert Baird , George Eisenberger , Alexander S. Lett , James J. Myers , William H. Tetzlaff , Jay G. Unger
发明人： Robert Baird , George Eisenberger , Alexander S. Lett , James J. Myers , William H. Tetzlaff , Jay G. Unger
IPC分类号： G06F9/52 , G06F12/08 , G06F15/16 , G06F15/177
CPC分类号： G06F12/0815
摘要： A method for managing concurrency using a serializing token as a supplement to locks for accessing the same page by different processes and ensuring coherence between data caches and a shared access backing store supporting the processes defined onto multiple processors. A shared lock and a new token are issued by a local lock manager (LLM) and local cache manager (LCM) in response to a page read request from a process. An exclusive lock, an invalidation of all cache resident copies of the page, a cache write through to backing store of the changed page, a copyback of a new token, and lock release are responsive to a page write/update request from a process where the token issued to the process during a prior request matches the token stored with a cache resident copy of the page. Otherwise, a write request fails and the process must first issue a read request to the page of interest.
摘要翻译：一种用于使用序列化令牌作为用于由不同进程访问同一页面的锁的补充来管理并发的方法，并且确保数据高速缓存之间的一致性以及支持定义在多个处理器上的进程的共享访问后台存储。响应来自进程的页面读取请求，本地锁管理器（LLM）和本地缓存管理器（LCM）发出共享锁和新令牌。独占锁，页面的所有高速缓存驻留副本的无效，缓存写入更改的页面的后备存储，新令牌的副本以及锁定版本响应于来自其中的过程的页面写入/更新请求，在先前请求期间发出给进程的令牌与存储在页面的缓存常驻副本中的令牌相匹配。否则，写入请求失败，并且该进程必须首先向感兴趣的页面发出读取请求。

5. 发明授权

US5261088A Managing locality in space reuse in a shadow written B-tree via interior node free space list 失效
标题翻译：通过内部节点自由空间列表管理阴影书写B树中的空间重用中的位置
公开(公告)号：US5261088A
公开(公告)日：1993-11-09
申请号：US514904
申请日：1990-04-26
申请人： Robert Baird , Gerald P. Bozman , Nancy Y. Young
发明人： Robert Baird , Gerald P. Bozman , Nancy Y. Young
IPC分类号： G06F12/00 , G06F17/30 , G06F15/40
CPC分类号： G06F17/30961 , Y10S707/99957
摘要： A method for managing space re-use with respect to the indices (nodes) of shadow written tree organized dynamic random accessed files/records/pages located in the external store of a CPU. The method reserves space in all non-leaf nodes and maintains a list of available node addresses. When a new node is required then space, if available, is obtained from the parent node list. Only when the parent list becomes exhausted is space (node) obtained from a node inventory manager. Deletion of a node causes its address to be placed on the free or available list maintained by that node's parent. If there is no space, then space on the parent node list is obtained by returning to the inventory manager that node on the list having the least locality with the existing subordinate (children) nodes of the parent.

6. 发明申请

US20070076330A1 Magnetic tunnel junction temperature sensors 失效
标题翻译：磁隧道结温度传感器
公开(公告)号：US20070076330A1
公开(公告)日：2007-04-05
申请号：US11240514
申请日：2005-09-30
申请人： Young Chung , Robert Baird , Mark Durlam
发明人： Young Chung , Robert Baird , Mark Durlam
IPC分类号： G11B5/33
CPC分类号： G11C11/16 , G01K7/01 , G11C29/50 , G11C29/50008 , G11C2029/5002
摘要： An integrated circuit device is provided which includes a heat source disposed in a substrate, and a Magnetic Tunnel Junction (“MTJ”) temperature sensor disposed over the heat source.
摘要翻译：提供一种集成电路装置，其包括设置在基板中的热源和设置在热源上方的磁隧道结（“MTJ”）温度传感器。

7. 发明申请

US20070045759A1 Passive elements in MRAM embedded integrated circuits 有权
公开(公告)号：US20070045759A1
公开(公告)日：2007-03-01
申请号：US11217146
申请日：2005-08-31
申请人： Young Chung , Robert Baird , Mark Durlam , Gregory Grynkewich , Eric Salter
发明人： Young Chung , Robert Baird , Mark Durlam , Gregory Grynkewich , Eric Salter
IPC分类号： H01L43/00
CPC分类号： H01L27/228
摘要： An integrated circuit device (300) comprises a substrate (301) and MRAM architecture (314) formed on the substrate (308). The MRAM architecture (314) includes a MRAM circuit (318) formed on the substrate (301); and a MRAM cell (316) coupled to and formed above the MRAM circuit (318). Additionally a passive device (320) is formed in conjunction with the MRAM cell (316). The passive device (320) can be one or more resistors and one or more capacitor. The concurrent fabrication of the MRAM architecture (314) and the passive device (320) facilitates an efficient and cost effective use of the physical space available over active circuit blocks of the substrate (404, 504), resulting in three-dimensional integration.

8. 发明申请

US20070002609A1 MRAM embedded smart power integrated circuits 有权
标题翻译： MRAM嵌入式智能电源集成电路
公开(公告)号：US20070002609A1
公开(公告)日：2007-01-04
申请号：US11170874
申请日：2005-06-30
申请人： Young Chung , Robert Baird , Mark Durlam , Gregory Grynkewich , Eric Salter
发明人： Young Chung , Robert Baird , Mark Durlam , Gregory Grynkewich , Eric Salter
IPC分类号： G11C11/14
CPC分类号： G11C11/1659 , H01F10/3254
摘要： An integrated circuit device includes a magnetic random access memory (“MRAM”) architecture and a smart power integrated circuit architecture formed on the same substrate using the same fabrication process technology. The fabrication process technology is a modular process having a front end process and a back end process. In the example embodiment, the smart power architecture includes a power circuit component, a digital logic component, and an analog control component formed by the front end process, and a sensor architecture formed by the back end process. The MRAM architecture includes an MRAM circuit component formed by the front end process and an MRAM cell array formed by the back end process. In one practical embodiment, the sensor architecture includes a sensor component that is formed from the same magnetic tunnel junction core material utilized by the MRAM cell array. The concurrent fabrication of the MRAM architecture and the smart power architecture facilitates an efficient and cost effective use of the physical space available over active circuit blocks of the substrate, resulting in three-dimensional integration.
摘要翻译：集成电路装置包括使用相同的制造工艺技术在同一衬底上形成的磁性随机存取存储器（“MRAM”）架构和智能电力集成电路架构。制造工艺技术是具有前端工艺和后端工艺的模块化工艺。在该示例性实施例中，智能功率架构包括由前端处理形成的电源电路部件，数字逻辑部件和模拟控制部件以及由后端处理形成的传感器架构。 MRAM架构包括由前端处理形成的MRAM电路部件和由后端处理形成的MRAM单元阵列。在一个实际实施例中，传感器架构包括由MRAM单元阵列使用的相同的磁性隧道结芯体材料形成的传感器部件。 MRAM架构和智能电源架构的并行制造有助于在衬底的有源电路块上可用的物理空间的有效和成本有效的使用，导致三维集成。

9. 发明申请

US20060226509A1 Antifuse element and electrically redundant antifuse array for controlled rupture location 有权
标题翻译：防腐元件和电气冗余反熔丝阵列，用于受控断裂位置
公开(公告)号：US20060226509A1
公开(公告)日：2006-10-12
申请号：US11095302
申请日：2005-03-31
申请人： Won Min , Robert Baird , Jiang-Kai Zuo , Gordon Lee
发明人： Won Min , Robert Baird , Jiang-Kai Zuo , Gordon Lee
IPC分类号： H01L29/00
CPC分类号： H01L23/5252 , H01L2924/0002 , H01L2924/00
摘要： An antifuse element (102) having end corners (120, 122) of a gate electrode (104) positioned directly above an active area (106) or bottom electrode. The minimum programming voltage between the gate electrode (104) and the active area (106) creates a current path through an insulating layer (110) positioned therebetween. The high electric field created at the end corners (120, 122) of the gate electrode (104) results in a breakdown and rupture of the insulating layer (110) at points directly beneath the end corners (120, 122). This localization of the insulating layer (110) at the corners (120,122) provides for lower post program resistance and variation, and faster programming at a lower programming power. The antifuse elements (102) when integrated into an array (300, 320, 400, 550) provide for increased packing density. The array is fabricated to include multiple active areas (304) for individual antifuse element (302) programming or a common active area (324,405,426,506) for multi-element programming.
摘要翻译：具有位于有源区域（106）或底部电极正上方的栅电极（104）的端角（120,122）的反熔断元件（102）。栅电极（104）和有源区（106）之间的最小编程电压产生通过位于它们之间的绝缘层（110）的电流路径。在栅电极（104）的端角（120,122）处产生的高电场导致在端角（120,122）正下方的绝缘层（110）的破裂和破裂。绝缘层（110）在拐角（120,122）处的定位提供较低的后编程电阻和变化，并且以较低的编程功率进行更快的编程。当反熔丝元件（102）集成到阵列（300,320,400,550）中时，提供了增加的堆积密度。阵列被制造为包括用于单个反熔丝元件（302）编程的多个有效区域（304）或用于多元件编程的公共有效区域（324,405,426,506）。

10. 发明申请

US20060003551A1 Ultra-thin die and method of fabricating same 有权
公开(公告)号：US20060003551A1
公开(公告)日：2006-01-05
申请号：US10881144
申请日：2004-06-30
申请人： David Mancini , Young Chung , William Dauksher , Donald Weston , Steven Young , Robert Baird
发明人： David Mancini , Young Chung , William Dauksher , Donald Weston , Steven Young , Robert Baird
IPC分类号： H01L21/301 , H01L21/46
CPC分类号： H01L21/3065 , H01L21/78 , Y10S438/977
摘要： In accordance with a specific embodiment, a method of processing a semiconductor substrate is disclosed whereby the substrate is thinned, and the dice formed on the substrate are singulated by a common process. Trench regions are formed on a backside of the substrate. An isotropic etch of the backside results in a thinning of the substrate while maintaining the depth of the trenches, thereby facilitating singulation of the die.

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