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1. 发明授权

US06382500B1 Solder reflow furnace with flux effluent collector and method of preventing flux contamination 有权
标题翻译：焊剂回流炉，助焊剂废液收集器及防止焊剂污染的方法
公开(公告)号：US06382500B1
公开(公告)日：2002-05-07
申请号：US09642835
申请日：2000-08-22
申请人： Raj N. Master , Mohammad Zubair Khan , Maria Guardado , Sp Lee , Sofi Mohd
发明人： Raj N. Master , Mohammad Zubair Khan , Maria Guardado , Sp Lee , Sofi Mohd
IPC分类号： B23K100
CPC分类号： B23K1/203 , B23K1/0016 , B23K1/008 , B23K2101/40
摘要： When soldering semiconductor devices in a solder reflow furnace flux is vaporized and carried to the furnace exhaust pipe. The flux condenses on the walls of the exhaust pipe and drips back into the furnace contaminating production parts. A solder reflow furnace with a flux effluent collector prevents flux drip-back. The flux effluent collector has an exhaust gas heater that maintains flux effluent in a gaseous state, a flux cooler, to subsequently condense flux, and a flux condensation region where the flux condenses. The flux condensation region is offset from the furnace's exhaust opening so that condensed flux cannot drip back into the furnace.
摘要翻译：当在焊料回流炉中焊接半导体器件时，助熔剂被蒸发并运送到炉排气管。助焊剂在排气管的壁上冷凝并滴入炉中，污染生产部件。具有助焊剂流出物收集器的焊料回流炉防止焊剂滴落。助焊剂流出物收集器具有一个废气加热器，其保持处于气态的助熔剂流出物，助熔剂冷却器，随后冷凝助熔剂，以及通量冷凝的助熔剂冷凝区域。助熔剂冷凝区域与炉的排气口偏离，使得冷凝的通量不能滴入炉中。

2. 发明授权

US06812570B2 Organic packages having low tin solder connections 有权
标题翻译：具有低锡焊接连接的有机封装
公开(公告)号：US06812570B2
公开(公告)日：2004-11-02
申请号：US10184061
申请日：2002-06-28
申请人： Raj N. Master , Mohammad Zubair Khan , Maria Guardado , Charles Anderson
发明人： Raj N. Master , Mohammad Zubair Khan , Maria Guardado , Charles Anderson
IPC分类号： H01L2348
CPC分类号： H01L24/81 , H01L23/145 , H01L23/49883 , H01L2224/13111 , H01L2224/81801 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01051 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/12044 , H01L2924/14 , H01L2924/15311 , H01L2924/19041 , H05K3/3463 , Y10T29/49144 , Y10T428/24917
摘要： An organic carrier member for mounting a semiconductor device is provided that has a plurality of solder pads containing low amounts of tin and bismuth. Embodiments include a bismaleimide-triazine epoxy laminate having a plurality of solder pads on the surface thereof where the solder pads contain no more than about 20 weight percent tin and has a reflow temperature of no greater than about 270° C.
摘要翻译：提供一种用于安装半导体器件的有机载体构件，其具有多个含有少量锡和铋的焊盘。实施方案包括其表面上具有多个焊料垫的双马来酰亚胺 - 三嗪环氧层压板，其中焊盘含有不超过约20重量％的锡并具有不大于约270℃的回流温度。

3. 发明授权

US6103549A No clean flux for flip chip assembly 失效
标题翻译：没有干净的焊剂用于倒装芯片组装
公开(公告)号：US6103549A
公开(公告)日：2000-08-15
申请号：US40643
申请日：1998-03-17
申请人： Raj N. Master , Orion K. Starr , Maria Guardado , Mohammad Zubair Khan
发明人： Raj N. Master , Orion K. Starr , Maria Guardado , Mohammad Zubair Khan
IPC分类号： H05K3/34 , H01L21/56 , H01L21/60 , H01L21/44 , H01L21/48 , H01L21/50
CPC分类号： H01L21/563 , H01L24/81 , H01L2224/13111 , H01L2224/73203 , H01L2224/81801 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01049 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/351
摘要： A method of assembling a substrate and die in a flip chip configuration using a no clean flux. The no clean fluxes have sufficient chemical activity to activate solder bumps contacting bond pads to form reliable solder joints, sufficient tackiness to hold the substrate and die in alignment with the solder bumps contacting the bond pads, and a viscosity to enable a high volume manufacturing process to be used. The no clean fluxes leave a minimal amount of residue during a reflow process that does not interfere with an underfill operation and does not adversely affect the solder joints. The no clean fluxes that can be used for this application are RM1919 from Alpha Metals, Co. and H208 from Indium Company.
摘要翻译：使用无清洁焊剂以倒装芯片配置组装衬底和管芯的方法。不干净的焊剂具有足够的化学活性以激活焊料凸点接触焊盘以形成可靠的焊接接头，足够的粘性以保持衬底和管芯与接触焊盘接触的焊料凸块对齐，并且具有使得能够进行大量制造工艺的粘度要使用的。不干净的焊剂在回流过程中留下最少量的残留物，其不会妨碍底部填充操作，并且不会不利地影响焊点。可用于本应用的无清洁助焊剂来自Alpha Metals，Co.的RM1919和Indium Company的H208。

4. 发明授权

US06468917B1 Method for modifying a C4 semiconductor device 失效
标题翻译：修改C4半导体器件的方法
公开(公告)号：US06468917B1
公开(公告)日：2002-10-22
申请号：US09502916
申请日：2000-02-10
申请人： Susan Xia Li , Arnold Louie , Maria Guardado
发明人： Susan Xia Li , Arnold Louie , Maria Guardado
IPC分类号： H01L21302
CPC分类号： H01L24/81 , H01L21/76892 , H01L24/11 , H01L2224/13099 , H01L2224/81801 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01018 , H01L2924/01033 , H01L2924/01074 , H01L2924/014 , H01L2924/15312 , H01L2224/0401
摘要： The present invention provides a method for modifying a C4 device, the device including a circuit, a polyimide layer, and a plurality of solder bumps in the active region of the C4 device. The method includes removing the polyimide layer using a plasma etch, the plasma etch comprising a mixture of oxygen and an inert gas; modifying the circuit; and cleaning the modified C4 device with a reactive flux. By mixing the oxygen with an inert gas, the oxidation of the solder bumps due to the plasma etch are reduced. Because the top layer features are now readily visible, circuit structures are more easily located, and modification can be more easily performed and with more accuracy. In the preferred embodiment, the device is then cleaned with a reactive flux, which removes any oxidation layer which has formed on the solder bumps. In this manner, circuit modification may be performed more quickly while also minimizing the oxidation of the solder bumps. The reduced oxidation of the solder bumps will help the C4 packaging process to be successful for electrical testing after focused beam ion (FIB) modification. Also, since the costly FIB process is not required to locally remove the polyimide layer for locating circuit structures, the cost of device fabrication is reduced.
摘要翻译：本发明提供一种在C4器件的有源区中修改C4器件的方法，该器件包括电路，聚酰亚胺层和多个焊料凸块。该方法包括使用等离子体蚀刻去除聚酰亚胺层，等离子体蚀刻包括氧和惰性气体的混合物; 修改电路; 并用反应通量清洗改性的C4装置。通过将氧气与惰性气体混合，由于等离子体蚀刻引起的焊料凸块的氧化降低。因为顶层特征现在容易可见，电路结构更容易定位，并且可以更准确地进行修改。在优选实施例中，然后用反应性焊剂清洁器件，其去除在焊料凸块上形成的任何氧化层。以这种方式，可以更快地执行电路修改，同时还使焊料凸块的氧化最小化。焊料凸块的减少的氧化将有助于C4封装工艺在聚焦光束离子（FIB）修改后的电气测试中成功。此外，由于不需要昂贵的FIB工艺来局部去除用于定位电路结构的聚酰亚胺层，因此减少了器件制造的成本。

5. 发明授权

US06603916B1 Lightwave circuit assembly having low deformation balanced sandwich substrate 有权
标题翻译：具有低变形平衡夹心基板的光波电路组件
公开(公告)号：US06603916B1
公开(公告)日：2003-08-05
申请号：US09915990
申请日：2001-07-26
申请人： Kenneth McGreer , Peter D. Ascanio , Maria Guardado , Randal E. Zugnoni
发明人： Kenneth McGreer , Peter D. Ascanio , Maria Guardado , Randal E. Zugnoni
IPC分类号： G02B610
CPC分类号： G02B6/12
摘要： A planar lightwave circuit assembly has an optical layer on a substrate. The substrate is attached to one face of a riser. A layer of a material having properties substantially the same as the substrate is attached to the other face of the riser. The layer of material counteracts the tendency of the assembly to bow as a result of differences in the coefficients of thermal expansion of the riser and substrate. This reduces stress-induced changes in performance characteristics of lightwave circuits in the optical layer.
摘要翻译：平面光波电路组件在基板上具有光学层。衬底附着在提升管的一个面上。具有与基板基本相同的特性的材料层附着在提升管的另一个面上。由于提升管和基板的热膨胀系数不同，材料层抵消了组件弯曲的倾向。这减少了光层中光波电路的应力引起的性能变化。

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