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1. 发明申请

WO2011046845A3 SIGNAL DISTRIBUTION NETWORKS AND RELATED METHODS 审中-公开
标题翻译：信号分配网络及相关方法
公开(公告)号：WO2011046845A3
公开(公告)日：2011-08-18
申请号：PCT/US2010052115
申请日：2010-10-09
申请人： RAMBUS INC , ARYANFAR FARSHID , LEE HAE-CHANG , CHANG KUN-YUNG , WU TING , WERNER CARL , KOOCHAKZADEH MASOUD
发明人： ARYANFAR FARSHID , LEE HAE-CHANG , CHANG KUN-YUNG , WU TING , WERNER CARL , KOOCHAKZADEH MASOUD
IPC分类号： H04L12/02
CPC分类号： H03L7/093 , G06F1/10 , H03L7/0802
摘要： A signal distribution network has segments that each have a buffer circuit, a transmission line coupled to the buffer circuit, an inductor coupled to the buffer circuit through the transmission line, and a variable capacitance circuit coupled to the inductor and coupled to the buffer circuit through the transmission line. A capacitance of the variable capacitance circuit is set to determine a phase and an amplitude of a signal transmitted through the transmission line. A signal distribution network can include a phase detector, a loop filter circuit, and a resonant delay circuit. The phase detector compares a phase of a first periodic signal to a phase of a second periodic signal. The resonant delay circuit has a variable impedance circuit having an impedance that varies based on changes in an output signal of the loop filter circuit.
摘要翻译：信号分配网络具有每个段具有缓冲电路，耦合到缓冲电路的传输线，通过传输线耦合到缓冲电路的电感器，以及耦合到电感器的可变电容电路，并通过传输线。可变电容电路的电容被设定为确定通过传输线传输的信号的相位和幅度。信号分配网络可以包括相位检测器，环路滤波器电路和谐振延迟电路。相位检测器将第一周期信号的相位与第二周期信号的相位进行比较。谐振延迟电路具有可变阻抗电路，其具有基于环路滤波器电路的输出信号的变化而变化的阻抗。

2. 发明申请

WO2011090767A3 PHASE DETECTION CIRCUITS AND METHODS 审中-公开
标题翻译：相位检测电路和方法
公开(公告)号：WO2011090767A3
公开(公告)日：2011-10-06
申请号：PCT/US2010062615
申请日：2010-12-30
申请人： RAMBUS INC , ARYANFAR FARSHID , LEE HAE-CHANG , WERNER CARL
发明人： ARYANFAR FARSHID , LEE HAE-CHANG , WERNER CARL
IPC分类号： H03L7/085
CPC分类号： H03L7/085 , G01R25/00 , H03D13/00 , H03L7/0816
摘要： A phase detector circuit compares the phases of first and second periodic input signals to generate an output signal. The phase detector includes a circuit that makes two different combinations of the first and the second periodic input signals to generate third and fourth periodic signals. This circuit causes the third periodic signal to be based on a first combination of the first periodic signal and the second periodic signal that imparts a first relative phase shift. The circuit causes the fourth periodic signal to be based on a second combination of the first periodic signal and the second periodic signal to provide a different relative phase shift. The phase detector also includes a comparison circuit that compares a measure of the power of the third periodic signal to a measure of the power of the fourth periodic signal to generate the phase comparison output signal.
摘要翻译：相位检测器电路比较第一和第二周期性输入信号的相位以产生输出信号。相位检测器包括使第一和第二周期性输入信号的两种不同组合产生第三和第四周期性信号的电路。该电路使得第三周期性信号基于赋予第一相对相移的第一周期性信号和第二周期性信号的第一组合。该电路使得第四周期性信号基于第一周期性信号和第二周期性信号的第二组合以提供不同的相对相移。相位检测器还包括比较电路，该比较电路将第三周期性信号的功率测量结果与第四周期性信号功率测量结果进行比较以生成相位比较输出信号。

3. 发明申请

WO0221782A2 METHOD AND APPARATUS FOR CALIBRATING A MULTI-LEVEL CURRENT MODE DRIVER AND FOR GENERATING A MULTI-LEVEL REFERENCE VOLTAGE IN SYSTEMS USING EQUALIZATION OR CROSSTALK CANCELLATION 审中-公开
标题翻译：用于校准多级电流模式驱动器的方法和装置，以及使用均衡或CROSSTALK取消在系统中产生多级参考电压
公开(公告)号：WO0221782A2
公开(公告)日：2002-03-14
申请号：PCT/US0127478
申请日：2001-09-05
申请人： RAMBUS INC , WERNER CARL , HOROWITZ MARK , CHAU PARK , BEST SCOTT , LIAW H J , SIDIROPOULOS STEFANOS , ZERBE JARED LEVAN , KIM JUN
发明人： WERNER CARL , HOROWITZ MARK , CHAU PARK , BEST SCOTT , LIAW H J , SIDIROPOULOS STEFANOS , ZERBE JARED LEVAN , KIM JUN
IPC分类号： H04L25/02 , H04L25/03 , H04L25/08 , H04L25/49
CPC分类号： H04L25/0282 , H04L25/0272 , H04L25/0298 , H04L25/03878 , H04L25/08 , H04L25/4902
摘要： The current controller includes a multi-level voltage reference and receives at least onesource calibration signal. A comparator is coupled by a coupling network t the multi-level voltage reference and the source calibration signal. A selected voltage is applied from the multi-level voltage reference and a selected source calibration signal is applied to the comparator. Further, system and method are shown for generation of at least one reference voltage level in a bus system. A reference voltage generator on a current driver includes at least one reference voltage level, at least one control signal, and an active device. The active device is coupled to the at least one control signal, such as a current signal, and a selected reference voltage of the at least one reference voltage level. The active device is arranged to shift the at least one reference voltage level based on the at least one current control signal such as an equalization signal, a crosstalk signal, or the combination thereof, employed on the current driver. Further, low-latency equalization mechanisms for multi-PAM communication systems are disclosed that reduce delay and complexity in signal correction mechanisms. The equalization mechanisms tap into input signals for a multi-PAM signal driver, and compensate for attenuation along a signal transmission line, crosstalk between adjacent lines, and signal reflections due to impedance discontinuities along the line.
摘要翻译：电流控制器包括多电平电压基准并且接收至少一个源校准信号。比较器通过耦合网络耦合多电平电压基准和源校准信号。从多电平参考电压施加所选择的电压，并且将选择的源校准信号施加到比较器。此外，示出了在总线系统中产生至少一个参考电压电平的系统和方法。电流驱动器上的参考电压发生器包括至少一个参考电压电平，至少一个控制信号和有源器件。有源器件耦合到至少一个控制信号，例如电流信号，以及所选择的至少一个参考电压电平的参考电压。有源器件被布置为基于在当前驱动器上采用的至少一个电流控制信号（例如均衡信号，串扰信号或其组合）来移位至少一个参考电压电平。此外，公开了用于多PAM通信系统的低延迟均衡机制，其减少信号校正机制中的延迟和复杂性。均衡机制分为用于多PAM信号驱动器的输入信号，并且补偿沿着信号传输线的衰减，相邻线之间的串扰以及由于沿线的阻抗不连续性引起的信号反射。

4. 发明申请

WO0221782A9 CALIBRATION OF A MULTI-LEVEL CURRENT MODE DRIVER 审中-公开
标题翻译：多级电流模式驱动器的校准
公开(公告)号：WO0221782A9
公开(公告)日：2003-03-20
申请号：PCT/US0127478
申请日：2001-09-05
申请人： RAMBUS INC , WERNER CARL , HOROWITZ MARK , CHAU PARK , BEST SCOTT , LIAW H J , SIDIROPOULOS STEFANOS , ZERBE JARED LEVAN , KIM JUN
发明人： WERNER CARL , HOROWITZ MARK , CHAU PARK , BEST SCOTT , LIAW H J , SIDIROPOULOS STEFANOS , ZERBE JARED LEVAN , KIM JUN
IPC分类号： H04L25/02 , H04L25/03 , H04L25/08 , H04L25/49
CPC分类号： H04L25/0282 , H04L25/0272 , H04L25/0298 , H04L25/03878 , H04L25/08 , H04L25/4902
摘要： The current controller includes a multi-level voltage reference and receives at least onesource calibration signal. A comparator is coupled by a coupling network t the multi-level voltage reference and the source calibration signal. A selected voltage is applied from the multi-level voltage reference and a selected source calibration signal is applied to the comparator. Further, system and method are shown for generation of at least one reference voltage level in a bus system. A reference voltage generator on a current driver includes at least one reference voltage level, at least one control signal, and an active device. The active device is coupled to the at least one control signal, such as a current signal, and a selected reference voltage of the at least one reference voltage level. The active device is arranged to shift the at least one reference voltage level based on the at least one current control signal such as an equalization signal, a crosstalk signal, or the combination thereof, employed on the current driver. Further, low-latency equalization mechanisms for multi-PAM communication systems are disclosed that reduce delay and complexity in signal correction mechanisms. The equalization mechanisms tap into input signals for a multi-PAM signal driver, and compensate for attenuation along a signal transmission line, crosstalk between adjacent lines, and signal reflections due to impedance discontinuities along the line.
摘要翻译：电流控制器包括多电平电压基准并且接收至少一个源校准信号。比较器通过耦合网络耦合多电平电压基准和源校准信号。从多电平参考电压施加所选择的电压，并且将选择的源校准信号施加到比较器。此外，示出了在总线系统中产生至少一个参考电压电平的系统和方法。电流驱动器上的参考电压发生器包括至少一个参考电压电平，至少一个控制信号和有源器件。有源器件耦合到至少一个控制信号，例如电流信号，以及所选择的至少一个参考电压电平的参考电压。有源器件被布置成基于在当前驱动器上采用的至少一个电流控制信号（例如均衡信号，串扰信号或其组合）来移位至少一个参考电压电平。此外，公开了用于多PAM通信系统的低延迟均衡机制，其减少信号校正机制中的延迟和复杂性。均衡机制分为用于多PAM信号驱动器的输入信号，并且补偿沿着信号传输线的衰减，相邻线之间的串扰以及由于沿线的阻抗不连续性引起的信号反射。

6. 发明专利

DE60141775D1 未知
公开(公告)号：DE60141775D1
公开(公告)日：2010-05-20
申请号：DE60141775
申请日：2001-09-05
申请人： RAMBUS INC
发明人： WERNER CARL , HOROWITZ MARK , CHAU PARK , BEST SCOTT , LIAW H J , SIDIROPOULOS STEFANOS , ZERBE JARED LEVAN , KIM JUN
IPC分类号： H04L25/02 , H04L25/49
摘要： Low-latency equalization mechanisms for multi-PAM communication systems are disclosed that reduce delay and complexity in signal correction mechanisms. The equalization mechanisms tap into input signals for a multi-PAM signal driver, and compensate for attenuation along a signal transmission line, crosstalk between adjacent lines, and signal reflections due to impedance discontinuities along the line.

7. 发明专利

AT463911T 未知
公开(公告)号：AT463911T
公开(公告)日：2010-04-15
申请号：AT01966571
申请日：2001-09-05
申请人： RAMBUS INC
发明人： WERNER CARL , HOROWITZ MARK , CHAU PARK , BEST SCOTT , LIAW H , SIDIROPOULOS STEFANOS , ZERBE JARED , KIM JUN
IPC分类号： H04L25/02 , H04L25/49
摘要： Low-latency equalization mechanisms for multi-PAM communication systems are disclosed that reduce delay and complexity in signal correction mechanisms. The equalization mechanisms tap into input signals for a multi-PAM signal driver, and compensate for attenuation along a signal transmission line, crosstalk between adjacent lines, and signal reflections due to impedance discontinuities along the line.

8. 发明专利

DE1618769U 未知
公开(公告)号：DE1618769U
公开(公告)日：1951-01-11
申请号：DED0015234
申请日：1948-11-16
申请人： WERNER CARL
发明人： WERNER CARL

9. 发明专利

AT112179B 未知
公开(公告)号：AT112179B
公开(公告)日：1929-01-25
申请号：AT112179D
申请日：1926-05-14
申请人： WERNER CARL
发明人： WERNER CARL

10. 发明专利

DE1685953U 未知
公开(公告)号：DE1685953U
公开(公告)日：1954-10-28
申请号：DEW0010628
申请日：1954-06-05
申请人： WERNER CARL
发明人： WERNER CARL

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