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1. 发明申请

WO0221782A2 METHOD AND APPARATUS FOR CALIBRATING A MULTI-LEVEL CURRENT MODE DRIVER AND FOR GENERATING A MULTI-LEVEL REFERENCE VOLTAGE IN SYSTEMS USING EQUALIZATION OR CROSSTALK CANCELLATION 审中-公开
标题翻译：用于校准多级电流模式驱动器的方法和装置，以及使用均衡或CROSSTALK取消在系统中产生多级参考电压
公开(公告)号：WO0221782A2
公开(公告)日：2002-03-14
申请号：PCT/US0127478
申请日：2001-09-05
申请人： RAMBUS INC , WERNER CARL , HOROWITZ MARK , CHAU PARK , BEST SCOTT , LIAW H J , SIDIROPOULOS STEFANOS , ZERBE JARED LEVAN , KIM JUN
发明人： WERNER CARL , HOROWITZ MARK , CHAU PARK , BEST SCOTT , LIAW H J , SIDIROPOULOS STEFANOS , ZERBE JARED LEVAN , KIM JUN
IPC分类号： H04L25/02 , H04L25/03 , H04L25/08 , H04L25/49
CPC分类号： H04L25/0282 , H04L25/0272 , H04L25/0298 , H04L25/03878 , H04L25/08 , H04L25/4902
摘要： The current controller includes a multi-level voltage reference and receives at least onesource calibration signal. A comparator is coupled by a coupling network t the multi-level voltage reference and the source calibration signal. A selected voltage is applied from the multi-level voltage reference and a selected source calibration signal is applied to the comparator. Further, system and method are shown for generation of at least one reference voltage level in a bus system. A reference voltage generator on a current driver includes at least one reference voltage level, at least one control signal, and an active device. The active device is coupled to the at least one control signal, such as a current signal, and a selected reference voltage of the at least one reference voltage level. The active device is arranged to shift the at least one reference voltage level based on the at least one current control signal such as an equalization signal, a crosstalk signal, or the combination thereof, employed on the current driver. Further, low-latency equalization mechanisms for multi-PAM communication systems are disclosed that reduce delay and complexity in signal correction mechanisms. The equalization mechanisms tap into input signals for a multi-PAM signal driver, and compensate for attenuation along a signal transmission line, crosstalk between adjacent lines, and signal reflections due to impedance discontinuities along the line.
摘要翻译：电流控制器包括多电平电压基准并且接收至少一个源校准信号。比较器通过耦合网络耦合多电平电压基准和源校准信号。从多电平参考电压施加所选择的电压，并且将选择的源校准信号施加到比较器。此外，示出了在总线系统中产生至少一个参考电压电平的系统和方法。电流驱动器上的参考电压发生器包括至少一个参考电压电平，至少一个控制信号和有源器件。有源器件耦合到至少一个控制信号，例如电流信号，以及所选择的至少一个参考电压电平的参考电压。有源器件被布置为基于在当前驱动器上采用的至少一个电流控制信号（例如均衡信号，串扰信号或其组合）来移位至少一个参考电压电平。此外，公开了用于多PAM通信系统的低延迟均衡机制，其减少信号校正机制中的延迟和复杂性。均衡机制分为用于多PAM信号驱动器的输入信号，并且补偿沿着信号传输线的衰减，相邻线之间的串扰以及由于沿线的阻抗不连续性引起的信号反射。

2. 发明申请

WO0221782A9 CALIBRATION OF A MULTI-LEVEL CURRENT MODE DRIVER 审中-公开
标题翻译：多级电流模式驱动器的校准
公开(公告)号：WO0221782A9
公开(公告)日：2003-03-20
申请号：PCT/US0127478
申请日：2001-09-05
申请人： RAMBUS INC , WERNER CARL , HOROWITZ MARK , CHAU PARK , BEST SCOTT , LIAW H J , SIDIROPOULOS STEFANOS , ZERBE JARED LEVAN , KIM JUN
发明人： WERNER CARL , HOROWITZ MARK , CHAU PARK , BEST SCOTT , LIAW H J , SIDIROPOULOS STEFANOS , ZERBE JARED LEVAN , KIM JUN
IPC分类号： H04L25/02 , H04L25/03 , H04L25/08 , H04L25/49
CPC分类号： H04L25/0282 , H04L25/0272 , H04L25/0298 , H04L25/03878 , H04L25/08 , H04L25/4902
摘要： The current controller includes a multi-level voltage reference and receives at least onesource calibration signal. A comparator is coupled by a coupling network t the multi-level voltage reference and the source calibration signal. A selected voltage is applied from the multi-level voltage reference and a selected source calibration signal is applied to the comparator. Further, system and method are shown for generation of at least one reference voltage level in a bus system. A reference voltage generator on a current driver includes at least one reference voltage level, at least one control signal, and an active device. The active device is coupled to the at least one control signal, such as a current signal, and a selected reference voltage of the at least one reference voltage level. The active device is arranged to shift the at least one reference voltage level based on the at least one current control signal such as an equalization signal, a crosstalk signal, or the combination thereof, employed on the current driver. Further, low-latency equalization mechanisms for multi-PAM communication systems are disclosed that reduce delay and complexity in signal correction mechanisms. The equalization mechanisms tap into input signals for a multi-PAM signal driver, and compensate for attenuation along a signal transmission line, crosstalk between adjacent lines, and signal reflections due to impedance discontinuities along the line.
摘要翻译：电流控制器包括多电平电压基准并且接收至少一个源校准信号。比较器通过耦合网络耦合多电平电压基准和源校准信号。从多电平参考电压施加所选择的电压，并且将选择的源校准信号施加到比较器。此外，示出了在总线系统中产生至少一个参考电压电平的系统和方法。电流驱动器上的参考电压发生器包括至少一个参考电压电平，至少一个控制信号和有源器件。有源器件耦合到至少一个控制信号，例如电流信号，以及所选择的至少一个参考电压电平的参考电压。有源器件被布置成基于在当前驱动器上采用的至少一个电流控制信号（例如均衡信号，串扰信号或其组合）来移位至少一个参考电压电平。此外，公开了用于多PAM通信系统的低延迟均衡机制，其减少信号校正机制中的延迟和复杂性。均衡机制分为用于多PAM信号驱动器的输入信号，并且补偿沿着信号传输线的衰减，相邻线之间的串扰以及由于沿线的阻抗不连续性引起的信号反射。

3. 发明申请

WO2006113128A3 SEMICONDUCTOR DEVICE WITH SELF-ALIGNING CONTACTLESS INTERFACE 审中-公开
标题翻译：具有自校准接触界面的半导体器件
公开(公告)号：WO2006113128A3
公开(公告)日：2007-06-28
申请号：PCT/US2006012647
申请日：2006-04-05
申请人： RAMBUS INC , BEST SCOTT
发明人： BEST SCOTT
IPC分类号： H01L23/48
CPC分类号： H01L25/0657 , H01L23/48 , H01L24/31 , H01L24/48 , H01L24/81 , H01L24/83 , H01L25/50 , H01L2224/2919 , H01L2224/48235 , H01L2224/73265 , H01L2224/81143 , H01L2224/81801 , H01L2224/83136 , H01L2224/8385 , H01L2225/06513 , H01L2225/06531 , H01L2225/06593 , H01L2924/00014 , H01L2924/01006 , H01L2924/01023 , H01L2924/01033 , H01L2924/01037 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/19043 , H01L2924/3011 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Contactless interconnects for proximity communication between an integrated circuit die and an electrical structure are aligned by charging alignment pads on the integrated circuit die to a first voltage, and charging counterpart alignment pads on the electrical structure to a second voltage. The integrated circuit die is disposed in an initial position relative to the electrical structure to develop an electrostatic aligning force between the charged alignment pads and their counterparts. When the integrated circuit die and electrical structure are enabled to move relative to one another, the electrostatic aligning force shifts the relative positioning of the integrated circuit die and electrical structure toward a desired alignment.
摘要翻译：用于集成电路管芯和电气结构之间的用于邻近通信的非接触式互连通过将集成电路管芯上的对准焊盘充电至第一电压并将电气结构上的对应对准焊盘充电至第二电压来对准。集成电路管芯相对于电气结构设置在初始位置，以在电荷对准焊盘与其对应物之间产生静电取向力。当集成电路管芯和电气结构能够相对于彼此移动时，静电取向力将集成电路管芯和电气结构的相对定位移向期望的对准。

4. 发明申请

WO2010083006A3 METHODS AND CIRCUITS FOR DETECTING AND REPORTING HIGH-ENERGY PARTICLES USING MOBILE PHONES AND OTHER PORTABLE COMPUTING DEVICES 审中-公开
标题翻译：检测和报告使用移动电话和其他便携式计算设备的高能粒子的方法和电路
公开(公告)号：WO2010083006A3
公开(公告)日：2010-10-21
申请号：PCT/US2009068802
申请日：2009-12-18
申请人： RAMBUS INC , BEST SCOTT , BRONNER GARY , TSERN ELY
发明人： BEST SCOTT , BRONNER GARY , TSERN ELY
IPC分类号： H04W88/02 , H04W24/10 , H04W64/00
CPC分类号： H04W36/385 , G01T7/00 , H04M2250/12
摘要： Described are mobile phones that incorporate radiation detectors formed using commonly available semiconductor memories. The radiation detectors require little or no additional hardware over what is available in a conventional phone, and can thus be integrated with little expense or packaging modifications. The low cost supports a broad distribution of detectors. Data collected from constellations of detector-equipped mobile phones can be used to locate mislaid or stolen nuclear materials or other potentially dangerous radiation sources. Phone users can be alerted to radiation dangers in their vicinity, and aggregated phone- specific error data can serve as user-specific dosimeters.
摘要翻译：描述的是携带使用常用半导体存储器形成的辐射探测器的移动电话。辐射探测器对常规电话中可用的几乎没有额外的硬件，因此可以以少量的费用或包装修改来集成。低成本支持检测器的广泛分布。从装有探测器的手机的星座收集的数据可用于定位错误或被盗的核材料或其他潜在危险的辐射源。电话用户可以收到附近的辐射危险警报，并且聚合的手机特定的错误数据可以用作用户特定的剂量计。

5. 发明申请

WO2008076790A3 MULTI-DIE MEMORY DEVICE 审中-公开
标题翻译：多重记忆体装置
公开(公告)号：WO2008076790A3
公开(公告)日：2008-09-04
申请号：PCT/US2007087359
申请日：2007-12-13
申请人： RAMBUS INC , BEST SCOTT , LI MING
发明人： BEST SCOTT , LI MING
IPC分类号： G11C5/02
CPC分类号： G11C11/4093 , G11C5/02 , G11C5/025 , G11C5/04 , G11C11/4096 , H01L23/481 , H01L24/73 , H01L25/0652 , H01L25/0657 , H01L25/105 , H01L25/18 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48225 , H01L2224/48227 , H01L2224/73265 , H01L2225/0651 , H01L2225/0652 , H01L2225/06541 , H01L2225/06558 , H01L2225/06562 , H01L2225/1023 , H01L2225/1058 , H01L2924/00014 , H01L2924/01019 , H01L2924/01055 , H01L2924/14 , H01L2924/15311 , H01L2924/15321 , H01L2924/15331 , H01L2924/3011 , H01L2924/00012 , H01L2924/00 , H01L2224/0401
摘要： An integrated circuit (IC) package includes an interface die and a separate storage die. The interface die has a synchronous interface to receive memory access commands from an external memory controller, and has a plurality of clockless memory control interfaces to output row and column control signals that correspond to the memory access commands. The storage die has a plurality of independently accessible storage arrays and corresponding access-control interfaces to receive the row and column control signals from the clockless memory control interfaces, each of the access-control interfaces including data output circuitry to output read data corresponding to a given one of the memory access commands in a time-multiplexed transmission.
摘要翻译：集成电路（IC）封装包括接口管芯和单独的存储管芯。接口管芯具有用于从外部存储器控制器接收存储器访问命令的同步接口，并且具有多个无时钟存储器控制接口以输出对应于存储器访问命令的行和列控制信号。存储管芯具有多个可独立访问的存储阵列和对应的访问控制接口以接收来自无时钟存储器控制接口的行和列控制信号，每个访问控制接口包括数据输出电路以输出对应于给出时分复用传输中的一个存储器访问命令。

6. 发明申请

WO2008131058A2 HYBRID VOLATILE AND NON-VOLATILE MEMORY DEVICE 审中-公开
标题翻译：混合挥发性和非易失性存储器件
公开(公告)号：WO2008131058A2
公开(公告)日：2008-10-30
申请号：PCT/US2008060566
申请日：2008-04-17
申请人： RAMBUS INC , BEST SCOTT
发明人： BEST SCOTT
IPC分类号： G06F13/16
CPC分类号： G11C14/0018 , G06F12/0246 , G06F12/0638 , G06F13/1694
摘要： A composite, hybrid memory device including a first storage die having an array of volatile storage cells and a second storage die having an array of non-volatile storage cells disposed within an integrated circuit package. The hybrid memory device includes a shared interface circuit to receive memory access commands directed to the first storage die and the second storage die and to convey read and write data between an external data path and the first and second storage dice.
摘要翻译：一种复合混合存储器件，包括具有易失性存储单元阵列的第一存储管芯和具有设置在集成电路封装内的非易失性存储单元阵列的第二存储管芯。混合存储器件包括共享接口电路，用于接收指向第一存储管芯和第二存储管芯的存储器访问命令，并且在外部数据通路与第一和第二存储管芯之间传送读取和写入数据。

7. 发明申请

WO2004077524A3 METHOD AND APPARATUS FOR TEST AND CHARACTERIZATION OF SEMICONDUCTOR COMPONENTS 审中-公开
标题翻译：半导体元件测试和表征的方法和装置
公开(公告)号：WO2004077524A3
公开(公告)日：2005-10-27
申请号：PCT/US2004005620
申请日：2004-02-25
申请人： RAMBUS INC , WARE FREDERICK , BEST SCOTT , CHANG TIMOTHY , PEREGO RICHARD , TSERN ELY , MITCHELL JEFF
发明人： WARE FREDERICK , BEST SCOTT , CHANG TIMOTHY , PEREGO RICHARD , TSERN ELY , MITCHELL JEFF
IPC分类号： G01R31/317 , G06F11/24 , H01L21/44
CPC分类号： G11C29/56004 , G01R31/31707 , G06F11/24 , G11C2029/5602
摘要： A method and apparatus for testing and characterizing circuits is provided. In one embodiment, a high-speed interface of a semiconductor component includes high-speed test circuitry. The high-speed test circuitry obviates the need for an external high-speed testing system for testing and characterization. In one embodiment, the high-speed test circuitry includes a test pattern generation circuit, and various differential comparators to compare low bandwidth reference signals with interface signals during testing and characterization. In one embodiment, an interface that includes the test circuitry can test itself or another interface. In one embodiment, a timing reference signal decouples the individual parameters of two interfaces testing each other to avoid any errors introduced by the combination of individual interface circuit parameters, such as receiver parameters and transmitter parameters. The testing can be performed at the wafer stage, at the component stage, and in a system.
摘要翻译：提供了用于测试和表征电路的方法和装置。在一个实施例中，半导体部件的高速接口包括高速测试电路。高速测试电路无需外部高速测试系统进行测试和表征。在一个实施例中，高速测试电路包括测试图形生成电路和各种差分比较器，用于在测试和表征期间将低带宽参考信号与接口信号进行比较。在一个实施例中，包括测试电路的接口可以测试自身或另一接口。在一个实施例中，定时参考信号使彼此测试的两个接口的各个参数解耦，以避免由诸如接收机参数和发射机参数的各个接口电路参数的组合引入的任何错误。测试可以在晶片级，元件级和系统中执行。

8. 发明专利

DE10393657T5 未知
公开(公告)号：DE10393657T5
公开(公告)日：2005-10-20
申请号：DE10393657
申请日：2003-11-03
申请人： RAMBUS INC
发明人： BEST SCOTT
IPC分类号： G11C7/10 , G11C7/22 , G11C11/4076 , G11C11/4096 , G06F13/00

9. 发明专利

AU2003215275A8 Method and apparatus for selectably providing single-ended and differential signaling with controllable impedance and transition time 未知
公开(公告)号：AU2003215275A8
公开(公告)日：2003-09-09
申请号：AU2003215275
申请日：2003-02-19
申请人： RAMBUS INC
发明人： BEST SCOTT , YANG CHIPING
IPC分类号： H04L25/02 , G06F13/40 , H03K5/22 , H03K17/16 , H03K19/003 , H03K19/0185 , H04L25/08 , H04L25/45 , H04Q20060101
摘要： A method and apparatus for selectably providing single-ended and differential signaling with controllable impedance and transition time is provided. According to the method and apparatus, a differential signal can be transmitted over two wires or two single-ended signals can be transmitted over the two wires. According to the method and apparatus, termination may be selected among a single-reference termination, a center termination, or a high-impedance termination. Regardless of the type of termination selected, a capability for dynamic control of the termination impedance is provided. Moreover, an ability to change impedances of termination elements to maintain a desired termination impedance for both single-reference termination and center termination modes by shifting bits is provided. Also, a capability for dynamic control of transition times of signals is provided.

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