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1. 发明授权

US06343337B1 Wide shifting in the vector permute unit 有权
标题翻译：矢量变换单位宽移
公开(公告)号：US06343337B1
公开(公告)日：2002-01-29
申请号：US09572058
申请日：2000-05-17
申请人： Pradeep Kumar Dubey , Brett Olsson , Charles Philip Roth , Keith Everett Diefendorf , Ronald Ray Hochsprung , Hunter Ledbetter Scales, III
发明人： Pradeep Kumar Dubey , Brett Olsson , Charles Philip Roth , Keith Everett Diefendorf , Ronald Ray Hochsprung , Hunter Ledbetter Scales, III
IPC分类号： G06F1300
CPC分类号： G06F7/766 , G06F5/015
摘要： A crossbar is implemented within multimedia facilities of a processor to perform vector permute operations, in which the bytes of a source operand are reordered in the target output. The crossbar is then reused for other instructions requiring multiplexing or shifting operations, particularly those in which the size of additional multiplexers or the size and delay of a barrel shifter is significant. A wide shift operation, for example, may be performed with one cycle latency by the crossbar and one additional layer of multiplexers or a small barrel shifter. The crossbar facility thus gets reused with improved performance of the instructions now sharing the crossbar and a reduction in the total area required by a multimedia facility within a processor.
摘要翻译：在处理器的多媒体设施内实现交叉开关以执行矢量置换操作，其中源操作数的字节在目标输出中重新排序。然后，交叉开关重新用于需要复用或移位操作的其他指令，特别是其中附加多路复用器的大小或桶形移位器的大小和延迟是显着的那些指令。例如，可以通过交叉开关和一个附加的多路复用器层或小桶形移位器以一个周期的等待时间来执行宽移位操作。因此，交叉开关设备被重新使用，现在共享交叉开关的指令的性能得到改善，并且减少处理器内的多媒体设备所需的总面积。

2. 发明授权

US06327651B1 Wide shifting in the vector permute unit 有权
标题翻译：矢量变换单位宽移
公开(公告)号：US06327651B1
公开(公告)日：2001-12-04
申请号：US09149466
申请日：1998-09-08
申请人： Pradeep Kumar Dubey , Brett Olsson , Charles Philip Roth , Keith Everett Diefendorf , Ronald Ray Hochsprung , Hunter Ledbetter Scales, III
发明人： Pradeep Kumar Dubey , Brett Olsson , Charles Philip Roth , Keith Everett Diefendorf , Ronald Ray Hochsprung , Hunter Ledbetter Scales, III
IPC分类号： G06F1500
CPC分类号： G06F7/766 , G06F5/015
摘要： A crossbar is implemented within multimedia facilities of a processor to perform vector permute operations, in which the bytes of a source operand are reordered in the target output. The crossbar is then reused for other instructions requiring multiplexing or shifting operations, particularly those in which the size of additional multiplexers or the size and delay of a barrel shifter is significant. A wide shift operation, for example, may be performed with one cycle latency by the crossbar and one additional layer of multiplexers or a small barrel shifter. The crossbar facility thus gets reused with improved performance of the instructions now sharing the crossbar and a reduction in the total area required by a multimedia facility within a processor.
摘要翻译：在处理器的多媒体设施内实现交叉开关以执行矢量置换操作，其中源操作数的字节在目标输出中重新排序。然后，交叉开关重新用于需要复用或移位操作的其他指令，特别是其中附加多路复用器的大小或桶形移位器的大小和延迟是显着的那些指令。例如，可以通过交叉开关和一个附加的多路复用器层或小桶形移位器以一个周期的等待时间来执行宽移位操作。因此，交叉开关设备被重新使用，现在共享交叉开关的指令的性能得到改善，并且减少处理器内的多媒体设备所需的总面积。

3. 发明授权

US06499116B1 Performance of data stream touch events 失效
标题翻译：数据流触摸事件的性能
公开(公告)号：US06499116B1
公开(公告)日：2002-12-24
申请号：US09282694
申请日：1999-03-31
申请人： Charles Philip Roth , Michael Dean Snyder
发明人： Charles Philip Roth , Michael Dean Snyder
IPC分类号： G06F1100
CPC分类号： G06F9/384 , G06F9/30047 , G06F9/3455 , G06F9/383 , G06F9/3857 , G06F11/3409 , G06F11/3414 , G06F11/348 , G06F12/0862 , G06F2201/86 , G06F2201/865 , G06F2201/88 , G06F2201/885 , G06F2212/6028
摘要： Data stream touch instructions are software-directed asynchronous prefetch instructions that can improve the performance of a system. Ideally, such instructions are used in perfect synchronization with the actual memory fetches that are trying to speed up. In practical situations, it is difficult to predict ahead of time all side effects of these instructions and memory access latency/throughput during execution of any large program. Incorrect usage of such instructions can cause degraded performance of the system. Thus, it is advantageous to measure the performance of such instructions.
摘要翻译：数据流触摸指令是可以提高系统性能的软件定向异步预取指令。理想情况下，这些指令用于与正试图加快的实际内存提取的完美同步。在实际情况下，难以在执行任何大型程序时提前预测这些指令和内存访问延迟/吞吐量的所有副作用。不正确使用此类指令可能导致系统性能下降。因此，测量这些指令的性能是有利的。

4. 发明授权

US06249906B1 Adaptive method and system to minimize the effect of long table walks 失效
标题翻译：自适应方法和系统，以最大限度地减少长桌散步的影响
公开(公告)号：US06249906B1
公开(公告)日：2001-06-19
申请号：US09105581
申请日：1998-06-26
申请人： Frank Eliot Levine , Charles Philip Roth
发明人： Frank Eliot Levine , Charles Philip Roth
IPC分类号： G06N945
CPC分类号： G06F8/4442
摘要： Current software technology entails writing application programs in a high level language intended to facilitate portability to different computer processor platforms. Because the program is portable, the resulting object code is not tailored to run as efficiently as possible on the particular computer processor platform. Manually tuning a specific application program may be done, but it is time consuming and is rarely done by the end user. The disclosed invention provides an automated method of tuning application programs to execute more efficiently. Based on several system parameters provided by the user, the disclosed method comprises profiling an application to determine where significant delays are occurring that result from long table walks, constructing effective address tables to identify the effective addresses associated with the most significant delays, optimizing the placement of preload or touch instructions that initiate execution of identified instructions prior to their placement in the program sequence, building an optimized change file, and applying the optimized change file to the object code. The optimized change file may be inserted into the object code on a real-time basis.
摘要翻译：目前的软件技术需要以高级语言编写应用程序，以便于移植到不同的计算机处理器平台。由于该程序是便携式的，所产生的目标代码不能在特定的计算机处理器平台上尽可能高效地运行。可以手动调整特定的应用程序，但是它是耗时的，并且很少由最终用户完成。所公开的发明提供了一种自动化的方法来调整应用程序以更有效地执行。基于由用户提供的几个系统参数，所公开的方法包括对应用进行轮廓分析，以确定长时间走行造成的显着延迟发生的时间，构建有效的地址表以识别与最重要延迟相关联的有效地址，优化放置的预加载或触摸指令，其在被放置在程序序列之前启动所识别的指令的执行，构建优化的改变文件，以及将优化的改变文件应用于目标代码。优化的更改文件可以被实时地插入到目标代码中。

5. 发明授权

US06519620B1 Saturation select apparatus and method therefor 有权
标题翻译：饱和选择装置及其方法
公开(公告)号：US06519620B1
公开(公告)日：2003-02-11
申请号：US09296877
申请日：1999-04-22
申请人： Huy Van Nguyen , Michael Putrino , Charles Philip Roth
发明人： Huy Van Nguyen , Michael Putrino , Charles Philip Roth
IPC分类号： G06F738
CPC分类号： G06F7/49921 , G06F7/50
摘要： A saturation select apparatus and method are implemented. Late stage logic blocks in an adder are provided which combine saturation select control signals with sum generating signals. A first saturation select control is asserted in response to an unsigned saturated instruction, and a second saturation select control is asserted in response to a signed saturated instruction. If either select control is asserted, each logic block outputs a corresponding bit of a respective saturation value. In response to a modulo mode instruction, both select control signals are negated, and each logic block outputs a corresponding bit of the arithmetic operation (sum or difference) implemented by the instruction.
摘要翻译：实现饱和选择装置和方法。提供加法器中的后级逻辑块，其将饱和选择控制信号与和产生信号组合。响应于无符号饱和指令来确定第一饱和选择控制，并且响应于带符号饱和指令断言第二饱和选择控制。如果选择控制被确认，则每个逻辑块输出相应饱和值的相应位。响应于模数模式指令，两个选择控制信号被否定，并且每个逻辑块输出由该指令实现的算术运算（和或差）的相应位。

6. 发明授权

US5751945A Method and system for performance monitoring stalls to identify pipeline bottlenecks and stalls in a processing system 失效
标题翻译：用于性能监控的方法和系统停止，以识别处理系统中的管道瓶颈和停顿
公开(公告)号：US5751945A
公开(公告)日：1998-05-12
申请号：US538102
申请日：1995-10-02
申请人： Frank Eliot Levine , Charles Philip Roth , Edward Hugh Welbon
发明人： Frank Eliot Levine , Charles Philip Roth , Edward Hugh Welbon
IPC分类号： G06F11/34 , G06F11/00
CPC分类号： G06F11/348 , G06F11/3409 , G06F11/3423 , G06F2201/86 , G06F2201/88 , G06F2201/885
摘要： A method for identifying bottlenecks within a processing system, the processing system including a plurality of performance monitor counters (PMCs) and at least one monitor mode control register (MMCR) to configure the operations of at least one of the PMCs, includes, for a predetermined sampling period, counting a number of cycles that a dispatch unit is stalled, counting a number of cycles that each of a plurality of execution units is stalled, counting a number of cycles that a load/store unit is stalled, and counting a number of cycles that a completion unit is stalled. The counting in the units is performed to identify the relative effect of stalls occurring within each unit during processing to produce an overview of relative effect of the stalling of each unit on the total system bottleneck conditions.
摘要翻译：一种用于识别处理系统内的瓶颈的方法，所述处理系统包括多个性能监视计数器（PMC）和至少一个监视模式控制寄存器（MMCR），用于配置至少一个所述PMC的操作，对分配单元停止的周期数进行计数，对多个执行单元中的每个执行单元停止的周期数进行计数，对加载/存储单元停止的周期数进行计数，并对数量进行计数的完成单位停滞的周期。执行单元中的计数以识别在处理期间在每个单元内发生的失速的相对影响，以产生每个单元的停止对总系统瓶颈条件的相对影响的概述。

7. 发明授权

US06470440B1 Vector compare and maximum/minimum generation apparatus and method therefor 失效
标题翻译：矢量比较和最大/最小生成装置及其方法
公开(公告)号：US06470440B1
公开(公告)日：2002-10-22
申请号：US09315546
申请日：1999-05-20
申请人： Huy Van Nguyen , Charles Philip Roth
发明人： Huy Van Nguyen , Charles Philip Roth
IPC分类号： G06F9305
CPC分类号： G06F9/30021 , G06F9/30036
摘要： An apparatus for compare and maximum/minimum and a method therefor are implemented. Selection circuitry selects a data value signal for outputting between an a pair of vector operands and “true” and “false” comparison value signals for the corresponding operand data type. Each input operand may include a plurality of subvector operands of a preselected data type, each data type has having a corresponding length. The selection circuitry selects the data value signal in response to a plurality of second signals. The second signals are generated from carry-out signals from the subvector operands, and first signals that are generated using instruction information for the executing instruction. The second signals may be generated by logically combining the first signals with carry propagate, carry generate and carry-out signals from carry lookahead logic receiving the subvector operands as input.
摘要翻译：实现了比较和最大/最小的装置及其方法。选择电路选择用于在一对矢量操作数之间输出的数据值信号，以及对应的操作数数据类型的“真”和“假”比较值信号。每个输入操作数可以包括预选数据类型的多个子向量操作数，每个数据类型具有相应的长度。选择电路响应多个第二信号选择数据值信号。第二信号是从子载波操作数的进位信号和使用执行指令的指令信息产生的第一信号产生的。第二信号可以通过逻辑地组合第一信号与进位传播来产生，从接收子载波操作数作为输入的进位先行逻辑进行产生和执行信号。

8. 发明授权

US5970439A Performance monitoring in a data processing system 失效
标题翻译：数据处理系统中的性能监控
公开(公告)号：US5970439A
公开(公告)日：1999-10-19
申请号：US816626
申请日：1997-03-13
申请人： Frank Eliot Levine , Charles Philip Roth , Edward Hugh Welbon , Jack Chris Randolph
发明人： Frank Eliot Levine , Charles Philip Roth , Edward Hugh Welbon , Jack Chris Randolph
IPC分类号： G06F11/34 , G06F12/00
CPC分类号： G06F11/3409 , G06F11/348 , G06F2201/81 , G06F2201/86 , G06F2201/88 , G06F2201/885
摘要： Performance monitoring capabilities are expanded to an entire data processing system so that performance analyses can be made for operations occurring within the entire data processing system and not merely within the processor or any other device containing the performance monitor. Therefore, there is a provision for communicating performance monitor-related signals between the various performance monitors within the various devices and processor within a data processing system.
摘要翻译：性能监控功能扩展到整个数据处理系统，以便可以对整个数据处理系统中发生的操作进行性能分析，而不仅仅是处理器或包含性能监视器的任何其他设备。因此，存在用于在数据处理系统内的各种设备和处理器内的各种性能监视器之间传送性能监视器相关信号的规定。

9. 发明授权

US5961654A Operand fetch bandwidth analysis 失效
标题翻译：操作数获取带宽分析
公开(公告)号：US5961654A
公开(公告)日：1999-10-05
申请号：US767706
申请日：1996-12-17
申请人： Frank Eliot Levine , Roy Stuart Moore , Charles Philip Roth , Edward Hugh Welbon
发明人： Frank Eliot Levine , Roy Stuart Moore , Charles Philip Roth , Edward Hugh Welbon
IPC分类号： G06F11/34 , G06F11/30
CPC分类号： G06F11/3409 , G06F11/3452 , G06F11/348 , G06F2201/81 , G06F2201/86 , G06F2201/88 , G06F2201/885
摘要： A performance monitor implementing a plurality of counters counts several events to provide an instruction fetch bandwidth analysis, a cycles per instruction (CPI) infinite and finite analysis, an operand fetch bandwidth analysis, an instruction parallelism analysis, and a trailing edge analysis. Such analyses are performed on the performance of a data processing system in order that the designer may develop an improved processor architecture.
摘要翻译：实现多个计数器的性能监视器计数几个事件以提供指令获取带宽分析，每个指令的周期（CPI）无限和有限分析，操作数获取带宽分析，指令并行性分析和后沿分析。对数据处理系统的性能执行这样的分析，以便设计者可以开发改进的处理器架构。

10. 发明授权

US5881306A Instruction fetch bandwidth analysis 失效
标题翻译：指令提取带宽分析
公开(公告)号：US5881306A
公开(公告)日：1999-03-09
申请号：US767705
申请日：1996-12-17
申请人： Frank Eliot Levine , Roy Stuart Moore , Charles Philip Roth , Edward Hugh Welbon
发明人： Frank Eliot Levine , Roy Stuart Moore , Charles Philip Roth , Edward Hugh Welbon
IPC分类号： G06F11/34 , G06F15/00
CPC分类号： G06F11/3409 , G06F11/348 , G06F2201/81 , G06F2201/86 , G06F2201/88 , G06F2201/885
摘要： A performance monitor implementing a plurality of counters counts several events to provide an instruction fetch bandwidth analysis, a cycles per instruction (CPI) infinite and finite analysis, an operand fetch bandwidth analysis, an instruction parallelism analysis, and a trailing edge analysis. Such analyses are performed on the performance of a data processing system in order that the designer may develop an improved processor architecture.
摘要翻译：实现多个计数器的性能监视器计数几个事件以提供指令获取带宽分析，每个指令的周期（CPI）无限和有限分析，操作数获取带宽分析，指令并行性分析和后沿分析。对数据处理系统的性能执行这样的分析，以便设计者可以开发改进的处理器架构。

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