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1. 发明授权

US07807225B2 High density plasma non-stoichiometric SiOxNy films 有权
标题翻译：高密度等离子体非化学计量的SiOxNy薄膜
公开(公告)号：US07807225B2
公开(公告)日：2010-10-05
申请号：US11698623
申请日：2007-01-26
申请人： Pooran Chandra Joshi , Apostolos T. Voutsas , John W. Hartzell
发明人： Pooran Chandra Joshi , Apostolos T. Voutsas , John W. Hartzell
IPC分类号： C23C16/00
CPC分类号： G02B1/10 , C23C16/308 , C23C16/509 , G02B1/11
摘要： A high-density plasma method is provided for forming a SiOXNY thin-film. The method provides a substrate and introduces a silicon (Si) precursor. A thin-film is deposited overlying the substrate, using a high density (HD) plasma-enhanced chemical vapor deposition (PECVD) process. As a result, a SiOXNY thin-film is formed, where (X+Y 0). The SiOXNY thin-film can be stoichiometric or non-stoichiometric. The SiOXNY thin-film can be graded, meaning the values of X and Y vary with the thickness of the SiOXNY thin-film. Further, the process enables the in-situ deposition of a SiOXNY thin-film multilayer structure, where the different layers may be stoichiometric, non-stoichiometric, graded, and combinations of the above-mentioned types of SiOXNY thin-films.
摘要翻译：提供了用于形成SiOXNY薄膜的高密度等离子体方法。该方法提供衬底并引入硅（Si）前体。使用高密度（HD）等离子体增强化学气相沉积（PECVD）工艺将薄膜沉积在衬底上。结果，形成SiOXNY薄膜，其中（X + Y <2和Y> 0）。 SiOXNY薄膜可以是化学计量的或非化学计量的。 SiOXNY薄膜可以分级，这意味着X和Y的值随SiOXNY薄膜的厚度而变化。此外，该方法能够实现SiOXNY薄膜多层结构的原位沉积，其中不同的层可以是化学计量的，非化学计量的，分级的，以及上述类型的SiOXNY薄膜的组合。

2. 发明授权

US07723781B2 Vertical thin-film transistor with enhanced gate oxide 有权
标题翻译：具有增强栅极氧化物的垂直薄膜晶体管
公开(公告)号：US07723781B2
公开(公告)日：2010-05-25
申请号：US12108333
申请日：2008-04-23
申请人： Pooran Chandra Joshi , Apostolos T. Voutsas , John W. Hartzell
发明人： Pooran Chandra Joshi , Apostolos T. Voutsas , John W. Hartzell
IPC分类号： H01L29/78
CPC分类号： H01L29/78642 , C23C16/24 , C23C16/45523 , C23C16/509 , H01L21/02164 , H01L21/0234 , H01L21/049 , H01L21/31612 , H01L29/66666 , H01L29/6675
摘要： A method is provided for forming a low-temperature vertical gate insulator in a vertical thin-film transistor (V-TFT) fabrication process. The method comprises: forming a gate, having vertical sidewalls and a top surface, overlying a substrate insulation layer; depositing a silicon oxide thin-film gate insulator overlying the gate; plasma oxidizing the gate insulator at a temperature of less than 400° C., using a high-density plasma source; forming a first source/drain region overlying the gate top surface; forming a second source/drain region overlying the substrate insulation layer, adjacent a first gate sidewall; and, forming a channel region overlying the first gate sidewall, in the gate insulator interposed between the first and second source/drain regions. When the silicon oxide thin-film gate insulator is deposited overlying the gate a Si oxide layer, a low temperature deposition process can be used, so that a step-coverage of greater than 65% can be obtained.
摘要翻译：提供一种用于在垂直薄膜晶体管（V-TFT）制造工艺中形成低温垂直栅极绝缘体的方法。该方法包括：形成具有垂直侧壁和顶表面的栅极，覆盖衬底绝缘层; 沉积覆盖栅极的氧化硅薄膜栅极绝缘体; 使用高密度等离子体源在低于400℃的温度下等离子体氧化栅极绝缘体; 形成覆盖所述栅极顶表面的第一源极/漏极区域; 在第一栅极侧壁附近形成覆盖衬底绝缘层的第二源极/漏极区域; 以及在位于第一和第二源极/漏极区之间的栅极绝缘体中形成覆盖第一栅极侧壁的沟道区。当氧化硅薄膜栅极绝缘体沉积在栅极上覆盖Si氧化物层时，可以使用低温沉积工艺，从而可以获得大于65％的阶梯覆盖率。

3. 发明授权

US07544625B2 Silicon oxide thin-films with embedded nanocrystalline silicon 有权
标题翻译：具有嵌入式纳米晶硅的氧化硅薄膜
公开(公告)号：US07544625B2
公开(公告)日：2009-06-09
申请号：US11418273
申请日：2006-05-04
申请人： Pooran Chandra Joshi , Tingkai Li , Yoshi Ono , Apostolos T. Voutsas , John W. Hartzell
发明人： Pooran Chandra Joshi , Tingkai Li , Yoshi Ono , Apostolos T. Voutsas , John W. Hartzell
IPC分类号： H01L21/31
CPC分类号： H01L21/31608 , C23C16/30 , C23C16/401 , C23C16/402 , C23C16/505 , C23C16/56 , H01L21/02164 , H01L21/02274 , H01L21/02337 , H01L21/0234
摘要： A method is provided for forming a silicon oxide (SiOx) thin-film with embedded nanocrystalline silicon (Si). The method deposits SiOx, where x is in the range of 1 to 2, overlying a substrate, using a high-density (HD) plasma-enhanced chemical vapor deposition (PECVD) process. As a result, the SiOx thin-film is embedded with nanocrystalline Si. The HD PECVD process may use an inductively coupled plasma (ICP) source, a substrate temperature of less than about 400° C., and an oxygen source gas with a silicon precursor. In one aspect, a hydrogen source gas and an inert gas are used, where the ratio of oxygen source gas to inert gas is in the range of about 0.02 to 5. The SiOx thin-film with embedded nanocrystalline Si typically has a refractive index in the range of about 1.6 to 2.2, with an extinction coefficient in the range of 0 to 0.5.
摘要翻译：提供了一种用嵌入式纳米晶硅（Si）形成氧化硅（SiOx）薄膜的方法。该方法使用高密度（HD）等离子体增强化学气相沉积（PECVD）工艺沉积SiO x，其中x在1至2的范围内，覆盖在衬底上。结果，SiO x薄膜埋入有纳米晶体Si。 HD PECVD工艺可以使用电感耦合等离子体（ICP）源，小于约400℃的衬底温度，以及具有硅前体的氧源气体。一方面，使用氢源气体和惰性气体，其中氧源气体与惰性气体的比例在约0.02至5的范围内。具有嵌入的纳米晶体硅的SiO x薄膜通常具有折射率约1.6至2.2的范围，消光系数在0至0.5的范围内。

4. 发明授权

US07381595B2 High-density plasma oxidation for enhanced gate oxide performance 有权
标题翻译：高密度等离子体氧化，提高栅极氧化性能
公开(公告)号：US07381595B2
公开(公告)日：2008-06-03
申请号：US11139726
申请日：2005-05-26
申请人： Pooran Chandra Joshi , Apostolos T. Voutsas , John W. Hartzell
发明人： Pooran Chandra Joshi , Apostolos T. Voutsas , John W. Hartzell
IPC分类号： H01L21/00
CPC分类号： H01L29/78642 , C23C16/24 , C23C16/45523 , C23C16/509 , H01L21/02164 , H01L21/0234 , H01L21/049 , H01L21/31612 , H01L29/66666 , H01L29/6675
摘要： A method is provided for forming a low-temperature vertical gate insulator in a vertical thin-film transistor (V-TFT) fabrication process. The method comprises: forming a gate, having vertical sidewalls and a top surface, overlying a substrate insulation layer; depositing a silicon oxide thin-film gate insulator overlying the gate; plasma oxidizing the gate insulator at a temperature of less than 400° C., using a high-density plasma source; forming a first source/drain region overlying the gate top surface; forming a second source/drain region overlying the substrate insulation layer, adjacent a first gate sidewall; and, forming a channel region overlying the first gate sidewall, in the gate insulator interposed between the first and second source/drain regions. When the silicon oxide thin-film gate insulator is deposited overlying the gate a Si oxide layer, a low temperature deposition process can be used, so that a step-coverage of greater than 65% can be obtained.
摘要翻译：提供一种用于在垂直薄膜晶体管（V-TFT）制造工艺中形成低温垂直栅极绝缘体的方法。该方法包括：形成具有垂直侧壁和顶表面的栅极，覆盖衬底绝缘层; 沉积覆盖栅极的氧化硅薄膜栅极绝缘体; 使用高密度等离子体源在低于400℃的温度下等离子体氧化栅极绝缘体; 形成覆盖所述栅极顶表面的第一源极/漏极区域; 在第一栅极侧壁附近形成覆盖衬底绝缘层的第二源极/漏极区域; 以及在位于第一和第二源极/漏极区之间的栅极绝缘体中形成覆盖第一栅极侧壁的沟道区。当氧化硅薄膜栅极绝缘体沉积在栅极上覆盖Si氧化物层时，可以使用低温沉积工艺，从而可以获得大于65％的阶梯覆盖率。

5. 发明授权

US07122488B2 High density plasma process for the formation of silicon dioxide on silicon carbide substrates 有权
标题翻译：用于在碳化硅衬底上形成二氧化硅的高密度等离子体工艺
公开(公告)号：US07122488B2
公开(公告)日：2006-10-17
申请号：US10812591
申请日：2004-03-29
申请人： Pooran Chandra Joshi , Apostolos T. Voutsas , John W. Hartzell
发明人： Pooran Chandra Joshi , Apostolos T. Voutsas , John W. Hartzell
IPC分类号： H01L21/469 , H01L21/31
CPC分类号： H01L21/049 , C23C16/0272 , C23C16/402 , C23C16/509 , H01L21/02164 , H01L21/0223 , H01L21/02238 , H01L21/02252 , H01L21/02274 , H01L21/045 , H01L21/31612
摘要： Methods are provided for forming silicon dioxide (SiO2) on a silicon carbide (SiC) substrate. The method comprises: providing a SiC substrate; supplying an atmosphere including oxygen; performing a high-density (HD) plasma-based process; and, forming a SiO2 layer overlying the SiC substrate. Typically, performing the HD plasma-based process includes connecting a top electrode to an inductively coupled HD plasma source. In one aspect, SiO2 is grown on the SiC substrate. Then, an HD plasma oxidation process is performed that creates a reactive oxygen species and breaks the Si—C bonds in the SiC substrate, to form free Si and C atoms in the SiC substrate. The free Si atoms in the SiC substrate are bonded to the HD plasma-generated reactive oxygen species, and the SiO2 layer is grown.
摘要翻译：提供了在碳化硅（SiC）衬底上形成二氧化硅（SiO 2）的方法。该方法包括：提供SiC衬底; 提供包含氧气的气氛; 执行高密度（HD）等离子体工艺; 并且形成覆盖在SiC衬底上的SiO 2层。通常，执行基于HD等离子体的工艺包括将顶部电极连接到电感耦合的HD等离子体源。在一个方面，在SiC衬底上生长SiO 2。然后，进行HD等离子体氧化处理，其产生活性氧物质并破坏SiC衬底中的Si-C键，以在SiC衬底中形成游离的Si和C原子。 SiC衬底中的自由Si原子与HD等离子体产生的活性氧结合，并且生长SiO 2层。

6. 发明授权

US07446023B2 High-density plasma hydrogenation 失效
标题翻译：高密度等离子体氢化
公开(公告)号：US07446023B2
公开(公告)日：2008-11-04
申请号：US11013605
申请日：2004-12-15
申请人： Pooran Chandra Joshi , Apostolos T. Voutsas , John W. Hartzell
发明人： Pooran Chandra Joshi , Apostolos T. Voutsas , John W. Hartzell
IPC分类号： H01L21/332
CPC分类号： H01L21/02164 , C23C16/24 , C23C16/45523 , C23C16/509 , H01L21/022 , H01L21/02274 , H01L21/02323 , H01L21/0234 , H01L21/02381 , H01L21/0242 , H01L21/02422 , H01L21/0245 , H01L21/02532 , H01L21/28194 , H01L21/28211 , H01L21/3003 , H01L21/31612 , H01L29/4908 , H01L29/513 , H01L29/78609
摘要： A high-density plasma hydrogenation method is provided. Generally, the method comprises: forming a silicon (Si)/oxide stack layer; plasma oxidizing the Si/oxide stack at a temperature of less than 400° C., using a high density plasma source, such as an inductively coupled plasma (ICP) source; introducing an atmosphere including H2 at a system pressure up to 500 milliTorr; hydrogenating the stack at a temperature of less than 400 degrees C., using the high density plasma source; and forming an electrode overlying the oxide. The electrode may be formed either before or after the hydrogenation. The Si/oxide stack may be formed in a number of ways. In one aspect, a Si layer is formed, and the silicon layer is plasma oxidized at a temperature of less than 400 degrees C., using an ICP source. The oxide formation, additional oxidation, and hydrogenation steps can be conducted in-situ in a common chamber.
摘要翻译：提供了高密度等离子体加氢方法。通常，该方法包括：形成硅（Si）/氧化物堆叠层; 使用诸如电感耦合等离子体（ICP）源的高密度等离子体源，在小于400℃的温度下等离子体氧化Si /氧化物堆叠; 在系统压力高达500毫托的地方引入包括H2的气氛; 使用高密度等离子体源在小于400摄氏度的温度下对叠层进行氢化; 并形成覆盖氧化物的电极。电极可以在氢化之前或之后形成。 Si /氧化物堆叠可以以多种方式形成。在一个方面，使用ICP源形成Si层，并且在低于400℃的温度下对硅层进行等离子体氧化。氧化物形成，附加氧化和氢化步骤可以在公共室中原位进行。

7. 发明申请

US20080224205A1 Vertical Thin-Film Transistor with Enhanced Gate Oxide 有权
标题翻译：具有增强型栅极氧化物的垂直薄膜晶体管
公开(公告)号：US20080224205A1
公开(公告)日：2008-09-18
申请号：US12108333
申请日：2008-04-23
申请人： Pooran Chandra Joshi , Apostolos T. Voutsas , John W. Hartzell
发明人： Pooran Chandra Joshi , Apostolos T. Voutsas , John W. Hartzell
IPC分类号： H01L29/786 , H01L29/41
CPC分类号： H01L29/78642 , C23C16/24 , C23C16/45523 , C23C16/509 , H01L21/02164 , H01L21/0234 , H01L21/049 , H01L21/31612 , H01L29/66666 , H01L29/6675
摘要： A method is provided for forming a low-temperature vertical gate insulator in a vertical thin-film transistor (V-TFT) fabrication process. The method comprises: forming a gate, having vertical sidewalls and a top surface, overlying a substrate insulation layer; depositing a silicon oxide thin-film gate insulator overlying the gate; plasma oxidizing the gate insulator at a temperature of less than 400° C., using a high-density plasma source; forming a first source/drain region overlying the gate top surface; forming a second source/drain region overlying the substrate insulation layer, adjacent a first gate sidewall; and, forming a channel region overlying the first gate sidewall, in the gate insulator interposed between the first and second source/drain regions. When the silicon oxide thin-film gate insulator is deposited overlying the gate a Si oxide layer, a low temperature deposition process can be used, so that a step-coverage of greater than 65% can be obtained.
摘要翻译：提供一种用于在垂直薄膜晶体管（V-TFT）制造工艺中形成低温垂直栅极绝缘体的方法。该方法包括：形成具有垂直侧壁和顶表面的栅极，覆盖衬底绝缘层; 沉积覆盖栅极的氧化硅薄膜栅极绝缘体; 使用高密度等离子体源在低于400℃的温度下等离子体氧化栅极绝缘体; 形成覆盖所述栅极顶表面的第一源极/漏极区域; 在第一栅极侧壁附近形成覆盖衬底绝缘层的第二源极/漏极区域; 以及在位于第一和第二源极/漏极区之间的栅极绝缘体中形成覆盖第一栅极侧壁的沟道区。当氧化硅薄膜栅极绝缘体沉积在栅极上覆盖Si氧化物层时，可以使用低温沉积工艺，从而可以获得大于65％的阶梯覆盖率。

8. 发明授权

US07723242B2 Enhanced thin-film oxidation process 有权
标题翻译：增强薄膜氧化工艺
公开(公告)号：US07723242B2
公开(公告)日：2010-05-25
申请号：US11327612
申请日：2006-01-06
申请人： Pooran Chandra Joshi , Apostolos T. Voutsas , John W. Hartzell
发明人： Pooran Chandra Joshi , Apostolos T. Voutsas , John W. Hartzell
IPC分类号： H01L21/469
CPC分类号： H01L21/31608 , H01L21/02164 , H01L21/02323 , H01L21/0234 , H01L21/02359 , H01L21/3105 , H01L21/31662
摘要： A method is provided for additionally oxidizing a thin-film oxide. The method includes: providing a substrate; depositing an MyOx (M oxide) layer overlying the substrate, where M is a solid element having an oxidation state in a range of +2 to +5; treating the MyOx layer to a high density plasma (HDP) source; and, forming an MyOk layer in response to the HDP source, where k>x. In one aspect, the method further includes decreasing the concentration of oxide charge in response to forming the MyOk layer. In another aspect, the MyOx layer is deposited with an impurity N, and the method further includes creating volatile N oxides in response to forming the MyOk layer. For example, the impurity N may be carbon and the method creates a volatile carbon oxide.
摘要翻译：提供了另外氧化薄膜氧化物的方法。该方法包括：提供衬底; 沉积覆盖衬底的MyOx（M氧化物）层，其中M是具有+2至+5范围内的氧化态的固体元素; 将MyOx层处理成高密度等离子体（HDP）源; 并且响应于HDP源形成MyOk层，其中k> x。在一个方面，该方法还包括响应于形成MyOk层而降低氧化物电荷的浓度。在另一方面，MyOx层沉积有杂质N，并且该方法还包括响应于形成MyOk层而产生挥发性N氧化物。例如，杂质N可以是碳，并且该方法产生挥发性碳氧化物。

9. 发明申请

US20080266689A1 Non-stoichiometric SiOxNy optical filters 审中-公开
标题翻译：非化学计量的SiOxNy光学滤光片
公开(公告)号：US20080266689A1
公开(公告)日：2008-10-30
申请号：US11789947
申请日：2007-04-26
申请人： Pooran Chandra Joshi , Apostolos T. Voutsas , John W. Hartzell
发明人： Pooran Chandra Joshi , Apostolos T. Voutsas , John W. Hartzell
IPC分类号： G02B5/22 , B32B19/00 , B32B5/16
CPC分类号： G02B5/286 , Y10T428/259
摘要： A non-stoichiometric SiOXNY thin-film optical filter is provided. The filter is formed from a substrate and a first non-stoichiometric SiOX1NY1 thin-film overlying the substrate, where (X1+Y1 0). The first non-stoichiometric SiOX1NY1 thin-film has a refractive index (n1) in the range of about 1.46 to 3, and complex refractive index (N1=n1+ik1), where k1 is an extinction coefficient in a range of about 0 to 0.5. The first non-stoichiometric SiOX1NY1 thin-film may be either intrinsic or doped. In one aspect, the first non-stoichiometric SiOX1NY1 thin-film has nanoparticles with a size in the range of about 1 to 10 nm. A second non-stoichiometric SiOX2NY2 thin-film may overlie the first non-stoichiometric SiOX1NY1 thin-film, where Y1≠Y2. The second non-stoichiometric SiOX1NY1 thin-film may be intrinsic and doped. In another variation, a stoichiometric SiOX2NY2 thin-film, intrinsic or doped, overlies the first non-stoichiometric SiOX1NY1 thin-film.
摘要翻译：提供非化学计量的SiO x N Y Y薄膜滤光器。过滤器由衬底和覆盖在衬底上的第一非化学计量的SiO x N x N 1 N 1薄膜形成，其中（X1 + Y1 <2和Y1> 0）。第一非化学计量的SiO x N 1 N 1薄膜的折射率（n1）在约1.46至3的范围内，并且复数折射率（N1 = n1 + ik1），其中k1是约0至0.5范围内的消光系数。第一非化学计量的SiO x N 1 N 1 X 1薄膜可以是固有的或掺杂的。在一个方面，第一非化学计量的SiO x N 1 N 1薄膜具有尺寸在约1nm至10nm范围内的纳米颗粒。第二非化学计量的SiO 2 X 2 N 2 O 2薄膜可以覆盖在第一非化学计量的SiO x N 1 N SUB 2 / >薄膜，其中Y1 <> Y2。第二非化学计量的SiO x N 1 N 1 Y 1薄膜可以是固有的和掺杂的。在另一个实施方式中，本征或掺杂的化学计量的SiO 2 X 2 N 2 O 2薄膜覆盖在第一非化学计量的SiO x N N > Y1 薄膜。

10. 发明授权

US07186663B2 High density plasma process for silicon thin films 失效
标题翻译：硅薄膜的高密度等离子体工艺
公开(公告)号：US07186663B2
公开(公告)日：2007-03-06
申请号：US10871939
申请日：2004-06-17
申请人： Pooran Chandra Joshi , Apostolos T. Voutsas , John W. Hartzell
发明人： Pooran Chandra Joshi , Apostolos T. Voutsas , John W. Hartzell
IPC分类号： H01L21/31
CPC分类号： C23C16/24 , C23C16/45523 , C23C16/509 , H01L21/02422 , H01L21/0245 , H01L21/02532 , H01L21/0262 , H01L21/049 , H01L21/31612
摘要： A method is provided for forming a Si and Si—Ge thin films. The method comprises: providing a low temperature substrate material of plastic or glass; supplying an atmosphere; performing a high-density (HD) plasma process, such as an HD PECVD process using an inductively coupled plasma (ICP) source; maintaining a substrate temperature of 400 degrees C., or less; and, forming a semiconductor layer overlying the substrate that is made from Si or Si-germanium. The HD PECVD process is capable of depositing Si at a rate of greater than 100 Å per minute. The substrate temperature can be as low as 50 degrees C. Microcrystalline Si, a-Si, or a polycrystalline Si layer can be formed over the substrate. Further, the deposited Si can be either intrinsic or doped. Typically, the supplied atmosphere includes Si and H. For example, an atmosphere can be supplied including SiH4 and H2, or comprising H2 and Silane with H2/Silane ratio in the range of 0–100.
摘要翻译：提供了形成Si和Si-Ge薄膜的方法。该方法包括：提供塑料或玻璃的低温基材; 提供气氛; 执行高密度（HD）等离子体处理，例如使用电感耦合等离子体（ICP）源的HD PECVD工艺; 保持基板温度在400摄氏度以下; 并且形成由Si或Si-锗制成的衬底上的半导体层。 HD PECVD工艺能够以每分钟大于100埃的速率沉积Si。衬底温度可以低至50摄氏度。可以在衬底上形成微晶Si，a-Si或多晶Si层。此外，沉积的Si可以是固有的或掺杂的。通常，供给的气氛包括Si和H.例如，可以提供包括SiH 4和H 2的气体，或者包含H 2和硅烷，H 2 /硅烷比在0-100范围内。

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