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    • 1. 发明授权
    • High density plasma non-stoichiometric SiOxNy films
    • 高密度等离子体非化学计量的SiOxNy薄膜
    • US07807225B2
    • 2010-10-05
    • US11698623
    • 2007-01-26
    • Pooran Chandra JoshiApostolos T. VoutsasJohn W. Hartzell
    • Pooran Chandra JoshiApostolos T. VoutsasJohn W. Hartzell
    • C23C16/00
    • G02B1/10C23C16/308C23C16/509G02B1/11
    • A high-density plasma method is provided for forming a SiOXNY thin-film. The method provides a substrate and introduces a silicon (Si) precursor. A thin-film is deposited overlying the substrate, using a high density (HD) plasma-enhanced chemical vapor deposition (PECVD) process. As a result, a SiOXNY thin-film is formed, where (X+Y 0). The SiOXNY thin-film can be stoichiometric or non-stoichiometric. The SiOXNY thin-film can be graded, meaning the values of X and Y vary with the thickness of the SiOXNY thin-film. Further, the process enables the in-situ deposition of a SiOXNY thin-film multilayer structure, where the different layers may be stoichiometric, non-stoichiometric, graded, and combinations of the above-mentioned types of SiOXNY thin-films.
    • 提供了用于形成SiOXNY薄膜的高密度等离子体方法。 该方法提供衬底并引入硅(Si)前体。 使用高密度(HD)等离子体增强化学气相沉积(PECVD)工艺将薄膜沉积在衬底上。 结果,形成SiOXNY薄膜,其中(X + Y <2和Y> 0)。 SiOXNY薄膜可以是化学计量的或非化学计量的。 SiOXNY薄膜可以分级,这意味着X和Y的值随SiOXNY薄膜的厚度而变化。 此外,该方法能够实现SiOXNY薄膜多层结构的原位沉积,其中不同的层可以是化学计量的,非化学计量的,分级的,以及上述类型的SiOXNY薄膜的组合。
    • 2. 发明授权
    • Oxide interface with improved oxygen bonding
    • 具有改善氧键的氧化物界面
    • US07759736B2
    • 2010-07-20
    • US11524783
    • 2006-09-21
    • Pooran Chandra Joshi
    • Pooran Chandra Joshi
    • H01L27/01
    • H01L29/78603H01L29/4908H01L29/66757H01L29/78609
    • A deposition oxide interface with improved oxygen bonding and a method for bonding oxygen in an oxide layer are provided. The method includes depositing an M oxide layer where M is a first element selected from a group including elements chemically defined as a solid and having an oxidation state in a range of +2 to +5, plasma oxidizing the M oxide layer at a temperature of less than 400° C. using a high density plasma source, and in response to plasma oxidizing the M oxide layer, improving M-oxygen bonding in the M oxide layer. The plasma oxidation process diffuses excited oxygen radicals into the oxide layer. The plasma oxidation is performed at specified parameters including temperature, power density, pressure, process gas composition, and process gas flow. In some aspects of the method, M is silicon, and the oxide interface is incorporated into a thin film transistor.
    • 提供具有改善的氧键的沉积氧化物界面和氧化层中的氧键合方法。 该方法包括沉积M氧化物层,其中M是选自化学上定义为固体且具有+2至+5范围内的氧化态的元素的第一元素,在氧化层中氧化氧化层的温度为 小于400℃,使用高密度等离子体源,并且响应于等离子体氧化M氧化物层,改善M氧化物层中的M-氧键。 等离子体氧化过程将激发的氧自由基扩散到氧化物层中。 等离子体氧化在包括温度,功率密度,压力,工艺气体成分和工艺气体流量在内的特定参数下进行。 在该方法的一些方面,M是硅,并且氧化物界面被结合到薄膜晶体管中。
    • 3. 发明授权
    • Graded junction silicon nanocrystal embedded silicon oxide electroluminescence device
    • 分级结硅纳米晶体嵌入式氧化硅电致发光器件
    • US07723913B2
    • 2010-05-25
    • US12168771
    • 2008-07-07
    • Vincenzo CasasantaApostolos T. VoutsasPooran Chandra Joshi
    • Vincenzo CasasantaApostolos T. VoutsasPooran Chandra Joshi
    • H01L21/00H01L21/20H01J1/62H01J9/24
    • C23C16/30C23C16/24C23C16/401C23C16/505C23C16/56H01L21/02532H01L21/02595
    • A silicon (Si) nanocrystal embedded Si oxide electroluminescence (EL) device and associated fabrication process are presented. The method provides a substrate bottom electrode, and forms a plurality of Si nanocrystal embedded SiOx film layers overlying the bottom electrode, where X is less than 2. Each SiOx film layer has a Si excess concentration in a range of about 5 to 30%. The outside film layers sandwich an inner film layer having a lower concentration of Si nanocrystals. Alternately stated, the outside Si nanocrystal embedded SiOx film layers have a higher electrical conductivity than a sandwiched inner film layer. A transparent top electrode is formed over the plurality of Si nanocrystal embedded SiOx film layers. The plurality of Si nanocrystal embedded SiOx film layers are deposited using a high density plasma-enhanced chemical vapor deposition (HD PECVD) process. The HD PECVD process initially deposits SiOx film layers, which are subsequently annealed.
    • 介绍了一种硅(Si)纳米晶体内置Si氧化物电致发光(EL)器件及其制造工艺。 该方法提供衬底底部电极,并且形成多个覆盖底部电极的Si纳米晶体的嵌入的SiO x膜层,其中X小于2.每个SiO x膜层的Si过量浓度在约5-30%的范围内。 外层膜层叠具有较低浓度的Si纳米晶体的内膜层。 或者说,外部Si纳米晶体埋入的SiOx膜层具有比夹层内膜层更高的导电性。 在多个Si纳米晶体嵌入的SiOx膜层上形成透明顶部电极。 使用高密度等离子体增强化学气相沉积(HD PECVD)工艺沉积多个Si纳米晶体嵌入的SiOx膜层。 HD PECVD工艺首先沉积SiO x膜层,随后退火。
    • 4. 发明授权
    • Vertical thin-film transistor with enhanced gate oxide
    • 具有增强栅极氧化物的垂直薄膜晶体管
    • US07723781B2
    • 2010-05-25
    • US12108333
    • 2008-04-23
    • Pooran Chandra JoshiApostolos T. VoutsasJohn W. Hartzell
    • Pooran Chandra JoshiApostolos T. VoutsasJohn W. Hartzell
    • H01L29/78
    • H01L29/78642C23C16/24C23C16/45523C23C16/509H01L21/02164H01L21/0234H01L21/049H01L21/31612H01L29/66666H01L29/6675
    • A method is provided for forming a low-temperature vertical gate insulator in a vertical thin-film transistor (V-TFT) fabrication process. The method comprises: forming a gate, having vertical sidewalls and a top surface, overlying a substrate insulation layer; depositing a silicon oxide thin-film gate insulator overlying the gate; plasma oxidizing the gate insulator at a temperature of less than 400° C., using a high-density plasma source; forming a first source/drain region overlying the gate top surface; forming a second source/drain region overlying the substrate insulation layer, adjacent a first gate sidewall; and, forming a channel region overlying the first gate sidewall, in the gate insulator interposed between the first and second source/drain regions. When the silicon oxide thin-film gate insulator is deposited overlying the gate a Si oxide layer, a low temperature deposition process can be used, so that a step-coverage of greater than 65% can be obtained.
    • 提供一种用于在垂直薄膜晶体管(V-TFT)制造工艺中形成低温垂直栅极绝缘体的方法。 该方法包括:形成具有垂直侧壁和顶表面的栅极,覆盖衬底绝缘层; 沉积覆盖栅极的氧化硅薄膜栅极绝缘体; 使用高密度等离子体源在低于400℃的温度下等离子体氧化栅极绝缘体; 形成覆盖所述栅极顶表面的第一源极/漏极区域; 在第一栅极侧壁附近形成覆盖衬底绝缘层的第二源极/漏极区域; 以及在位于第一和第二源极/漏极区之间的栅极绝缘体中形成覆盖第一栅极侧壁的沟道区。 当氧化硅薄膜栅极绝缘体沉积在栅极上覆盖Si氧化物层时,可以使用低温沉积工艺,从而可以获得大于65%的阶梯覆盖率。
    • 6. 发明申请
    • Micro-pixelated fluid-assay precursor structure
    • 微像素化流体测定前体结构
    • US20080079663A1
    • 2008-04-03
    • US11821148
    • 2007-06-22
    • John W. HartzellPooran Chandra JoshiPaul J. Schuele
    • John W. HartzellPooran Chandra JoshiPaul J. Schuele
    • G09G3/20
    • G06Q10/08G06Q40/04
    • A pixel-by-pixel, digitally-addressable, pixelated, precursor, fluid-assay, active-matrix micro-structure including plural pixels formed on a substrate, wherein each pixel includes (a) at least one non-functionalized, digitally-addressable assay sensor, and (b), disposed operatively adjacent this sensor, digitally-addressable and energizable electromagnetic field-creating structure which is selectively energizable to create, in the vicinity of the at least one assay sensor, an ambient electromagnetic field environment which is structured to assist in functionalizing, as a possession on said at least one assay sensor, at least one digitally-addressable assay site which will display an affinity for a selected fluid-assay material.
    • 逐像素,可数字寻址,像素化,前体,流体测定,包括形成在衬底上的多个像素的有源矩阵微结构,其中每个像素包括(a)至少一个非功能化的,可数字寻址的 和(b),其可操作地邻近该传感器设置,可数字寻址和激励的电磁场产生结构,其被选择性地激励以在所述至少一个测定传感器附近产生环境电磁场环境,所述环境电磁场环境被构造 在所述至少一个测定传感器上辅助功能化至少一个可显示对所选择的流体测定材料的亲和性的可数字寻址的测定位点。