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1. 发明授权

US4834505A Matrix addressable displays 失效
标题翻译：矩阵可寻址显示
公开(公告)号：US4834505A
公开(公告)日：1989-05-30
申请号：US116561
申请日：1987-10-16
申请人： Piero Migliorato , Michael G. Clark
发明人： Piero Migliorato , Michael G. Clark
IPC分类号： G02F1/1343 , G02F1/133 , G02F1/1335 , G02F1/136 , G02F1/1362 , G02F1/1368 , G09F9/30 , G09G3/36
CPC分类号： G02F1/1368 , G02F1/133514 , G02F1/13624 , G09G3/3648 , G09G3/3659 , G02F2001/134345 , G02F2201/122 , G09G2300/0452 , G09G2300/0809 , G09G2330/08
摘要： An electro-optic display comprises a two dimensional array of liquid crystal cells (C11A,B to C44A,B) each switchable by means of electrical signals applied to respective pairs of address lines connected to the cell by respective transistors (T11-T44). Each main electrode of each transistor is isolated from the rest of the array by a respective cell of the array.
摘要翻译： PCT No.PCT / GB87 / 00104 Sec。 371日期1987年10月16日第 102（e）日期1987年10月16日PCT提交1987年2月13日PCT公布。公开号WO87 / 05141 日期：1987年8月27日。电光显示器包括液晶单元（C11A，B至C44A，B）的二维阵列，每个阵列可通过施加到通过相应的单元连接到单元的各对地址线的电信号切换晶体管（T11-T44）。每个晶体管的每个主电极通过阵列的相应单元与阵列的其余部分隔离。

2. 发明授权

US06657269B2 Sensor cell 有权
公开(公告)号：US06657269B2
公开(公告)日：2003-12-02
申请号：US10022232
申请日：2001-12-20
申请人： Piero Migliorato , Nathan Bavidge , Christopher Lowe
发明人： Piero Migliorato , Nathan Bavidge , Christopher Lowe
IPC分类号： H01L2984
CPC分类号： G01N27/4148 , G01N27/27 , G01N27/4145
摘要： A sensor cell comprises receiving means, which may be in the form of an electrode 10 coupled to the gate electrode of a thin film transistor T1. In one form of the invention a voltage supplied to the gate electrode of the transistor T1 via a switching transistor T7 is controlled in dependence upon the value of capacitance CA arising at the electrode from receipt of a sample for identification. Thus, the operation of transistor T1 can be used to identify the sample received by the electrode 10.

3. 发明授权

US06621101B2 Thin-film transistor 有权
公开(公告)号：US06621101B2
公开(公告)日：2003-09-16
申请号：US09936042
申请日：2001-12-12
申请人： Ichio Yudasaka , Mitsutoshi Miyasaka , Piero Migliorato
发明人： Ichio Yudasaka , Mitsutoshi Miyasaka , Piero Migliorato
IPC分类号： H01L29786
CPC分类号： H01L29/78696 , H01L29/78612
摘要： The present invention provides, in a TFT, a channel region facing a gate electrode through a gate insulating film, a source electrode connected to the channel region and a drain region connected to the channel region on the side opposite the source region that are formed in a polycrystal semiconductor film that was patterned in island forms. In the channel region, a recombination center is formed for capturing a small number of carriers (holes) by impurities, such as inert-gas, metals, Group III elements, Group IV elements and Group V elements, introduced to a predetermined region in this channel region, or by defects generated due to the introduction of these impurities. The present invention thus provides an arrangement restraining bipolar transistor type behavior to stabilize saturation current and to provide a TFT that can improve reliability.

4. 发明授权

US06580129B2 Thin-film transistor and its manufacturing method 有权
公开(公告)号：US06580129B2
公开(公告)日：2003-06-17
申请号：US09914914
申请日：2001-12-13
申请人： Basil Lui , Piero Migliorato , Ichio Yudasaka , Mitsutoshi Miyasaka
发明人： Basil Lui , Piero Migliorato , Ichio Yudasaka , Mitsutoshi Miyasaka
IPC分类号： H01L2900
CPC分类号： H01L29/66757 , H01L29/78612 , H01L29/78621 , H01L29/78624 , H01L29/78645
摘要： The present invention provides, in a TFT, a gate electrode and a channel domain that are plurally divided in the channel-length direction, a low-concentration domain that is formed between the divided channel domains, and a low-concentration drain domain that adjoins a second channel domain located closest to a drain domain side among the divided channel domains. Therefore, even if the impurity concentration is relatively high in the low-concentration domain located between the divided channel domains and a low-concentration drain domain, an abnormal increase of drain current in the saturated region can be prevented, and a TFT with a high drain current level can be obtained. Thus, the present invention provides a TFT and its manufacturing method where abnormal increase of drain current in the saturated region can be prevented and the drain current level in the saturated region is sufficiently high.

5. 发明授权

US06727123B2 Method for manufacturing a thin-film transistor comprising a recombination center 有权
标题翻译：用于制造包括复合中心的薄膜晶体管的方法
公开(公告)号：US06727123B2
公开(公告)日：2004-04-27
申请号：US09936041
申请日：2001-12-18
申请人： Ichio Yudasaka , Mitsutoshi Miyasaka , Piero Migliorato
发明人： Ichio Yudasaka , Mitsutoshi Miyasaka , Piero Migliorato
IPC分类号： H01L2100
CPC分类号： H01L29/78696 , H01L21/2652 , H01L29/66757 , H01L29/78612
摘要： The present invention provides a thin-film transistor (TFT) and its production method which enables an arrangement restraining bipolar transistor type behavior, in order to stabilize saturation current and to provide a TFT that can improve reliability. The TFT includes a channel region facing a gate electrode through a gate insulating film, a source electrode connected to the channel region and a drain region connected to the channel region on the side opposite this source region are formed in a polycrystal semiconductor film that was patterned in island forms. In the channel region, a recombination center is formed for capturing a small number of carriers (holes) by introducing impurities, such as inert gases, metals, Group III elements, Group IV elements and Group V elements after a crystallization process is carried out on a semiconductor film 100.
摘要翻译：本发明提供一种薄膜晶体管（TFT）及其制造方法，其能够抑制双极晶体管类型的布置，以便稳定饱和电流并提供可提高可靠性的TFT。 TFT包括通过栅极绝缘膜面向栅电极的沟道区，连接到沟道区的源电极和与该源极相对侧的沟道区连接的漏极区域形成在图案化的多晶半导体膜中在岛屿形式。在通道区域中，通过引入杂质，如惰性气体，金属，III族元素，IV族元素和V族元素，形成复合中心，用于捕获少量载流子（空穴），结晶过程在半导体膜100。

6. 发明授权

US06580633B2 Nonvolatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US06580633B2
公开(公告)日：2003-06-17
申请号：US09965686
申请日：2001-09-27
申请人： Satoshi Inoue , Ichio Yudasaka , Piero Migliorato
发明人： Satoshi Inoue , Ichio Yudasaka , Piero Migliorato
IPC分类号： G11C1122
CPC分类号： H01L27/11502 , G11C11/22 , H01L27/11585 , H01L27/1159 , H01L27/12 , H01L29/78391 , H01L29/78645 , H01L29/78648
摘要： A semiconductor memory device comprising: an active layer in which are formed a transistor source, channel and drain; a gate for the transistor; a layer of ferroelectric material; and an electrode for applying a voltage to the ferroelectric material; the electrode being spaced apart from the gate, the layer of ferroelectric material having two stable states of internal polarization, and the arrangement being such that the two states of polarization have a detectable difference in effect upon the transfer characteristic of the transistor. The arrangement enables cross-talk between memory cells upon write to be avoided and can mitigate physical interface problems between the ferroelectric material and the active layer.
摘要翻译：一种半导体存储器件，包括：有源层，其中形成晶体管源极，沟道和漏极; 晶体管的栅极; 一层铁电材料; 和用于向铁电体材料施加电压的电极; 所述电极与所述栅极间隔开，所述铁电材料层具有两个稳定的内部极化状态，并且所述布置使得所述两种极化状态对于所述晶体管的转移特性具有可检测的差异。该布置能够避免写入时存储单元之间的串扰，并且可以减轻铁电材料和有源层之间的物理接口问题。

7. 发明授权

US4880753A Method of fabricating a polysilicon thin film transistor 失效
标题翻译：制造多晶硅薄膜晶体管的方法
公开(公告)号：US4880753A
公开(公告)日：1989-11-14
申请号：US311219
申请日：1989-02-16
申请人： Douglas B. Meakin , Piero Migliorato
发明人： Douglas B. Meakin , Piero Migliorato
IPC分类号： H01L29/78 , H01L21/336 , H01L29/49 , H01L29/786
CPC分类号： H01L29/66757 , H01L29/4908 , H01L29/78618 , Y10S148/147
摘要： In a process for manufacturing a thin film transistor, a first polysilicon layer is formed on a substrate and a silicon dioxide layer is formed on a region of the first polysilicon layer leaving exposed regions of that layer. A second polysilicon layer is formed on the silicon dioxide layer and aligned therewith. Regions of a selectively-grown electrically-conductive film are deposited on the second polysilicon layer and on the exposed regions of the first polysilicon layer, the film being such that it wil not grow on the edges of the silicon dioxide layer, but will grow on the exposed polysilicon to form gate, source and drain electrodes. The edges of the silicon dioxide layer therefore remain uncoated. The film may be formed of tungsten or may be formed, for example, by selective silicon epitaxy, phosphorus doped.

8. 发明授权

US4494133A Infrared sensitive photo diode 失效
标题翻译：红外敏感光电二极管
公开(公告)号：US4494133A
公开(公告)日：1985-01-15
申请号：US386082
申请日：1982-06-07
申请人： Anthony B. Dean , Robin F. C. Farrow , Piero Migliorato , Anthony M. White , Gerald M. Williams
发明人： Anthony B. Dean , Robin F. C. Farrow , Piero Migliorato , Anthony M. White , Gerald M. Williams
IPC分类号： H01L31/10 , H01L27/14 , H01L27/146
CPC分类号： H01L27/14649 , H01L27/14692
摘要： A photo diode formed by a substrate of Cd.sub.x Hg.sub.1-x Te covered with a layer of CdTe forming a p-n junction. The substrate may be p-type in which case the layer is n-type or vice versa. An array of photo diodes may be formed by covering the substrate with semi-insulating CdTe and forming islets of In on the CdTe. Heating causes In to diffuse into the CdTe doping it n-type. This results in regions of n-type CdTe surrounded by semi-insulating CdTe each region forming, with the substrate, a photo diode. The heating also causes diffusion between the Cd.sub.x Hg.sub.1-x Te and CdTe to give a graded heterostructure. Electrical connections are made to the substrate, and each n-type region. The n-type CdTe region may alternatively be formed by molecular beam epitaxial growth techniques using a beam of In dopant.
摘要翻译：由CdxHg1-xTe的衬底形成的光电二极管，其覆盖有形成p-n结的CdTe层。衬底可以是p型，在这种情况下，该层为n型，反之亦然。可以通过用半绝缘CdTe覆盖衬底并在CdTe上形成In的岛来形成光二极管阵列。加热导致In扩散到CdTe掺杂n型。这导致由半绝缘CdTe围绕的n型CdTe的区域，每个区域与衬底形成光电二极管。加热也导致CdxHg1-xTe和CdTe之间的扩散，从而产生渐变异质结构。电连接到基板和每个n型区域。可以通过使用In掺杂剂的束的分子束外延生长技术来形成n型CdTe区域。

9. 发明授权

US07221016B2 Semiconductor device with memory function and method of manufacture 有权
标题翻译：具有记忆功能的半导体器件及其制造方法
公开(公告)号：US07221016B2
公开(公告)日：2007-05-22
申请号：US10841544
申请日：2004-05-10
申请人： Satoshi Inoue , Piero Migliorato
发明人： Satoshi Inoue , Piero Migliorato
IPC分类号： H01L29/788
CPC分类号： H01L29/66757 , H01L21/28282 , H01L29/4908 , H01L29/66833 , H01L29/7881
摘要： A TFT memory 11 is provided with a polysilicon layer 22, wherein each region of the source 22a, the channel 22b and the drain 22c are formed on a substrate 21, and gate oxide films (insulating films) 23 and 25 are formed on the polysilicon layer 22; and a plurality of silicon particles 24 for trapping the charge of injected carriers are placed between the gate oxide films 23 and 25. Specifically, the gate oxide films comprise a first gate oxide film 23 and a second gate oxide film 25 formed on the first gate oxide film 23; the plurality of silicon particles 24 are located between the first gate oxide film 23 and the second gate oxide film 25, and the first gate oxide film 23 is formed in an extremely thin thickness.
摘要翻译： TFT存储器11设置有多晶硅层22，其中源极21a的每个区域，沟道22b和漏极22c形成在衬底21上，并且形成栅氧化膜（绝缘膜）23和25 在多晶硅层22上; 并且用于捕获注入载流子的电荷的多个硅颗粒24被放置在栅极氧化膜23和25之间。具体地，栅极氧化膜包括形成在第一栅极氧化膜23上的第一栅极氧化膜23和第二栅极氧化膜25; 多个硅颗粒24位于第一栅极氧化膜23和第二栅极氧化膜25之间，并且第一栅极氧化物膜23形成为非常薄的厚度。

10. 发明申请

US20060197118A1 Detection of molecular interactions using a field effect transistor 审中-公开
标题翻译：使用场效应晶体管检测分子相互作用
公开(公告)号：US20060197118A1
公开(公告)日：2006-09-07
申请号：US11377853
申请日：2006-03-16
申请人： Piero Migliorato , Pedro De Lemos Correia Estrela , Feng Yan
发明人： Piero Migliorato , Pedro De Lemos Correia Estrela , Feng Yan
IPC分类号： H01L23/58 , H01L21/00
CPC分类号： G01N33/54373 , G01N27/4145
摘要： A sensor for use in the detection of a molecular interaction comprises a field effect transistor (FET) having a core structure and an extended gate structure, the core structure and the extended gate structure being located on substantially separate regions of a substrate, the extended gate structure including an exposed metal sensor electrode on which probe molecules can be immobilized, wherein, in use, the sensor is operative to produce a change in an electrical characteristic of the FET in response to molecular interaction at the exposed surface of the metal sensor electrode. The sensor is particularly suitable for detecting biomolecular interactions such as the hybridization of DNA, when the sensor is prepared with suitable probe molecules immobilized on the exposed gate metal.
摘要翻译：用于检测分子相互作用的传感器包括具有芯结构和延伸栅极结构的场效应晶体管（FET），所述芯结构和延伸栅结构位于基板的基本上分离的区域上，延伸栅极包括暴露的金属传感器电极，其上可以固定有探针分子，其中在使用中，传感器响应于在金属传感器电极的暴露表面处的分子相互作用而产生FET的电特性的变化。当传感器与固定在暴露的栅极金属上的合适的探针分子一起制备传感器时，该传感器特别适用于检测生物分子相互作用，例如DNA的杂交。

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