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    • 1. 发明申请
    • NANOSCALE WIRE-BASED MEMORY DEVICES
    • 基于纳米电路的存储器件
    • WO2009134291A2
    • 2009-11-05
    • PCT/US2009/000337
    • 2009-01-21
    • PRESIDENT AND FELLOWS OF HARVARD COLLEGELIEBER, Charles, M.DONG, YajieLU, WeiYU, GuihuaMCALPINE, Michael
    • LIEBER, Charles, M.DONG, YajieLU, WeiYU, GuihuaMCALPINE, Michael
    • H01L27/10H01L29/06
    • H01L29/0665B82Y10/00G11C13/0002G11C13/0069G11C2213/77G11C2213/81H01L27/10H01L27/101H01L29/0673H01L29/16H01L29/1602H01L29/1604H01L2924/0002H01L2924/00
    • The present invention generally relates to nanotechnology and sub- microelectronic devices that can be used in circuitry and, in particular, to nanoscale wires and other nanostructures able to encode data. One aspect of the present invention is directed to a device comprising an electrical crossbar array comprising at least two crossed wires at a cross point. In some cases, at least one of the crossed wires is a nanoscale wire, and in certain instances, at least one of the crossed wires is a nanoscale wire comprising a core and at least one shell surrounding the core. For instance, the core may comprise a crystal (e.g., crystalline silicon) and the shell may be at least partially amorphous (e.g., amorphous silicon). In certain embodiments, the cross point may exhibit intrinsic current rectification, or other electrical behaviors, and the cross point can be used as a memory device. For example, in one embodiment, the cross point may exhibit a first conductance at a positive voltage, and the cross point may exhibit a second conductance at a negative voltage. Accordingly, by applying suitable voltages to the cross point, data may be stored at the cross point. Other aspects of the present invention are directed to systems and methods for making or using such devices, kits involving such devices, or the like.
    • 本发明一般涉及可用于电路中的纳米技术和亚微电子器件,特别涉及能够对数据进行编码的纳米线和其他纳米结构。 本发明的一个方面涉及一种装置,其包括在交叉点处包括至少两根交叉线的电横排阵列。 在一些情况下,交叉导线中的至少一个是纳米线,并且在某些情况下,交叉导线中的至少一个是纳米线,其包括芯和围绕芯的至少一个壳。 例如,芯可以包括晶体(例如,晶体硅),并且壳可以是至少部分无定形的(例如非晶硅)。 在某些实施例中,交叉点可以表现出固有的电流整流或其他电气行为,并且交叉点可以用作存储器件。 例如,在一个实施例中,交叉点可以在正电压下呈现第一电导,并且交叉点可以在负电压下显示第二电导。 因此,通过向交叉点施加合适的电压,可以在交叉点存储数据。 本发明的其他方面涉及用于制造或使用这种装置的系统和方法,涉及这种装置的套件等。
    • 2. 发明申请
    • NANOSTRUCTURES CONTAINING METAL-SEMICONDUCTOR COMPOUNDS
    • 包含金属半导体化合物的纳米结构
    • WO2005093831A1
    • 2005-10-06
    • PCT/US2005/004459
    • 2005-02-14
    • PRESIDENT AND FELLOWS OF HARVARD COLLEGELIEBER, Charles, M.WU, YueXIANG, JieYANG, ChenLU, Wei
    • LIEBER, Charles, M.WU, YueXIANG, JieYANG, ChenLU, Wei
    • H01L23/49
    • B82Y30/00B82Y10/00H01L29/0673H01L29/068H01L2924/0002H01L2924/00
    • The present invention generally relates to devices and components for use in nanotechnology and sub-microelectronic circuitry that include metal-semiconductor compounds such as metal silicides. The present invention also, in some embodiments, provides methods of forming such devices and components by allowing a first material to diffuse into a second material, optionally creating a new compound. Thus, as an example, metal atoms are allowed to diffuse into a semiconductor to create the metal-semiconductor compound. In some cases, the device may include a component that is a single crystal. Certain metal-semiconductor compounds of the invention have novel physical/electrical properties, for example, low resistivities, high conductivities, high current density capacities, and the like. In some embodiments, a component of the invention may have two or more regions that differ in composition, where one or both of the regions can include a metal-semiconductor compound. In some cases, the regions may be created by using a mask or a nanoscale wire to define the two or more regions.
    • 本发明一般涉及用于纳米技术的器件和组件,以及包括诸如金属硅化物的金属 - 半导体化合物的亚微电子电路。 在一些实施方案中,本发明还提供了通过允许第一材料扩散到第二材料中,任选地产生新化合物来形成这种装置和组分的方法。 因此,作为示例,允许金属原子扩散到半导体中以形成金属 - 半导体化合物。 在一些情况下,该装置可以包括作为单晶的部件。 本发明的某些金属 - 半导体化合物具有新的物理/电学性质,例如低电阻率,高电导率,高电流密度容量等。 在一些实施方案中,本发明的组分可以具有两个或更多个组成不同的区域,其中一个或两个区域可以包括金属 - 半导体化合物。 在一些情况下,可以通过使用掩模或纳米级线来形成区域来限定两个或更多个区域。
    • 3. 发明申请
    • NANOWIRE HETEROSTRUCTURES
    • WO2006132659A2
    • 2006-12-14
    • PCT/US2005/034345
    • 2005-09-21
    • PRESIDENT AND FELLOWS OF HARVARD COLLEGELU, WeiXIANG, JieTIMKO, Brian, P.WU, YueYAN, HaoLIEBER, Charles, M.
    • LU, WeiXIANG, JieTIMKO, Brian, P.WU, YueYAN, HaoLIEBER, Charles, M.
    • H01L29/06
    • B82Y10/00G11C2213/17G11C2213/18H01L29/0665H01L29/0673H01L29/068H01L29/1606H01L29/165
    • The present invention generally relates to nanoscale heterostructures and, in some cases, to nanowire heterostructures exhibiting ballistic transport, and/or to metal-semiconductor junctions that that exhibit no or reduced Schottky barriers. One aspect of the invention provides a solid nanowire having a core and a shell, both of which are essentially undoped. For example, in one embodiment, the core may consist essentially of undoped germanium and the shell may consist essentially of undoped silicon. Carriers are injected into the nanowire, which can be ballistically transported through the nanowire. In other embodiments, however, the invention is not limited to solid nanowires, and other configurations, involving other nanoscale wires, are also contemplated within the scope of the present invention. Yet another aspect of the invention provides a junction between a metal and a nanoscale wire that exhibit no or reduced Schottky barriers. As a non-limiting example, a nanoscale wire having a core and a shell may be in physical contact with a metal electrode, such that the Schottky barrier to the core is reduced or eliminated. Still other aspects of the invention are directed to electronic devices exhibiting such properties, and techniques for methods of making or using such devices.
    • 本发明一般涉及纳米尺度异质结构,在某些情况下涉及显示弹道输运的纳米线异质结构,和/或涉及没有或减少的肖特基势垒的金属 - 半导体结。 本发明的一个方面提供了具有核和壳的固体纳米线,两者都基本上是未掺杂的。 例如,在一个实施例中,芯可以基本上由未掺杂的锗组成,并且壳可以基本上由未掺杂的硅组成。 载体被注入纳米线,可以通过纳米线进行弹道传输。 然而,在其它实施方案中,本发明不限于固体纳米线,并且涉及其它纳米尺寸线的其它构型也在本发明的范围内。 本发明的另一方面提供了金属和纳米尺寸线之间的连接处,其不显示或减小肖特基势垒。 作为非限制性实例,具有芯和壳的纳米线可以与金属电极物理接触,使得芯的肖特基势垒被减少或消除。 本发明的其它方面涉及具有这种性质的电子设备,以及制造或使用这些设备的方法的技术。
    • 9. 发明申请
    • CREDIT RISK CONTROL
    • 信用风险控制
    • WO2010022155A1
    • 2010-02-25
    • PCT/US2009/054323
    • 2009-08-19
    • ALIBABA GROUP HOLDING LIMITEDGAO, JingHU, XiaomingLU, WeiZHANG, XiuyunLI, FengZHANG, Zhengwei
    • GAO, JingHU, XiaomingLU, WeiZHANG, XiuyunLI, FengZHANG, Zhengwei
    • G06Q40/00
    • G06Q40/08G06Q40/02G06Q40/025
    • A method and a system of credit risk control use different incentive mechanisms for different type of users for post-loan credit risk control. The method classifies the user to one of several different user types based on the user information and a correspondence relationship between the user information and risk levels, and selects an appropriate incentive mechanism for risk control based on the user type. The incentive mechanisms may either be a positive incentive mechanism or a negative incentive mechanism depending on the user type. The incentive mechanisms are performed over a network, and are designed to encourage a user of good loan payment record but to discourage a user of bad loan payment record. The method and the system are particularly suited for risk control of repayment of various kinds of loans which are applied and disbursed over the Internet.
    • 信用风险控制的方法和制度对不同类型的用户使用不同的激励机制进行贷后信贷风险控制。 该方法基于用户信息和用户信息与风险级别之间的对应关系将用户分类为多种不同用户类型之一,并根据用户类型选择适当的风险控制激励机制。 激励机制可以是积极的激励机制,也可以是根据用户类型的否定激励机制。 激励机制是通过网络进行的,旨在鼓励用户提供良好的贷款支付记录,但是阻止用户不良贷款支付记录。 该方法和系统特别适用于偿付通过互联网应用和支付的各种贷款的风险控制。