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    • 3. 发明授权
    • Semiconductor device of reduced thermal resistance and increased operating area
    • 半导体器件具有降低的热阻和增加的工作面积
    • US06521919B2
    • 2003-02-18
    • US09813985
    • 2001-03-22
    • Noritoshi HiranoKatsumi SatohYoshihiro Yamaguchi
    • Noritoshi HiranoKatsumi SatohYoshihiro Yamaguchi
    • H01L2974
    • H01L29/66363H01L23/051H01L29/744H01L2924/0002H01L2924/00
    • A semiconductor device is composed a semiconductor substrate having a first conducting-type first semiconductor layer, a second conducting-type second semiconductor layer, a first conducting-type third semiconductor layer, a second conducting-type fourth semiconductor layer and a first conducting-type fifth semiconductor layer, a first main electrode for short-circuiting the first semiconductor layer and the second semiconductor layer, a second main electrode for short-circuiting the fourth semiconductor layer and the fifth semiconductor layer, and a control electrode provided on the third semiconductor layer. The first semiconductor layer and the second semiconductor layer form a joint. The second semiconductor layer and the third semiconductor layer form a joint. The third semiconductor layer and the fourth semiconductor layer form a joint. The fourth semiconductor layer and the fifth semiconductor layer form a joint.
    • 半导体器件由具有第一导电型第一半导体层,第二导电型第二半导体层,第一导电型第三半导体层,第二导电型第四半导体层和第一导电型第二半导体层 第五半导体层,用于使第一半导体层和第二半导体层短路的第一主电极,用于使第四半导体层和第五半导体层短路的第二主电极,以及设置在第三半导体层上的控制电极 。 第一半导体层和第二半导体层形成接头。 第二半导体层和第三半导体层形成接头。 第三半导体层和第四半导体层形成接头。 第四半导体层和第五半导体层形成接头。
    • 4. 发明授权
    • Semiconductor device with improved heat suppression in peripheral regions
    • 具有改善周边区域热抑制的半导体器件
    • US06489666B1
    • 2002-12-03
    • US09624998
    • 2000-07-25
    • Yoshihiro YamaguchiKatsumi SatohNoritoshi Hirano
    • Yoshihiro YamaguchiKatsumi SatohNoritoshi Hirano
    • H01L2906
    • H01L29/861H01L29/0661
    • A semiconductor device (102) comprises an N type semiconductor substrate (1). A P layer (22) is formed in a first surface (S1) of the semiconductor substrate (1), and a P layer (23) is formed in the semiconductor substrate (1) and in contact with the first surface (S1) and a second surface (S2) of the semiconductor substrate (1) corresponding to a beveled surface. The P layer (23) surrounds the P layer (22) in non-contacting relationship with the P layer (22). A separation distance (D) between the P layers (22, 23) is set at not greater than 50 &mgr;m. A distance (D23) between a third surface (S3) of the semiconductor substrate (1) and a portion of the P layer (23) which is closer to the third surface (S3) is less than a distance (D22) between the third surface (S3) and a portion of the P layer (22) which is closer to the third surface (S3). An N++ layer (24) is formed in part of the third surface (S3) which is substantially opposed to the P layer (22), and an N+ layer (25) is formed in contact with the N++ layer (24) and the third surface (S3). A cathode electrode (33) is formed on the third surface (S3) so as to cover a region (S322) of the third surface (S3) which is opposed to the P layer (22). The semiconductor device (102) suppresses heat generation to perform a stable operation.
    • 半导体器件(102)包括N型半导体衬底(1)。 AP层(22)形成在半导体衬底(1)的第一表面(S1)中,并且在半导体衬底(1)中形成P层(23)并与第一表面(S1)接触,并且 所述半导体衬底(1)的第二表面(S2)对应于斜面。 P层(23)以与P层(22)非接触的关系围绕P层(22)。 P层(22,23)之间的间隔距离(D)设定为50μm以下。 半导体衬底(1)的第三表面(S3)与更靠近第三表面(S3)的P层(23)的一部分之间的距离(D23)小于第三 表面(S3)和更靠近第三表面(S3)的P层(22)的一部分。 在基本上与P层(22)相对的第三表面(S3)的一部分中形成N ++层(24),并且形成与N ++层(24)接触的N +层(25) 表面(S3)。 在第三表面(S3)上形成阴极电极(33),以覆盖与P层(22)相对的第三表面(S3)的区域(S322)。 半导体装置(102)抑制发热来进行稳定的动作。
    • 7. 发明授权
    • Thermal cutting machine and thermal cutting method
    • 热切割机和热切割方法
    • US08729421B2
    • 2014-05-20
    • US11629283
    • 2005-06-02
    • Satoshi OhnishiYoshihiro Yamaguchi
    • Satoshi OhnishiYoshihiro Yamaguchi
    • B23K9/02
    • B23K37/0408B23K7/002B23K10/00B23K26/0884B23K26/16B23K26/38B23K26/702B23K37/0461B23K2101/18
    • A lattice pallet 13 having a large number of supporters for placing a plate 14 is installed to a table 12 so as to be freely fittable and removable. Bringing in of the plate 14 is performed by the method of raising the lattice pallet 13 with a crane with the plate 14 already having been loaded upon the lattice pallet 13 in a different location, transporting them over the table 12, and lowering them down onto the table 12. Directly after cutting has been completed, the lattice pallet 12 is raised and separated from the table 12 with the manufactured product and the left over material carried upon it and is taken away to a different location, and another lattice pallet 13 with another plate 14 mounted upon it is brought in with the crane upon the table 12, and the task of cutting this other plate 14 is commenced.
    • 具有用于放置板14的大量支撑器的格子托盘13被安装到桌子12上,以便可自由地装配和拆卸。 通过用起重机提升格子托盘13的方法来进行板14的进入,该起重机已将板14已经装载在不同位置的格子托盘13上,将它们运送到工作台12上,并将它们下降到 桌子12.切割完成之后,格子托盘12被升起并与工作台12分离,制成品并将剩下的材料运送到其上并被带走到不同的位置,另一个格子托盘13具有 安装在其上的另一个板14与起重机一起被放置在工作台12上,并且开始切割另一个板14的任务。
    • 9. 发明授权
    • Dye-sensitized solar cell
    • 染料敏化太阳能电池
    • US08530738B2
    • 2013-09-10
    • US13254920
    • 2010-03-04
    • Shuzi HayaseYoshihiro Yamaguchi
    • Shuzi HayaseYoshihiro Yamaguchi
    • H01L31/0248H01L31/0216
    • H01G9/2072H01G9/2031H01G9/2059H01L51/0064H01M14/005Y02E10/542Y02P70/521
    • There is provided a tandem-type dye-sensitized solar cell having a novel structure whereby optical absorption efficiency is improved and which can be manufactured at low cost.A dye-sensitized solar cell 10 comprises an anode substrate 12, a first dye-carrying porous oxide semiconductor layer 14, an electrolytic solution layer 16a, a porous support layer 18, a second dye-carrying porous oxide semiconductor layer 20, an electrolytic solution layer 16b, and a cathode substrate 22, arranged in order from an optical incidence side. The porous support layer 18 supports an iodine redox catalyst layer 19. Electrons derived by a conductor from a conductor layer 12b are introduced to the cathode substrate 22, thereby configuring, for example, a battery circuit for lighting purposes.
    • 提供了具有新型结构的串联型染料敏化太阳能电池,由此光学吸收效率提高并且可以以低成本制造。 染料敏化太阳能电池10包括阳极基底12,第一染料负载多孔氧化物半导体层14,电解液层16a,多孔载体层18,第二染料负载多孔氧化物半导体层20,电解溶液 层16b和阴极基板22,从光入射侧依次配置。 多孔支撑层18支撑碘氧化还原催化剂层19.由导体层12b导体产生的电子引入阴极基板22,从而构成例如用于照明目的的电池电路。