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1. 发明授权

US5778202A Ring bus multiprocessor system and processor boards for constituting the same 失效
标题翻译：环形总线多处理器系统和处理器板构成相同
公开(公告)号：US5778202A
公开(公告)日：1998-07-07
申请号：US662445
申请日：1996-06-10
申请人： Norihiko Kuroishi , Tetsuro Kawata , Kenichi Kawauchi , Nobuaki Miyakawa , Reiji Aibara , Mitsumasa Koyanagi
发明人： Norihiko Kuroishi , Tetsuro Kawata , Kenichi Kawauchi , Nobuaki Miyakawa , Reiji Aibara , Mitsumasa Koyanagi
IPC分类号： G06F15/173 , G06F13/40 , G06F13/00 , G06F13/38
CPC分类号： G06F13/4095
摘要： A ring bus multiprocessor system whose processors are laid out and connected in such a manner that the system is enhanced in stability and performance, is easy to modify in scale, and is lowered in manufacturing cost. On a processor board, processors are serially connected by communication buses to form a processor group. Each processor board may have an even-numbered plurality of processor groups mounted thereon. A plurality of processor boards are laid out in parallel and are interconnected between adjacent boards by means of inter-processor communication buses. Each of the odd-numbered processor groups is connected from one board to the next up to the most downstream board where the connection is looped back to the adjacent even-numbered processor group. In turn, the even-numbered processor group is connected from one board to the next back to the most upstream board where the connection is again looped back to the adjacent odd-numbered processor group, and so on, whereby a ring bus arrangement is formed.
摘要翻译：一种环形总线多处理器系统，其处理器以这样的方式布置和连接，使得系统的稳定性和性能得到提高，容易在规模上进行修改，并降低制造成本。在处理器板上，处理器通过通信总线串联连接，形成处理器组。每个处理器板可以具有安装在其上的偶数个多个处理器组。多个处理器板并联布置并且通过处理器间通信总线在相邻板之间互连。每个奇数处理器组从一个板连接到下一个板到下游板，其中连接被环回到相邻的偶数处理器组。反过来，偶数处理器组从一个板连接到下一个回到最上游板，其中连接再次环回到相邻的奇数处理器组，依此类推，形成环形总线布置。

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