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1. 发明授权

US07009216B2 Semiconductor light emitting device and method of fabricating the same 失效
标题翻译：半导体发光器件及其制造方法
公开(公告)号：US07009216B2
公开(公告)日：2006-03-07
申请号：US10718581
申请日：2003-11-24
申请人： Nobuyuki Otsuka , Shigeo Yoshii , Toshiya Yokogawa
发明人： Nobuyuki Otsuka , Shigeo Yoshii , Toshiya Yokogawa
IPC分类号： H01L33/00 , H01S3/19
CPC分类号： H01S5/187 , H01S5/028 , H01S5/105 , H01S5/124 , H01S5/2201 , H01S5/42
摘要： A semiconductor light emitting device of the present invention comprises a n-type InP substrate (1), and a stripe structure (10) formed in the stripe shape on the n-type InP substrate (1) and comprised of a n-type InP lower cladding layer (3), an active layer (4) having a resonator in a direction parallel to the n-type InP substrate (1), and a p-type InP upper cladding layer (5). The stripe structure (10) has a photonic crystal structure (2) with concave portions 9 arranged in rectangular lattice shape, and the direction in which the concave portions (9) of the photonic crystal structure (2) are arranged corresponds with a resonator direction. A stripe-shaped upper electrode (6) is formed on the stripe structure (10) to extend in the resonator direction. The semiconductor light emitting device of the present invention so structured is configured to radiate light in the direction perpendicular to the n-type InP substrate (1).
摘要翻译：本发明的半导体发光器件包括n型InP衬底（1）和在n型InP衬底（1）上形成为条形的条形结构（10），并且由n型InP衬底下包层（3），在与n型InP衬底（1）平行的方向上具有谐振器的有源层（4）和p型InP上覆层（5）。条状结构（10）具有光子晶体结构（2），其具有矩形格子状的凹部9，并且配置有光子晶体结构（2）的凹部（9）的方向与谐振器方向。条状上电极（6）形成在条状结构（10）上以沿谐振器方向延伸。如此构造的本发明的半导体发光器件被配置为沿垂直于n型InP衬底（1）的方向辐射光。

2. 发明授权

US06953954B2 Plasma oscillation switching device 失效
标题翻译：等离子体振荡开关装置
公开(公告)号：US06953954B2
公开(公告)日：2005-10-11
申请号：US10745567
申请日：2003-12-29
申请人： Shigeo Yoshii , Nobuyuki Otsuka , Koichi Mizuno , Asamira Suzuki , Toshiya Yokogawa
发明人： Shigeo Yoshii , Nobuyuki Otsuka , Koichi Mizuno , Asamira Suzuki , Toshiya Yokogawa
IPC分类号： H01L29/812 , H01L21/338 , H01L29/20 , H01L29/778 , H01L29/80 , H01L29/43
CPC分类号： H01L29/1029 , H01L29/2003 , H01L29/7785
摘要： A plasma oscillation switching device of the present invention comprises semiconductor substrate 101; first barrier layer 103 that is composed of a III-V compound semiconductor and formed on the substrate; channel layer 104 that is composed of a III-V compound semiconductor and formed on the first barrier layer; second barrier layer 105 that is composed of a III-V compound semiconductor and formed on the channel layer; source electrode 107, gate electrode 109 and drain electrode 108 provided on the second barrier layer, wherein the first barrier layer includes n-type diffusion layer 103a, the second barrier layer includes p-type diffusion layer 105a, the band gap of the channel layer is smaller than the band gaps of the first and the second barrier layers, two-dimensional electron gas EG is accumulated at the conduction band at the boundary between the first barrier layer and the channel layer, two-dimensional hole gas HG is accumulated at the valence band at the boundary between the second barrier layer and the channel layer, and these electrodes are formed on the barrier layer through the insulating layer 106.
摘要翻译：本发明的等离子体振荡切换装置包括半导体基板101，第一阻挡层103，其由III-V族化合物半导体构成并形成在基板上; 沟道层104，其由III-V族化合物半导体形成并形成在第一阻挡层上; 第二阻挡层105，其由III-V族化合物半导体形成并形成在沟道层上; 源极电极107，栅电极109和漏电极108，其中第一阻挡层包括n型扩散层103a，第二阻挡层包括p型扩散层105a，第二势垒层包括p型扩散层105a，通道层比第一和第二阻挡层的带隙小，二维电子气体EG在第一阻挡层和沟道层之间的边界处的导带处累积，二维空穴气体HG被积聚在第二阻挡层和沟道层之间的边界处的价带处，并且这些电极通过绝缘层106形成在阻挡层上。

3. 发明授权

US06778308B2 Process of fabricating semiconductor light emitting device 失效
标题翻译：制造半导体发光器件的工艺
公开(公告)号：US06778308B2
公开(公告)日：2004-08-17
申请号：US10652044
申请日：2003-09-02
申请人： Nobuyuki Otsuka , Shigeo Yoshii , Masahiro Kitoh , Toshiya Yokogawa
发明人： Nobuyuki Otsuka , Shigeo Yoshii , Masahiro Kitoh , Toshiya Yokogawa
IPC分类号： G02F1015
CPC分类号： B82Y20/00 , G02F1/015 , G02F1/017 , G02F2202/32 , G02F2203/02 , G02F2203/10
摘要： A vertical optical modulator comprising: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type bonded to the first semiconductor layer; a third semiconductor layer of the second conductivity type; a dielectric layer formed between the second semiconductor layer and the third semiconductor layer; an antenna electrode having a plurality of conductive pieces which are formed within the dielectric layer so as to have a net-like shape as a whole, to be separated from one another at the intersections of the net-like shape, and to be in contact with both the second semiconductor layer and the third semiconductor layer; a first electrode electrically connected to the first semiconductor layer; and a second electrode electrically connected to the third semiconductor layer.
摘要翻译：一种垂直光学调制器，包括：第一导电类型的第一半导体层; 第二导电类型的第二半导体层结合到第一半导体层; 第二导电类型的第三半导体层; 形成在所述第二半导体层和所述第三半导体层之间的电介质层; 具有多个导电片的天线电极，其形成在电介质层内以形成整体的网状形状，以在网状形状的交点处彼此分离并且接触同时具有第二半导体层和第三半导体层; 电连接到第一半导体层的第一电极; 以及电连接到第三半导体层的第二电极。

4. 发明授权

US06917457B2 Process of fabricating semiconductor light emitting device 失效
标题翻译：制造半导体发光器件的工艺
公开(公告)号：US06917457B2
公开(公告)日：2005-07-12
申请号：US10889027
申请日：2004-07-13
申请人： Nobuyuki Otsuka , Shigeo Yoshii , Masahiro Kitoh , Toshiya Yokogawa
发明人： Nobuyuki Otsuka , Shigeo Yoshii , Masahiro Kitoh , Toshiya Yokogawa
IPC分类号： G02F1/015 , G02F1/017
CPC分类号： B82Y20/00 , G02F1/015 , G02F1/017 , G02F2202/32 , G02F2203/02 , G02F2203/10
摘要： A vertical optical modulator comprising: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type bonded to the first semiconductor layer; a third semiconductor layer of the second conductivity type; a dielectric layer formed between the second semiconductor layer and the third semiconductor layer; an antenna electrode having a plurality of conductive pieces which are formed within the dielectric layer so as to have a net-like shape as a whole, to be separated from one another at the intersections of the net-like shape, and to be in contact with both the second semiconductor layer and the third semiconductor layer; a first electrode electrically connected to the first semiconductor layer; and a second electrode electrically connected to the third semiconductor layer.
摘要翻译：一种垂直光学调制器，包括：第一导电类型的第一半导体层; 第二导电类型的第二半导体层结合到第一半导体层; 第二导电类型的第三半导体层; 形成在所述第二半导体层和所述第三半导体层之间的电介质层; 具有多个导电片的天线电极，其形成在电介质层内以形成网状整体，在网状形状的交点处彼此分离并且接触同时具有第二半导体层和第三半导体层; 电连接到第一半导体层的第一电极; 以及电连接到第三半导体层的第二电极。

5. 发明申请

US20060231862A1 Ballistic semiconductor device 失效
标题翻译：弹道半导体器件
公开(公告)号：US20060231862A1
公开(公告)日：2006-10-19
申请号：US10542063
申请日：2004-04-14
申请人： Nobuyuki Otsuka , Koichi Mizuno , Shigeo Yoshii , Asamira Suzuki
发明人： Nobuyuki Otsuka , Koichi Mizuno , Shigeo Yoshii , Asamira Suzuki
IPC分类号： H01L31/00
CPC分类号： H01L29/7371 , H01L29/2003 , H01L29/7376
摘要： A ballistic semiconductor device of the present invention comprises a n-type emitter layer (102), a base layer (305) made of n-type InGaN, a n-type collector layer (307), an emitter barrier layer (103) interposed between the emitter layer (102) and the base layer (305) and having a band gap larger than that of the base layer (305), and a collector barrier layer (306) interposed between the base layer (305) and the collector layer (307) and having a band gap larger than that of the base layer (305), and operates at 10 GHz or higher.
摘要翻译：本发明的弹道半导体器件包括n型发射极层（102），由n型InGaN制成的基极层（305），n型集电极层（307），发射极阻挡层（103）在发射极层（102）和基极层（305）之间具有比基底层（305）的带隙大的带隙的集电极阻挡层（306），并且位于基极层（305）和集电极层（307），并且具有比基底层（305）的带隙大的带隙，并且在10GHz或更高频率下工作。

6. 发明申请

US20050067615A1 Semiconductor device and fabrication method thereof 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20050067615A1
公开(公告)日：2005-03-31
申请号：US10962492
申请日：2004-10-13
申请人： Shigeo Yoshii , Nobuyuki Otsuka , Koichi Mizuno , Asamira Suzuki
发明人： Shigeo Yoshii , Nobuyuki Otsuka , Koichi Mizuno , Asamira Suzuki
IPC分类号： H01L29/68 , H01L29/06 , H01L29/08 , H01L29/12 , H01L29/737 , H01L31/0328
CPC分类号： B82Y10/00 , H01L29/0817 , H01L29/127 , H01L29/7371
摘要： The present invention relates to a semiconductor device comprising a substrate (101); a semiconductor multi-layered structure formed on the substrate (101); the semiconductor multi-layered structure comprising an emitter layer (102), a base layer (105), and a collector layer (107), each composed of a group III-V n-type compound semiconductor and layered in this order; a quantum dot barrier layer (103) disposed between the emitter layer (102) and the base layer (105); a collector electrode (110), a base electrode (111) and an emitter electrode (112) connected to the collector layer (107), the base layer (105) and the emitter layer (102), respectively; the quantum dot barrier layer (103) comprising a plurality of quantum dots (103c); the quantum dots (103) being sandwiched between first and second barrier layers (103a, 103d) from the emitter layer side and the base layer side, respectively; each of the quantum dots (103c) having a convex portion that is convex to the base layer (105); a base layer (105) side interface (d1) in the second barrier layer (103d), and collector layer side and emitter layer side interfaces (d2, d3) in the base layer (105); the interfaces having curvatures (d12, d22, d23) that are convex to the collector layer (107) corresponding to the convex portions of the quantum dots (103c).
摘要翻译：本发明涉及一种包括衬底（101）的半导体器件; 形成在所述基板（101）上的半导体多层结构; 所述半导体多层结构包括由III-V族N型化合物半导体构成的发射极层（102），基极层（105）和集电极层（107），并且按顺序层叠; 设置在发射极层（102）和基极层（105）之间的量子点势垒层（103）; 分别与集电极层（107）连接的集电极（110），基极（111）和发射极（112），基极层（105）和发射极层（102）所述量子点势垒层（103）包括多个量子点（103c）; 量子点（103）分别从发射极侧和基极侧夹在第一和第二阻挡层（103a，103d）之间; 每个量子点（103c）具有与基底层（105）凸起的凸部; 第二阻挡层（103d）中的基底层（105）侧界面（d1），以及基底层（105）中的集电极层侧和发射极层侧界面（d2，d3）具有对应于量子点（103c）的凸部的与集电体层（107）凸起的曲率（d12，d22，d23）的界面。

7. 发明授权

US07414261B2 Ballistic semiconductor device 失效
标题翻译：弹道半导体器件
公开(公告)号：US07414261B2
公开(公告)日：2008-08-19
申请号：US10542063
申请日：2004-04-14
申请人： Nobuyuki Otsuka , Koichi Mizuno , Shigeo Yoshii , Asamira Suzuki
发明人： Nobuyuki Otsuka , Koichi Mizuno , Shigeo Yoshii , Asamira Suzuki
IPC分类号： H01L29/06
CPC分类号： H01L29/7371 , H01L29/2003 , H01L29/7376
摘要： A ballistic semiconductor device of the present invention comprises a n-type emitter layer (102), a base layer (305) made of n-type InGaN, a n-type collector layer (307), an emitter barrier layer (103) interposed between the emitter layer (102) and the base layer (305) and having a band gap larger than that of the base layer (305), and a collector barrier layer (306) interposed between the base layer (305) and the collector layer (307) and having a band gap larger than that of the base layer (305), and operates at 10 GHz or higher.
摘要翻译：本发明的弹道半导体器件包括n型发射极层（102），由n型InGaN制成的基极层（305），n型集电极层（307），发射极阻挡层（103）在发射极层（102）和基极层（305）之间具有比基底层（305）的带隙大的带隙的集电极阻挡层（306），并且位于基极层（305）和集电极层（307），并且具有比基底层（305）的带隙大的带隙，并且在10GHz或更高频率下工作。

8. 发明授权

US06861679B2 Gallium indium nitride arsenide based epitaxial wafer, a hetero field effect transistor using the wafer, and a method of fabricating the hetero field effect transistor 失效
标题翻译：基于砷化镓铟的外延晶片，使用晶片的异质场效应晶体管，以及制造该异质场效应晶体管的方法
公开(公告)号：US06861679B2
公开(公告)日：2005-03-01
申请号：US10817035
申请日：2004-04-05
申请人： Nobuyuki Otsuka , Koichi Mizuno , Shigeo Yoshii , Asamira Suzuki
发明人： Nobuyuki Otsuka , Koichi Mizuno , Shigeo Yoshii , Asamira Suzuki
IPC分类号： H01L29/812 , H01L21/335 , H01L21/338 , H01L29/20 , H01L29/778 , H01L31/0328
CPC分类号： H01L29/7785 , H01L29/2003 , H01L29/201 , H01L29/66462 , H01L29/7784
摘要： A hetero field effect transistor according to the present invention comprises an InP substrate, a channel layer provided on the InP substrate with a buffer layer disposed between the InP substrate and the channel layer, a spacer layer constituted by a semiconductor having a band gap larger than that of the channel layer formed to hetero-join to the channel layer, and a carrier supply layer formed to be adjacent to the spacer layer, wherein the channel layer comprises a predetermined semiconductor layer constituted by a compound semiconductor represented by a formula GaxIn1−xNyA1−y in which A is As or Sb, composition x satisfies 0≦x≦0.2, and composition y satisfies 0.03≦y≦0.10.
摘要翻译：根据本发明的异质场效应晶体管包括InP衬底，设置在InP衬底上的沟道层，其中缓冲层设置在InP衬底和沟道层之间，间隔层由具有大于形成为与沟道层异质连接的沟道层的沟道层和与间隔层相邻形成的载流子供给层，其中沟道层包括由式GaxIn1-xNyA1表示的化合物半导体构成的预定半导体层 -Y，其中A为As或Sb，组成x满足0 <= x <= 0.2，组成y满足0.03 <= Y＆LE; 0.10。

9. 发明授权

US07323725B2 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US07323725B2
公开(公告)日：2008-01-29
申请号：US10962492
申请日：2004-10-13
申请人： Shigeo Yoshii , Nobuyuki Otsuka , Koichi Mizuno , Asamira Suzuki
发明人： Shigeo Yoshii , Nobuyuki Otsuka , Koichi Mizuno , Asamira Suzuki
IPC分类号： H01L29/739 , H01L31/00
CPC分类号： B82Y10/00 , H01L29/0817 , H01L29/127 , H01L29/7371
摘要： The present invention relates to a semiconductor device having a multi-layered structure comprising an emitter layer, a base layer, and a collector layer, each composed of a group III-V n-type compound semiconductor in this order; a quantum dot barrier layer disposed between the emitter layer and the base layer; a collector electrode, a base electrode and the emitter layer all connected to an emitter electrode; the quantum dot barrier layer having a plurality of quantum dots being sandwiched between first and second barrier layers from the emitter layer side and the base layer side, respectively and each having a portion that is convex to the base layer; a base layer side interface in the second barrier layer, and collector layer side and emitter layer side interfaces in the base layer having curvatures that are convex to the collector layer corresponding to the convex portions of the quantum dots.
摘要翻译：本发明涉及一种具有多层结构的半导体器件，该多层结构包括依次由III-V族n型化合物半导体构成的发射极层，基极层和集电极层; 设置在发射极层和基极层之间的量子点势垒层; 集电极，基极和发射极层全部连接到发射极; 所述量子点势垒层分别具有从所述发射极层侧和所述基极侧侧夹在第一和第二阻挡层之间的多个量子点，并且各自具有与所述基极层相对的部分。第二阻挡层中的基底层侧界面，基底层中的集电极层侧发射极侧接合具有对应于量子点的凸部的集电极层的曲率的曲率。

10. 发明授权

US06921678B2 Method for fabricating nitride semiconductor, method for fabricating nitride semiconductor device, and nitride semiconductor device 有权
标题翻译：氮化物半导体的制造方法，氮化物半导体器件的制造方法以及氮化物半导体器件
公开(公告)号：US06921678B2
公开(公告)日：2005-07-26
申请号：US10434063
申请日：2003-05-09
申请人： Akihiko Ishibashi , Ayumu Tsujimura , Yoshiaki Hasegawa , Nobuyuki Otsuka , Gaku Sugahara , Ryoko Miyanaga , Toshitaka Shimamoto , Kenji Harafuji , Yuzaburo Ban , Kiyoshi Ohnaka
发明人： Akihiko Ishibashi , Ayumu Tsujimura , Yoshiaki Hasegawa , Nobuyuki Otsuka , Gaku Sugahara , Ryoko Miyanaga , Toshitaka Shimamoto , Kenji Harafuji , Yuzaburo Ban , Kiyoshi Ohnaka
IPC分类号： H01S5/30 , H01L21/20 , H01L21/205 , H01L33/00 , H01L33/32 , H01S5/323 , H01S5/343 , H01L21/223
CPC分类号： H01L33/007 , B82Y20/00 , H01L21/0242 , H01L21/02458 , H01L21/02507 , H01L21/0254 , H01L21/02579 , H01L21/0262 , H01L21/0265 , H01L33/32 , H01S5/22 , H01S5/3063 , H01S5/3215 , H01S5/3216 , H01S5/34333 , H01S2304/04 , H01S2304/12
摘要： The method for fabricating a nitride semiconductor of the present invention includes the steps of: (1) growing a first semiconductor layer made of a first group III nitride over a substrate by supplying a first group III source and a group V source containing nitrogen; and (2) growing a second semiconductor layer made of a second group III nitride on the first semiconductor layer by supplying a second group III source and a group V source containing nitrogen. At least one of the steps (1) and (2) includes the step of supplying a p-type dopant over the substrate, and an area near the interface between the first semiconductor layer and the second semiconductor layer is grown so that the density of the p-type dopant locally increases.
摘要翻译：本发明的制造氮化物半导体的方法包括以下步骤：（1）通过提供含有氮的第一组III源和V族源，在衬底上生长由第一III族氮化物制成的第一半导体层; 和（2）通过提供第二组III源和含有氮的V族源，在第一半导体层上生长由第二III族氮化物制成的第二半导体层。步骤（1）和（2）中的至少一个包括在衬底上提供p型掺杂剂的步骤，并且生长第一半导体层和第二半导体层之间的界面附近的区域，使得 p型掺杂剂局部增加。

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