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1. 发明申请

US20100025369A1 PLASMA PROCESSING APPARATUS AND PLASMA PROCESSING METHOD 审中-公开
标题翻译：等离子体加工设备和等离子体处理方法
公开(公告)号：US20100025369A1
公开(公告)日：2010-02-04
申请号：US12202642
申请日：2008-09-02
申请人： Nobuyuki NEGISHI , Masaru Izawa , Kenji Maeda
发明人： Nobuyuki NEGISHI , Masaru Izawa , Kenji Maeda
IPC分类号： G01L11/02
CPC分类号： H01J37/32642 , H01J37/32935 , H01J37/3299
摘要： To monitor the thickness of a focus ring consumed during wafer processing. A plasma processing apparatus includes a vacuum chamber 1, workpiece mounting means 5, high frequency electric power introducing means 4 and radio-frequency bias electric power introducing means 7 and processes a surface of a workpiece 6 using a plasma that is converted from a gas introduced into the vacuum chamber 1 by the action of a high frequency electric power introduced by the high frequency electric power introducing means 4. The plasma processing apparatus further includes an annular member 11 surrounding the workpiece 6 mounted on the workpiece mounting means 5, and a pair of tubes having an aspect ratio of 3 or higher and disposed on a side wall of the vacuum chamber 1 to face each other. Each tube is vacuum-sealed at a tip end thereof with a glass material. One of the tubes has a light source 15 disposed facing to the interior of the vacuum chamber on the atmosphere side of the glass material, and the other tube has light receiving means 16 disposed facing to the interior of the vacuum chamber on the atmosphere side of the glass material. The light receiving means 16 receives light passing across the surface of the annular member 11.
摘要翻译：监视在晶片处理期间消耗的聚焦环的厚度。等离子体处理装置包括真空室1，工件安装装置5，高频电力引入装置4和射频偏置电力引入装置7，并使用从引入的气体转换的等离子体处理工件6的表面通过高频电力引入装置4引入的高频电力进入真空室1.等离子体处理装置还包括环绕安装在工件安装装置5上的工件6的环形构件11和一对的长径比为3或更高并且设置在真空室1的侧壁上以彼此面对的管。每个管在其末端用玻璃材料进行真空密封。其中一个管具有面向玻璃材料的气氛侧的真空室的内部设置的光源15，另一个管具有光接收装置16，该接收装置16面对真空室的大气侧的内部玻璃材料。光接收装置16接收穿过环形构件11的表面的光。

2. 发明申请

US20110030899A1 PLASMA PROCESSING APPARATUS USING TRANSMISSION ELECTRODE 审中-公开
标题翻译：使用传输电极的等离子体处理设备
公开(公告)号：US20110030899A1
公开(公告)日：2011-02-10
申请号：US12709149
申请日：2010-02-19
申请人： Keizo SUZUKI , Masaru Izawa , Nobuyuki Negishi , Kenetsu Yokogawa , Kenji Maeda
发明人： Keizo SUZUKI , Masaru Izawa , Nobuyuki Negishi , Kenetsu Yokogawa , Kenji Maeda
IPC分类号： C23F1/08 , C23C16/00 , C23C16/50
CPC分类号： H01J37/3255 , H01J37/32091 , H01J37/32577
摘要： At least a part of a discharging electromagnetic wave is introduced into a processing chamber via a transmission electrode which has characteristics to behave as a dielectric (electric insulator) for the discharging electromagnetic wave, and to behave as a material with electric conductivity for RF bias electromagnetic wave of electromagnetic wave of ion plasma oscillation.
摘要翻译：放电电磁波的至少一部分经由具有作为放电电磁波的电介质（电绝缘体）的特性的透射电极被引入处理室，并且作为用于RF偏置电磁的导电性材料离子等离子体振荡的电磁波波。

3. 发明授权

US06645870B2 Process for fabricating semiconductor device 有权
标题翻译：半导体器件制造工艺
公开(公告)号：US06645870B2
公开(公告)日：2003-11-11
申请号：US09928500
申请日：2001-08-14
申请人： Nobuyuki Negishi , Masaru Izawa
发明人： Nobuyuki Negishi , Masaru Izawa
IPC分类号： H01L2100
CPC分类号： H01L21/02063 , H01L21/31116 , H01L21/76802 , H01L21/76897 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： Disclosed is a process for fabricating a semiconductor device, which efficiently suppresses a damage layer formed on a base silicon substrate or an interconnection layer and removes a high resistivity layer in the formation of a contact hole, thereby reducing a contact resistance. The contact hole is formed in an etching step of reducing ion energy and an oxygen flow rate as an etching depth progresses, thereby suppressing the damage layer formed on the base. The reduction of the contact resistance is achieved by using a step of removing the high resistivity layer using hydrogen or a hydrogen-containing gas plasma.
摘要翻译：公开了一种半导体器件的制造方法，其有效地抑制形成在基底硅基板或互连层上的损伤层，并且在形成接触孔时去除高电阻率层，从而降低接触电阻。在蚀刻深度进行时，以减少离子能量和氧气流量的蚀刻工序形成接触孔，由此抑制形成在基材上的损伤层。通过使用氢或含氢气体等离子体去除高电阻率层的步骤来实现接触电阻的降低。

4. 发明申请

US20090181545A1 DRY-ETCHING METHOD AND APPARATUS 审中-公开
标题翻译：干燥方法和装置
公开(公告)号：US20090181545A1
公开(公告)日：2009-07-16
申请号：US12400697
申请日：2009-03-09
申请人： Nobuyuki Negishi , Masaru Izawa , Masatsugu Arai
发明人： Nobuyuki Negishi , Masaru Izawa , Masatsugu Arai
IPC分类号： H01L21/3065
CPC分类号： H01J37/32935 , C23F4/00 , H01J37/32082 , H01L21/31116 , H01L21/31138 , H01L21/31144
摘要： A resist damage free dry-etching process is proposed. A time duration defined until bias electric power is applied is controlled according to a plasma ignition detection signal. Wafer back-side gas pressure for a certain constant time after starting of an etching process operation is set to be lower than that as to a main etching condition. Within the time duration defined after starting of the etching process operation up to a certain constant time, CxFy gas having a lower C/F ratio than that of the main etching condition is employed, or a flow rate of the CxFy gas is lowered. The above-described parameter values are controlled every wafer according to an amount of radicals contained in the plasma being monitored. A unit for preheating a wafer is installed in a wafer transporting system.
摘要翻译：提出了一种抗蚀损坏自由干蚀刻工艺。根据等离子体点火检测信号控制施加偏压电力之前定义的持续时间。在开始蚀刻处理操作之后，将一定时间的晶片后侧气体压力设定为低于主蚀刻条件。在蚀刻处理操作开始定义的持续时间之前，采用比主蚀刻条件低C / F比的CxFy气体，或者降低CxFy气体的流量。根据被监测的等离子体中所含的自由基的量，每个晶片控制上述参数值。用于预热晶片的单元安装在晶片传送系统中。

5. 发明申请

US20060141795A1 Method for fabrication semiconductor device 失效
标题翻译：半导体器件制造方法
公开(公告)号：US20060141795A1
公开(公告)日：2006-06-29
申请号：US10531700
申请日：2002-10-18
申请人： Nobuyuki Negishi , Kenetsu Yokogawa , Masaru Izawa
发明人： Nobuyuki Negishi , Kenetsu Yokogawa , Masaru Izawa
IPC分类号： H01L21/461
CPC分类号： H01J37/32935 , H01J37/32091 , H01L21/31116 , H01L21/76802 , H01L22/12
摘要： The object of this invention is to provide a method for fabricating a semiconductor device in which the yield and productivity are improved. In the method for fabricating a semiconductor device according to the invention, a plasma etching system is prepared which includes a vacuum chamber 1, a susceptor 7 arranged in the vacuum chamber 1 to place a wafer 8, a gas introducing means 2 to introduce the material gas into the vacuum chamber and a high-frequency power introducing means 6. The gas introduced into the vacuum chamber by the gas introducing means 2 is converted into a plasma by the high-frequency power, and a plurality of holes are selectively formed in the oxide film 23 of a main wafer surface in a plasma atmosphere. In the hole forming step, light 15 having a continuous spectrum is irradiated on a flat portion and a hole portion of the main surface of the semiconductor wafer thereby to measure the reflectivity change in the flat portion and the hole portion.
摘要翻译：本发明的目的是提供一种制造其产率和生产率提高的半导体器件的方法。在根据本发明的半导体器件的制造方法中，制备等离子体蚀刻系统，其包括真空室1，设置在真空室1中的基座7以放置晶片8，气体引入装置2将材料气体进入真空室和高频功率引入装置6.通过气体引入装置2引入真空室的气体通过高频功率转换成等离子体，并且多个孔选择性地形成在在等离子体气氛中的主晶片表面的氧化膜23。在孔形成步骤中，将具有连续光谱的光15照射在半导体晶片的主表面的平坦部分和孔部分上，从而测量平坦部分和孔部分中的反射率变化。

6. 发明申请

US20100297849A1 PLASMA ETCHING METHOD FOR ETCHING AN OBJECT 审中-公开
标题翻译：用于蚀刻对象的等离子体蚀刻方法
公开(公告)号：US20100297849A1
公开(公告)日：2010-11-25
申请号：US12512084
申请日：2009-07-30
申请人： Masatoshi Miyake , Nobuyuki Negishi , Masatoshi Oyama , Tadamitsu Kanekiyo , Masaru Izawa
发明人： Masatoshi Miyake , Nobuyuki Negishi , Masatoshi Oyama , Tadamitsu Kanekiyo , Masaru Izawa
IPC分类号： H01L21/3065
CPC分类号： H01L21/31116 , H01L21/31144
摘要： The invention provides a plasma etching method capable of suppressing bowing of an opening of the object to be etched, and solving the lack of opening at a high aspect ratio portion in deep hole processing having a high aspect ratio. A plasma etching method for etching an object to be etched in a plasma etching apparatus using a mask patterned and formed on the object to be etched comprises sequentially performing a first step for etching the mask while attaching deposits on a side wall of an opening close to a surface of the mask pattern of the mask using fluorocarbon gas CxFy (x=1, 2, 3, 4, 5, 6, y=4, 5, 6, 8), and a second step for etching the object to be etched while removing the deposits attached to the side wall of the opening close to the surface of the mask pattern of the mask using fluorocarbon gas.
摘要翻译：本发明提供一种能够抑制待蚀刻物体的开口弯曲的等离子体蚀刻方法，并且解决了在具有高纵横比的深孔加工中在高纵横比部分缺少开口。在等离子体蚀刻装置中使用图案化并形成在待蚀刻对象上的掩模来蚀刻待蚀刻物体的等离子体蚀刻方法包括：顺序地执行用于蚀刻掩模的第一步骤，同时将沉积物附着在靠近使用碳氟化合物气体CxFy（x = 1,2,3,4,5,6，y = 4,5,6,8）的掩模的掩模图案的表面，以及蚀刻被蚀刻物体的第二步骤同时使用碳氟化合物气体除去附着在开口的侧壁附近的沉积物的掩模图案的表面附近的沉积物。

7. 发明申请

US20050284571A1 Dry-etching method and apparatus 审中-公开
标题翻译：干蚀刻方法和设备
公开(公告)号：US20050284571A1
公开(公告)日：2005-12-29
申请号：US11067700
申请日：2005-03-01
申请人： Nobuyuki Negishi , Masaru Izawa , Masatsugu Arai
发明人： Nobuyuki Negishi , Masaru Izawa , Masatsugu Arai
IPC分类号： C23F1/00 , C23F4/00 , H01J37/32 , H01L21/302 , H01L21/311
CPC分类号： H01J37/32935 , C23F4/00 , H01J37/32082 , H01L21/31116 , H01L21/31138 , H01L21/31144
摘要： A resist damage free dry-etching process is proposed. A time duration defined until bias electric power is applied is controlled according to a plasma ignition detection signal. Wafer back-side gas pressure for a certain constant time after starting of an etching process operation is set to be lower than that as to a main etching condition. Within the time duration defined after starting of the etching process operation up to a certain constant time, CxFy gas having a lower C/F ratio than that of the main etching condition is employed, or a flow rate of the CxFy gas is lowered. The above-described parameter values are controlled every wafer according to an amount of radicals contained in the plasma being monitored. A unit for preheating a wafer is installed in a water transporting system.
摘要翻译：提出了一种抗蚀损坏自由干蚀刻工艺。根据等离子体点火检测信号控制施加偏压电力之前定义的持续时间。在开始蚀刻处理操作之后，将一定时间的晶片后侧气体压力设定为低于主蚀刻条件。在蚀刻工艺操作开始之后定义的持续时间达到一定的恒定时间的时间内，C / F比C / F比低于主使用蚀刻条件，或者降低气体的流量。根据被监测的等离子体中所含的自由基的量，每个晶片控制上述参数值。用于预热晶片的单元安装在水输送系统中。

8. 发明授权

US06573190B1 Dry etching device and dry etching method 失效
标题翻译：干蚀刻装置和干法蚀刻法
公开(公告)号：US06573190B1
公开(公告)日：2003-06-03
申请号：US09856264
申请日：2001-05-18
申请人： Masaru Izawa , Shinichi Tachi , Kenetsu Yokogawa , Nobuyuki Negishi , Naoyuki Kofuji
发明人： Masaru Izawa , Shinichi Tachi , Kenetsu Yokogawa , Nobuyuki Negishi , Naoyuki Kofuji
IPC分类号： H01L2100
CPC分类号： H01L21/32136 , H01J37/321 , H01J37/3266 , H01L21/3065 , H01L21/31116 , H01L21/32137
摘要： A dry etching apparatus and method which can uniformly and stably generate a high-density plasma over a wide range, and can cope with increase of wafer diameter and making the pattern finer in etch processing of the fine pattern of a semiconductor device. The apparatus and method enables a magnitude of a magnetic field to be cyclically modulated when a substrate to be treated is etch processed. The cyclical modulation may be effected by cyclically modulating a coil current flowing to a solenoid coil.
摘要翻译：可以在宽范围内均匀稳定地产生高密度等离子体的干蚀刻装置和方法，并且可以应对晶片直径的增加，并使得图案在半导体器件的精细图案的蚀刻处理中更细。当要处理的衬底被蚀刻处理时，该装置和方法使得可以循环调制磁场的大小。循环调制可以通过循环调制流向螺线管线圈的线圈电流来实现。

9. 发明授权

US06475918B1 Plasma treatment apparatus and plasma treatment method 有权
标题翻译：等离子体处理装置和等离子体处理方法
公开(公告)号：US06475918B1
公开(公告)日：2002-11-05
申请号：US09679348
申请日：2000-10-05
申请人： Masaru Izawa , Kenetsu Yokogawa , Nobuyuki Negishi , Yoshinori Momonoi , Shinichi Tachi
发明人： Masaru Izawa , Kenetsu Yokogawa , Nobuyuki Negishi , Yoshinori Momonoi , Shinichi Tachi
IPC分类号： H01L2100
CPC分类号： H01J37/32678 , H01J37/32422 , H01L21/67069 , H01L21/76802
摘要： An etching method capable of obtaining a fine fabricated shape, particularly, a vertical fabricated shape with less bowing upon fabrication of insulation films in the production of semiconductors, the method comprising controlling the incident amount of O, F or N radicals, gas flow rate or consumption amount of O, F and N on the inner wall surface with etching time to suppress excessive O, F and N which become excessive in the initial stage of etching, the method also including control for the flow rate or the consumption amount based on the result of measurement for plasmas during etching so as to obtain a stable etching shape. Since bowing can be reduced upon fabrication of insulation film hole and insulation film while maintaining the etching rate and the selectivity, finer semiconductor device can be produced easily.
摘要翻译：一种蚀刻方法，其能够在制造半导体时获得精细的制造形状，特别是制造绝缘膜时的垂直制造形状，该方法包括控制O，F或N自由基的入射量，气体流速或用蚀刻时间对内壁表面的O，F和N的消耗量进行蚀刻，以抑制在蚀刻的初始阶段过度的过量的O，F和N，该方法还包括基于流量或消耗量的控制在蚀刻期间等离子体的测量结果，以获得稳定的蚀刻形状。由于在保持蚀刻速率和选择性的同时，在制造绝缘膜孔和绝缘膜时可以减少弯曲，因此可以容易地制造更细的半导体器件。

10. 发明授权

US07372582B2 Method for fabrication semiconductor device 失效
标题翻译：半导体器件制造方法
公开(公告)号：US07372582B2
公开(公告)日：2008-05-13
申请号：US10531700
申请日：2002-10-18
申请人： Nobuyuki Negishi , Kenetsu Yokogawa , Masaru Izawa
发明人： Nobuyuki Negishi , Kenetsu Yokogawa , Masaru Izawa
IPC分类号： G01B11/14
CPC分类号： H01J37/32935 , H01J37/32091 , H01L21/31116 , H01L21/76802 , H01L22/12
摘要： The object of this invention is to provide a method for fabricating a semiconductor device in which the yield and productivity are improved. In the method for fabricating a semiconductor device according to the invention, a plasma etching system is prepared which includes a vacuum chamber 1, a susceptor 7 arranged in the vacuum chamber 1 to place a wafer 8, a gas introducing means 2 to introduce the material gas into the vacuum chamber and a high-frequency power introducing means 6. The gas introduced into the vacuum chamber by the gas introducing means 2 is converted into a plasma by the high-frequency power, and a plurality of holes are selectively formed in the oxide film 23 of a main wafer surface in a plasma atmosphere. In the hole forming step, light 15 having a continuous spectrum is irradiated on a flat portion and a hole portion of the main surface of the semiconductor wafer thereby to measure the reflectivity change in the flat portion and the hole portion.
摘要翻译：本发明的目的是提供一种制造其产率和生产率提高的半导体器件的方法。在根据本发明的半导体器件的制造方法中，制备等离子体蚀刻系统，其包括真空室1，设置在真空室1中的基座7以放置晶片8，气体引入装置2将材料气体进入真空室和高频电力引入装置6。通过气体引入装置2引入真空室的气体通过高频电力转换为等离子体，并且在等离子体气氛中的主晶片表面的氧化物膜23中选择性地形成多个孔。在孔形成步骤中，将具有连续光谱的光15照射在半导体晶片的主表面的平坦部分和孔部分上，从而测量平坦部分和孔部分中的反射率变化。

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