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    • 3. 发明授权
    • Multi-processor system
    • 多处理器系统
    • US07836233B2
    • 2010-11-16
    • US10642755
    • 2003-08-19
    • Kunihiko TsunedomiKentaro YoshimuraNobuyasu KanekawaTakanori YokoyamaMitsuru Watabe
    • Kunihiko TsunedomiKentaro YoshimuraNobuyasu KanekawaTakanori YokoyamaMitsuru Watabe
    • G06F13/00
    • G05B19/0421G05B2219/2231G05B2219/25178
    • A serial communication interface (SCI) cable 4 is provided between the slave processor 2 and the master processor 3. Both processors are connected with a communication interface for peripheral units (SPI: Serial Peripheral Interface) which enables fast transmission. The slave processor 2 transmits a transmission request command which requests at least one of data transmission and reception from the command communication section 220 to the master processor 3 through the SCI cable 4. The master processor 3 transfers data to and from the slave processor 2 in communication with the slave processor 2 by means of the data communication section 310 through the fast SPI cable 5 in response to a transmission request command sent from the slave processor 2 With this, the processing ability of a multi-processor system can be increased.
    • 在从属处理器2和主处理器3之间提供串行通信接口(SCI)电缆4.两个处理器都连接有外围设备的通信接口(SPI:串行外设接口),可实现快速传输。 从处理器2通过SCI电缆4发送从命令通信部220向主处理器3请求数据发送和接收中的至少一个的发送请求命令。主处理器3将来自从处理器2的数据传送到从处理器2 响应于从从属处理器2发送的发送请求命令,通过数据通信部分310通过快速SPI电缆5与从属处理器2进行通信。由此,可以增加多处理器系统的处理能力。