会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 2. 发明申请
    • DISPLAY PANEL AND DISPLAY DEVICE PROVIDED WITH THIS
    • 显示面板和显示设备
    • US20110242078A1
    • 2011-10-06
    • US12998859
    • 2010-02-12
    • Isao TakahashiTakahiro YamaguchiShinya TakahashiNoboru Matsuda
    • Isao TakahashiTakahiro YamaguchiShinya TakahashiNoboru Matsuda
    • G09G5/00
    • G02F1/1345G02F2001/133388G09G3/3611G09G2320/0247H01L27/3276
    • In a display panel having no black matrix in a picture-frame region, occurrence of flicker in the picture-frame region is suppressed. On a substrate constituting a liquid crystal panel, a peripheral electrode is formed in such a way as to cover at least a part of an electrical wiring line arranged in a picture-frame region facing a counter electrode with a liquid crystal layer therebetween. Also, a voltage generating circuit for providing a predetermined potential to the peripheral electrode is provided in the liquid crystal panel. A control signal, which is a binary signal, is provided to the voltage generating circuit from an external source. The voltage generating circuit provides a potential having a predetermined potential difference from a potential provided to the counter electrode, or a potential equal to the potential provided to the counter electrode, to the peripheral electrode according to a value of the control signal.
    • 在图像帧区域中没有黑矩阵的显示面板中,抑制了图像帧区域的闪烁的发生。 在构成液晶面板的基板上,外围电极形成为覆盖布置在面对对电极的图像框区域中的电布线的至少一部分,其间具有液晶层。 此外,在液晶面板中设置有用于向外围电极提供预定电位的电压产生电路。 作为二进制信号的控制信号从外部源提供给电压产生电路。 电压产生电路根据控制信号的值,向周边电极提供具有与提供给对电极的电位或电位相等的电位的预定电位差的电位。
    • 7. 发明授权
    • Semiconductor device having a trench-gate structure
    • 具有沟槽栅结构的半导体器件
    • US07049657B2
    • 2006-05-23
    • US10714868
    • 2003-11-18
    • Noboru Matsuda
    • Noboru Matsuda
    • H01L29/76H01L29/94H01L31/62H01L31/113H01L31/119
    • H01L29/7813H01L21/26586H01L29/1095H01L29/42368
    • A semiconductor device comprises: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type; a trench; a thick gate insulating film; a thin gate insulating film; a gate electrode; and a semiconductor region of a second conductivity type. The second semiconductor layer is provided on the first semiconductor layer. The trench penetrates the second semiconductor layer and intrudes into the first semiconductor layer. The thick gate insulating film is provided on a inner wall of the trench below an upper surface of the first semiconductor layer. The thin gate insulating film is provided on the inner wall of the trench at a part upper than the thick gate insulating film. The gate electrode fills the trench. The semiconductor region of a second conductivity type is selectively formed to adjoin the trench and to project from a bottom surface of the second semiconductor layer into the first semiconductor layer.
    • 一种半导体器件包括:第一导电类型的第一半导体层; 第二导电类型的第二半导体层; 沟渠 厚栅绝缘膜; 薄栅绝缘膜; 栅电极; 和第二导电类型的半导体区域。 第二半导体层设置在第一半导体层上。 沟槽穿透第二半导体层并侵入第一半导体层。 厚栅极绝缘膜设置在第一半导体层的上表面下方的沟槽的内壁上。 薄栅极绝缘膜设置在沟槽的内壁上方的厚栅极绝缘膜的上方。 栅电极填充沟槽。 选择性地形成第二导电类型的半导体区域以邻接沟槽并从第二半导体层的底表面突出到第一半导体层。
    • 8. 发明申请
    • Semiconductor device and method of manufacturing same
    • 半导体装置及其制造方法
    • US20060086972A1
    • 2006-04-27
    • US11062838
    • 2005-02-23
    • Hironobu ShibataNoboru Matsuda
    • Hironobu ShibataNoboru Matsuda
    • H01L29/94
    • H01L29/7813H01L29/0623H01L29/0878H01L29/1095H01L29/42368H01L29/4238H01L29/66348H01L29/66734H01L29/7397
    • A semiconductor device comprises: a first semiconductor region of a first conductivity type; a second semiconductor region of a second conductivity type provided on the first semiconductor region; a trench formed in the second semiconductor region; a thick gate insulating film selectively provided in a center area of a bottom surface of the trench; a thin gate insulating film provided along a periphery of the bottom surface and on a sidewall of the trench; a third semiconductor region of the first conductivity type that is selectively provided below the thin gate insulating film provided along the periphery of the bottom surface of the trench and that extends to the first semiconductor region; a fourth semiconductor region of the first conductivity type selectively provided in the surface of the second semiconductor region; and a gate electrode filling the trench via the gate insulating film.
    • 半导体器件包括:第一导电类型的第一半导体区域; 设置在第一半导体区域上的第二导电类型的第二半导体区域; 形成在第二半导体区域中的沟槽; 选择性地设置在沟槽的底面的中心区域的厚栅极绝缘膜; 沿着所述底表面的周边和所述沟槽的侧壁上设置的薄栅极绝缘膜; 第一导电类型的第三半导体区域,其被选择性地设置在沿着沟槽的底表面的周边设置并延伸到第一半导体区域的薄栅极绝缘膜的下方; 选择性地设置在第二半导体区域的表面中的第一导电类型的第四半导体区域; 以及通过栅极绝缘膜填充沟槽的栅电极。
    • 9. 发明授权
    • Trench-type schottky-barrier diode
    • 沟槽型肖特基势垒二极管
    • US5917228A
    • 1999-06-29
    • US800028
    • 1997-02-13
    • Noboru MatsudaYoshiro Baba
    • Noboru MatsudaYoshiro Baba
    • H01L21/329H01L29/47H01L29/861H01L29/872H01L31/107
    • H01L29/66143H01L29/872
    • The present invention relates to a schottky-barrier diode capable of decreasing a leakage current due to damage generated on inner walls of trenches, and securing a large operation region for itself. In the device, an N.sup.- -type epitaxial layer is formed on a N.sup.+ -type silicon substrate. In a predetermined region in the epitaxial layer, a P.sup.+ -type base diffusion layer having high impurity concentration is formed. Trenches are formed through from the surface of the base diffusion layer to the epitaxial layer. In each of the trenches, an N.sup.- -type selective epitaxial growth region is formed. A schottky metal is formed on a surface comprising the surfaces of the base diffusion layer, which includes the selective epitaxial growth regions, and the epitaxial layer. Surface regions as the surfaces of the selective epitaxial growth regions filling the trenches function as diode operation regions.
    • 本发明涉及一种肖特基势垒二极管,其能够减少由沟槽内壁产生的损伤引起的漏电流,并且可以确保其自身的大的操作区域。 在器件中,在N +型硅衬底上形成N型外延层。 在外延层的预定区域中,形成杂质浓度高的P +型基极扩散层。 沟槽形成为从基底扩散层的表面到外延层。 在每个沟槽中,形成N型选择性外延生长区。 在包括选择性外延生长区的基底扩散层的表面和外延层的表面上形成肖特基金属。 作为填充沟槽的选择性外延生长区域的表面的表面区域用作二极管操作区域。
    • 10. 发明申请
    • Metal foil for secondary battery and secondary battery
    • 二次电池和二次电池用金属箔
    • US20110311877A1
    • 2011-12-22
    • US12923279
    • 2010-09-13
    • Noboru MatsudaHiroshi FurukiHideya Matsunaga
    • Noboru MatsudaHiroshi FurukiHideya Matsunaga
    • H01M4/72B32B3/10
    • H01M4/742H01M4/78Y10T428/12361
    • A metal foil for secondary battery generating less cutting chips at the time of forming an opening and allowed to have a higher aperture ratio without reducing strength and a secondary battery in which short circuit caused by generation of electrode debris can be suppressed are provided. A metal foil 1 for secondary battery is provided with a metal thin plate 2, plural first convex portions 3A formed on a first principal surface 2a of the thin plate 2 by plastic forming and plural second convex portions 3B formed on a second principal surface 2b opposite to the first principal surface 2a by the plastic forming, wherein the convex portions 3A and 3B each have an opening 31 of which aperture plane 31a is orthogonal or substantially orthogonal to the principal surfaces 2a and the 2b.
    • 提供一种用于二次电池的金属箔,其在形成开口时产生较少的切屑并允许具有较高的开口率而不降低强度,并且可以抑制由于电极碎屑的产生引起的短路的二次电池。 用于二次电池的金属箔1设置有金属薄板2,通过塑性成型形成在薄板2的第一主表面2a上的多个第一凸部3A和形成在相反的第二主表面2b上的多个第二凸部3B 通过塑性成型到第一主表面2a,其中凸部3A和3B各自具有开口31,开口31的开口面31a与主表面2a和2b正交或基本正交。