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1. 发明授权

US06192704B1 Absorber of absorption system refrigerator 失效
标题翻译：吸收系统冰箱吸收器
公开(公告)号：US06192704B1
公开(公告)日：2001-02-27
申请号：US09381700
申请日：1999-09-23
申请人： Naoki Hiro , Yoshio Ozawa , Kenji Nasako , Hiroyuki Hashimoto
发明人： Naoki Hiro , Yoshio Ozawa , Kenji Nasako , Hiroyuki Hashimoto
IPC分类号： F25B1512
CPC分类号： B01D53/18 , F25B37/00 , F25B2500/01 , F28D3/00
摘要： The absorber for use in absorption chillers of the present invention comprises a plurality of cooling water pipes 2 extending horizontally in the interior of the absorber chamber. A plurality of flat heat transfer plates 1 are spaced apart from one another and arranged horizontally in a vertical position, and the plurality of cooling water pipes 2 extend through these heat transfer plates 1 perpendicular thereto. The pitch Pd of the plates 1 is 3 to 15 mm. Each heat transfer plate 1 is integrally formed on its upper end face with an absorbent receptacle 10 V-shaped in cross section and extending longitudinally of the upper end face. The bottom portion of the receptacle 10 is formed with two rows of absorbent holes 11 positioned upwardly of respective surfaces of the plate 1. The holes 11 of each row are spaced apart from one another longitudinally of the plate 1 and each have an outlet adjoining the surface of the plate 1. This enables an absorber to have a higher absorbing capacity than conventional absorbers.
摘要翻译：用于本发明的吸收式制冷机的吸收器包括在吸收室的内部水平延伸的多个冷却水管2。多个扁平传热板1彼此间隔开并且在竖直位置上水平布置，并且多个冷却水管2穿过与其垂直的这些传热板1。板1的间距Pd为3〜15mm。每个传热板1在其上端面上一体地形成有横截面为V形的吸收容器，并且在上端面的纵向延伸。容器10的底部形成有两排位于板1的相应表面向上的吸收孔11.每排的孔11彼此间隔开板1的纵向，并且每个具有出口这使得吸收体具有比常规吸收体更高的吸收能力。

2. 发明授权

US06192694B1 Absorption type refrigerating machine 失效
标题翻译：吸收式制冷机
公开(公告)号：US06192694B1
公开(公告)日：2001-02-27
申请号：US09381909
申请日：1999-09-27
申请人： Naoki Hiro , Yasuharu Kurogi , Tadato Fujihara , Yoshio Ozawa , Toshihiro Yamada
发明人： Naoki Hiro , Yasuharu Kurogi , Tadato Fujihara , Yoshio Ozawa , Toshihiro Yamada
IPC分类号： F25B1500
CPC分类号： F25B49/043 , F25B15/008 , F25B15/06 , F25B2315/001 , Y02A30/277 , Y02B30/62
摘要： In a double-effect absorption chiller wherein the vapor of a refrigerant produced by a high temperature generator is supplied to a low temperature generator 12 for condensation, and the refrigerant liquified by condensation is supplied to a condenser 11, a pipe 7 for supplying the refrigerant liquified in the low temperature generator 12 to the condenser 11 therethrough is provided with an orifice 71 and a control valve 81 as pressure adjusting means. A control circuit 9 is connected to the control valve 81 to hold the valve 81 fully open during the period form the start-up of the chiller until the load is stabilized and thereafter gradually decrease the opening degree of the valve 81. Alternatively, a control valve 118 is mounted on the pipe 7 for controlling the pressure of the refrigerant so that the concentration of the absorbent (intermediate solution) in the high temperature generator because equal to the average of the concentration of the absorbent (strong solution) in the low temperature generator 12 and the concentration of the absorbent (weak solution) in an absorber.
摘要翻译：在将由高温发生器制造的制冷剂的蒸气供给到低温发生器12进行冷凝的双效吸收式制冷机中，通过冷凝液液化的制冷剂供给到冷凝器11，供给制冷剂的配管7 在低温发生器12中液化到通过其的冷凝器11设置有作为压力调节装置的孔口71和控制阀81。控制电路9连接到控制阀81，以在冷却器启动期间直到负载稳定之前将阀81完全打开，然后逐渐降低阀81的开度。或者，控制阀118安装在管道7上，用于控制制冷剂的压力，使得高温发生器中的吸收剂（中间溶液）的浓度等于低温吸收剂（强溶液）的浓度平均值发生器12和吸收剂中的吸收剂（弱溶液）的浓度。

3. 发明授权

US08637915B2 Nonvolatile semiconductor memory 有权
标题翻译：非易失性半导体存储器
公开(公告)号：US08637915B2
公开(公告)日：2014-01-28
申请号：US13007258
申请日：2011-01-14
申请人： Masayuki Ichige , Fumitaka Arai , Riichiro Shirota , Toshitake Yaegashi , Yoshio Ozawa , Akihito Yamamoto , Ichiro Mizushima , Yoshihiko Saito
发明人： Masayuki Ichige , Fumitaka Arai , Riichiro Shirota , Toshitake Yaegashi , Yoshio Ozawa , Akihito Yamamoto , Ichiro Mizushima , Yoshihiko Saito
IPC分类号： H01L29/788
CPC分类号： H01L29/42336 , H01L21/28273 , H01L27/0207 , H01L27/115 , H01L27/11521 , H01L27/11524 , H01L29/42324 , H01L29/7881
摘要： A nonvolatile semiconductor memory includes first and second memory cells having a floating gate and a control gate. The floating gate of the first and second memory cells is comprised a first part, and a second part arranged on the first part, and a width of the second part in an extending direction of the control gate is narrower than that of the first part. A first space between the first parts of the first and second memory cells is filled with one kind of an insulator. The control gate is arranged at a second space between the second parts of the first and second memory cells.
摘要翻译：非易失性半导体存储器包括具有浮动栅极和控制栅极的第一和第二存储单元。第一和第二存储单元的浮动栅极包括第一部分和布置在第一部分上的第二部分，并且第二部分在控制栅极的延伸方向上的宽度比第一部分的宽度窄。第一和第二存储单元的第一部分之间的第一空间填充有一种绝缘体。控制栅极被布置在第一和第二存储单元的第二部分之间的第二空间处。

4. 再颁专利

USRE44630E1 Semiconductor device and method for manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：USRE44630E1
公开(公告)日：2013-12-10
申请号：US13616208
申请日：2012-09-14
申请人： Tetsuya Kai , Ryuji Ohba , Yoshio Ozawa
发明人： Tetsuya Kai , Ryuji Ohba , Yoshio Ozawa
IPC分类号： H01L21/331
CPC分类号： H01L21/28273 , B82Y10/00 , H01L21/28282 , H01L27/11521 , H01L29/42332 , H01L29/7881
摘要： A semiconductor device includes a semiconductor substrate, and a nonvolatile memory cell provided on the semiconductor substrate, the nonvolatile memory cell including a tunnel insulating film provided on a surface of the semiconductor substrate, the tunnel insulating film including semiconductor grains, the semiconductor grains included in both end portions of the tunnel insulating film having smaller grain size than the semiconductor grains included in other portions of the tunnel insulating film, a charge storage layer provided on the tunnel insulating film, an insulating film provided on the charge storage layer, and a control gate electrode provided on the insulating film.
摘要翻译：半导体器件包括半导体衬底和设置在半导体衬底上的非易失性存储单元，所述非易失性存储单元包括设置在所述半导体衬底的表面上的隧道绝缘膜，所述隧道绝缘膜包括半导体晶粒，所述半导体晶粒包括在隧道绝缘膜的两端部比隧道绝缘膜的其他部分所包含的半导体晶粒小的晶粒尺寸，隧道绝缘膜上设置的电荷存储层，设置在电荷存储层上的绝缘膜，以及控制栅电极设置在绝缘膜上。

5. 发明授权

US08604536B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08604536B2
公开(公告)日：2013-12-10
申请号：US12406841
申请日：2009-03-18
申请人： Katsuyuki Sekine , Yoshio Ozawa
发明人： Katsuyuki Sekine , Yoshio Ozawa
IPC分类号： H01L29/792
CPC分类号： H01L29/792 , H01L21/28282 , H01L29/513 , H01L29/66833
摘要： A semiconductor device includes a memory cell transistor including a first lower insulating film provided on a semiconductor substrate, a first intermediate insulating film provided on the first lower insulating film, a first upper insulating film provided on the first intermediate insulating film, and a first gate electrode provided on the first upper insulating film, and a select transistor including a second lower insulating film provided on the semiconductor substrate, a second intermediate insulating film provided on the second lower insulating film, a second upper insulating film provided on the second intermediate insulating film, and a second gate electrode provided on the second upper insulating film, wherein trap density of the second intermediate insulating film is lower than that of the first intermediate insulating film.
摘要翻译：半导体器件包括存储单元晶体管，其包括设置在半导体衬底上的第一下绝缘膜，设置在第一下绝缘膜上的第一中间绝缘膜，设置在第一中间绝缘膜上的第一上绝缘膜和第一栅极设置在第一上绝缘膜上的电极和设置在半导体衬底上的第二下绝缘膜的选择晶体管，设置在第二下绝缘膜上的第二中间绝缘膜，设置在第二中间绝缘膜上的第二上绝缘膜以及设置在第二上绝缘膜上的第二栅电极，其中第二中间绝缘膜的阱密度低于第一中间绝缘膜的陷阱密度。

6. 发明授权

US08324679B2 Nonvolatile semiconductor memory 有权
标题翻译：非易失性半导体存储器
公开(公告)号：US08324679B2
公开(公告)日：2012-12-04
申请号：US13430153
申请日：2012-03-26
申请人： Masayuki Ichige , Fumitaka Arai , Riichiro Shirota , Toshitake Yaegashi , Yoshio Ozawa , Akihito Yamamoto , Ichiro Mizushima , Yoshihiko Saito
发明人： Masayuki Ichige , Fumitaka Arai , Riichiro Shirota , Toshitake Yaegashi , Yoshio Ozawa , Akihito Yamamoto , Ichiro Mizushima , Yoshihiko Saito
IPC分类号： H01L29/788
CPC分类号： H01L29/42336 , H01L21/28273 , H01L27/0207 , H01L27/115 , H01L27/11521 , H01L27/11524 , H01L29/42324 , H01L29/7881
摘要： A nonvolatile semiconductor memory includes first and second memory cells having a floating gate and a control gate. The floating gate of the first and second memory cells is comprised a first part, and a second part arranged on the first part, and a width of the second part in an extending direction of the control gate is narrower than that of the first part. A first space between the first parts of the first and second memory cells is filled with one kind of an insulator. The control gate is arranged at a second space between the second parts of the first and second memory cells.
摘要翻译：非易失性半导体存储器包括具有浮动栅极和控制栅极的第一和第二存储单元。第一和第二存储单元的浮动栅极包括第一部分和布置在第一部分上的第二部分，并且第二部分在控制栅极的延伸方向上的宽度比第一部分的宽度窄。第一和第二存储单元的第一部分之间的第一空间填充有一种绝缘体。控制栅极被布置在第一和第二存储单元的第二部分之间的第二空间处。

7. 发明申请

US20120282773A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20120282773A1
公开(公告)日：2012-11-08
申请号：US13487280
申请日：2012-06-04
申请人： Isao Kamioka , Junichi Shiozawa , Ryu Kato , Yoshio Ozawa
发明人： Isao Kamioka , Junichi Shiozawa , Ryu Kato , Yoshio Ozawa
IPC分类号： H01L21/302
CPC分类号： H01L29/7881 , H01L21/76208 , H01L27/11521 , H01L29/66825
摘要： In one embodiment, a method of manufacturing a semiconductor device includes forming a conductive film whose upper surface and side surface are exposed and an insulation film whose upper surface is exposed, on a semiconductor substrate. The method further includes supplying oxidizing ions or nitriding ions contained in plasma generated by a microwave, a radio-frequency wave, or electron cyclotron resonance to the exposed side surface of the conductive film and the exposed upper surface of the insulation film, by applying a predetermined voltage to the semiconductor substrate, thereby performing anisotropic oxidation or anisotropic nitridation of the exposed side surface of the conductive film and the exposed upper surface of the insulation film.
摘要翻译：在一个实施例中，制造半导体器件的方法包括在半导体衬底上形成其上表面和侧表面被暴露的导电膜和上表面暴露的绝缘膜。该方法还包括通过施加微波，射频波或电子回旋共振等将由等离子体产生的等离子体中包含的氧化离子或氮化离子供应到导电膜的暴露侧表面和绝缘膜的暴露的上表面对半导体衬底施加预定的电压，从而进行导电膜的暴露的侧表面和绝缘膜的暴露的上表面的各向异性氧化或各向异性氮化。

8. 发明授权

US08304352B2 Method of manufacturing a semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08304352B2
公开(公告)日：2012-11-06
申请号：US13051031
申请日：2011-03-18
申请人： Masayuki Tanaka , Kazuhiro Matsuo , Yoshio Ozawa
发明人： Masayuki Tanaka , Kazuhiro Matsuo , Yoshio Ozawa
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/28282 , H01L27/11568 , H01L27/11582
摘要： According to an embodiment, there is provided a method of manufacturing a semiconductor device, including forming a nitride film by nitriding a surface of an underlying region having a semiconductor region containing silicon as a main component and an insulating region containing silicon and oxygen as a main component and adjacent to the semiconductor region, carrying out oxidation with respect to the nitride film to convert a portion of the nitride film which is formed on the insulating region into an oxide film and to leave a portion of the nitride film which is formed on the semiconductor region as at least part of a charge storage insulating film, forming a block insulating film on the charge storage insulating film, and forming a gate electrode film on the block insulating film.
摘要翻译：根据一个实施例，提供一种制造半导体器件的方法，包括通过氮化作为主要成分的含有硅的半导体区域的下面的区域的表面和以硅和氧为主要的绝缘区域来形成氮化物膜并且与半导体区域相邻，相对于氮化物膜进行氧化，将形成在绝缘区域上的氮化物膜的一部分转换为氧化膜，并且使形成在该半导体层上的氮化膜的一部分半导体区域作为电荷存储绝缘膜的至少一部分，在电荷存储绝缘膜上形成块绝缘膜，并在块绝缘膜上形成栅极电极膜。

9. 发明授权

US08198159B2 Semiconductor memory device and method of manufacturing the same 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US08198159B2
公开(公告)日：2012-06-12
申请号：US12054089
申请日：2008-03-24
申请人： Masayuki Tanaka , Yoshio Ozawa , Hirokazu Ishida , Katsuaki Natori , Seiji Inumiya
发明人： Masayuki Tanaka , Yoshio Ozawa , Hirokazu Ishida , Katsuaki Natori , Seiji Inumiya
IPC分类号： H01L21/324 , H01L29/788
CPC分类号： H01L29/7881 , G11C16/0483 , H01L21/28273 , H01L27/115 , H01L27/11521 , H01L29/42324 , H01L29/513
摘要： A semiconductor memory device includes a semiconductor substrate, an isolation insulation film filled in a plurality of trenches formed in the semiconductor substrate to define a plurality of element formation regions, a floating gate of polysilicon provided on each of the element formation regions through a first insulation film, a second insulation film, provided on the floating gate, containing a metal element, a control gate of polysilicon, provided on the second insulation film, and source/drain regions provided in the semiconductor substrate, both a polysilicon conductive layer containing a metal element and a mutual diffusion layer composed of a silicate layer of a mixed oxide material composed of a silicon element contained in the floating gate and the control gate and a metal element contained in the second insulation film are provided on a surface of each of the floating gate and the control gate, respectively.
摘要翻译：半导体存储器件包括半导体衬底，隔离绝缘膜，填充在形成于半导体衬底中的多个沟槽中，以限定多个元件形成区域;多晶硅浮置栅极，通过第一绝缘层设置在每个元件形成区域上; 设置在浮置栅极上的第二绝缘膜，包含设置在第二绝缘膜上的金属元件，多晶硅控制栅极和设置在半导体衬底中的源极/漏极区域，包含金属的多晶硅导电层元件和由浮置栅极中包含的硅元素和控制栅极组成的混合氧化物材料的硅酸盐层和包含在第二绝缘膜中的金属元素构成的互扩散层设置在每个浮动栅极的表面上门和控制门。

10. 发明申请

US20120094476A1 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20120094476A1
公开(公告)日：2012-04-19
申请号：US13051031
申请日：2011-03-18
申请人： Masayuki TANAKA , Kazuhiro Matsuo , Yoshio Ozawa
发明人： Masayuki TANAKA , Kazuhiro Matsuo , Yoshio Ozawa
IPC分类号： H01L21/28
CPC分类号： H01L21/28282 , H01L27/11568 , H01L27/11582
摘要： According to an embodiment, there is provided a method of manufacturing a semiconductor device, including forming a nitride film by nitriding a surface of an underlying region having a semiconductor region containing silicon as a main component and an insulating region containing silicon and oxygen as a main component and adjacent to the semiconductor region, carrying out oxidation with respect to the nitride film to convert a portion of the nitride film which is formed on the insulating region into an oxide film and to leave a portion of the nitride film which is formed on the semiconductor region as at least part of a charge storage insulating film, forming a block insulating film on the charge storage insulating film, and forming a gate electrode film on the block insulating film.
摘要翻译：根据一个实施例，提供一种制造半导体器件的方法，包括通过氮化作为主要成分的含有硅的半导体区域的下面的区域的表面和以硅和氧为主要的绝缘区域来形成氮化物膜并且与半导体区域相邻，相对于氮化物膜进行氧化，将形成在绝缘区域上的氮化物膜的一部分转换为氧化膜，并且使形成在该半导体层上的氮化膜的一部分半导体区域作为电荷存储绝缘膜的至少一部分，在电荷存储绝缘膜上形成块绝缘膜，并在块绝缘膜上形成栅极电极膜。

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