专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明专利

DE3910185C2 未知
公开(公告)号：DE3910185C2
公开(公告)日：1998-09-24
申请号：DE3910185
申请日：1989-03-29
申请人： NIPPON STEEL CORP , NSC ELECTRON CORP
发明人： TACHIMORI MASAHARU , ARAKI HIDEO , ISHIZAKA KAZUNORI
IPC分类号： H01L21/322 , H01L21/22

2. 发明专利

DE3910185A1 Silicon wafer having excellent getter capability, and method for fabricating it 未知
公开(公告)号：DE3910185A1
公开(公告)日：1989-10-12
申请号：DE3910185
申请日：1989-03-29
申请人： NIPPON STEEL CORP , NSC ELECTRON CORP
发明人： TACHIMORI MASAHARU , ARAKI HIDEO , ISHIZAKA KAZUNORI
IPC分类号： H01L21/322
摘要： A silicon wafer is described which comprises a substrate of a single-crystal silicon, on a surface of the substrate a silicon oxide film having a thickness of from 1 to 8 ANGSTROM (from 0.1 to 0.8 nm), and a polysilicon layer on the silicon oxide film, and which has an excellent getter capability. This silicon wafer is prepared by oxidation of the substrate of the single-crystal silicon, as a result of which there is formed on the surface a silicon oxide film having a thickness of from 1 to 8 ANGSTROM (from 0.1 to 0.8 nm), and the silicon oxide film is exposed to gaseous silane at elevated temperature, as a result of which a polysilicon layer is formed on the silicon oxide film.

3. 发明专利

JP2001127067A SILICON SEMICONDUCTOR SUBSTRATE 失效
公开(公告)号：JP2001127067A
公开(公告)日：2001-05-11
申请号：JP30768099
申请日：1999-10-28
申请人： NIPPON STEEL CORP , NSC ELECTRON CORP
发明人： IKARI ATSUSHI , OHASHI WATARU , OTA YASUMITSU , ISHIZAKA KAZUNORI , TACHIKAWA AKIYOSHI
IPC分类号： H01L21/322 , C30B13/12 , C30B29/06
摘要： PROBLEM TO BE SOLVED: To form a silicon semiconductor substrate which has a surface denuded layer of high quality and a defective layer excellent in gettering capability and is excellent in mechanical strength. SOLUTION: In a semiconductor substrate is obtained from silicon single crystal grown by the Czochralski method, the surface density of crystal defect of at least 0.1 μm in terms of diameter on the substrate surface is at least 1/cm2. In a region from at least substrate surface to a depth of 1 μm, the density of the defect is at most 105/cm3. In the central part of the substrate thickness, the density of the defect is at least 108/cm3. When the content of nitrogen is [N] (atoms/cm3) and the content of oxygen is [O] (atoms/cm3) in the central part of the substrate thickness, 6×1017

4. 发明专利

JPH11106282A SILICONE SINGLE CRYSTAL, ITS PRODUCTION AND ITS EVALUATION 失效
公开(公告)号：JPH11106282A
公开(公告)日：1999-04-20
申请号：JP28465897
申请日：1997-10-01
申请人： NIPPON STEEL CORP , NSC ELECTRON CORP
发明人： NAKAI KATSUHIKO , HASEBE MASAMI , OTA KUNITERU , ISHIZAKA KAZUNORI , IWASAKI TOSHIO
IPC分类号： G01N21/88 , C30B15/00 , C30B29/06 , G01N21/00 , G01N21/94 , G01N21/956 , H01L21/66
摘要： PROBLEM TO BE SOLVED: To obtain a single crystal good in the breakdown strength characteristics of an oxide membrane, and the leak characteristics of a p-n junction by regulating the density of COP having a size not less than a specific value measured by a surface foreign body meter so as to be not larger than a specified number over the whole surface of a wafer, and the size of a dislocation cluster so as to be not larger than the specific value over the whole surface of the wafer. SOLUTION: This single crystal is the one having /cm density of COP with >=0.11 μm size measured by a surface foreign body meter over the whole surface of a wafer, μm/cm product of the average value of the dislocation cluster sizes and the density of the dislocation clusters. The single crystal is produced by a Czochralski process by growing the single crystal under a condition of / deg.C/min) V/G [V(mm/min) is a crystal growing rate; G ( deg.C/mm) is a temperature gradient between a silicon molten liquid and a crystal interface in the crystal growing direction] at

5. 发明专利

JPH07335656A GETTERING METHOD 失效
公开(公告)号：JPH07335656A
公开(公告)日：1995-12-22
申请号：JP12534894
申请日：1994-06-07
申请人： NIPPON STEEL CORP
发明人： ISHIZAKA KAZUNORI
IPC分类号： H01L21/322
摘要： PURPOSE:To provide a thermal treatment through which unwanted heavy metal impurities are removed in a semiconductor integrated circuit manufacturing process. CONSTITUTION:A thermal treatment is carried out in a semiconductor device manufacturing process through such a method that it is carried out at a cooling rate of 0.1 deg.C/minute to 1.0 deg.C/minute in a temperature range of 790 deg.C to 750 deg.C from 800 deg.C, 0.1 deg.C/minute to 2.0 deg.C/minute in a temperature range of 750 deg.C to 700 deg.C from soot, and 0.1 deg.C/minute to 3.0 deg.C/minute in a temperature range of voov to 600 deg.C from 800 deg.C. By this setup, elements such as iron slow in diffusion and weak in gettering effect are effectively gettered.

6. 发明专利

JPH07335655A GETTERING METHOD 失效
公开(公告)号：JPH07335655A
公开(公告)日：1995-12-22
申请号：JP12534794
申请日：1994-06-07
申请人： NIPPON STEEL CORP
发明人： ISHIZAKA KAZUNORI
IPC分类号： H01L21/322
摘要： PURPOSE:To provide a thermal treating method by which unwanted heavy metal impurities are removed in a semiconductor integrated circuit manufacturing process. CONSTITUTION:A thermal treatment is carried out in a semiconductor device manufacturing process through such a method that it is carried out for 1 to 24 hours at a temperature of 600 to 650 deg.C, 30 minutes to 24 hours at a temperature of 650 to 700 deg.C, 15 minutes to 24 hours at a temperature of 700 to 750 deg.C, and 10 minutes to 24 hours at a temperature of 750 to 800 deg.C. By this setup, elements such as iron and the like slow in diffusion and weak in gettering effect are effectively gettered.

7. 发明专利

JPH01315144A SILICON WAFER OF EXCELLENT GETTERING CAPACITY AND ITS MANUFACTURE 失效
公开(公告)号：JPH01315144A
公开(公告)日：1989-12-20
申请号：JP7976289
申请日：1989-03-30
申请人： NIPPON STEEL CORP , NITTETSU DENSHI KK
发明人： TACHIMORI OJI , ISHIZAKA KAZUNORI , ARAKI HIDEO
IPC分类号： H01L21/322
摘要： PURPOSE:To enhance a gettering capacity by forming a polycrystalline silicon layer on a single-crystal silicon substrate via a silicon oxide film having a specified thickness. CONSTITUTION:This silicon wafer is composed of the following: a single-crystal substrate; a silicon oxide film, with a thickness of 1 to 8Angstrom , formed on one surface of the substrate; a polycrystalline silicon layer formed on the silicon oxide film. In order to form the silicon oxide film on the surface of the singlecrystal silicon substrate, the substrate is heated in a gas containing molecular oxygen or in an atmosphere of steam. A thickness of the polycrystalline silicon layer formed on this silicon oxide film is 1000Angstrom to 5mum; its crystal particle is not amorphous and is 2mum or lower. When the single-crystal substrate is heated under a reduced pressure or under normal pressure in an atmosphere of gaseous silanes diluted by nitrogen gas or the like, the polycrystalline silicon layer of an excellent close contact force can be formed in a uniform thickness. By this setup, it is possible to obtain the silicon wafer whose gettering capacity is excellent.

8. 发明专利

JPH1143393A SILICON SINGLE CRYSTAL WAFER AND ITS PRODUCTION 失效
公开(公告)号：JPH1143393A
公开(公告)日：1999-02-16
申请号：JP19755097
申请日：1997-07-23
申请人： NIPPON STEEL CORP , NITTETSU DENSHI KK
发明人： NAKAI KATSUHIKO , HASEBE MASAMI , OTA KUNITERU , IWASAKI TOSHIO , ISHIZAKA KAZUNORI
IPC分类号： C30B15/20 , C30B29/06 , H01L21/208
摘要： PROBLEM TO BE SOLVED: To produce excellent withstand voltage characteristics of an oxide film by regulating the density of crystal originated particles(COP) having a specific size or above of a silicon single crystal, produced by a Czochralski method and measured with a surface foreign material meter to a specific number or below over the whole surface and the dislocation cluster density to a specific value or below. SOLUTION: This silicon single crystal wafer is obtained by regulating the density of COP having >=0.11 μm size measured by a surface foreign matter meter to over the whole surface of the wafer and the dislocation cluster density to over the whole surface of the wafer and is a silicon single crystal prepared by growing a crystal under conditions so as to provide / deg.C.min V/G when the crystal growth rate is V mm/min and the crystallization temperature gradient in the interface between a silicon melt and the crystal is G deg.C/mm. The cooling rate in a region from the melting point of the silicon to 1,200 deg.C when growing the crystal is preferably

9. 发明专利

JPH08340008A CLEANNESS ESTIMATION METHOD OF HEAT-TREATING FURNACE 失效
公开(公告)号：JPH08340008A
公开(公告)日：1996-12-24
申请号：JP16712995
申请日：1995-06-09
申请人： NIPPON STEEL CORP
发明人： ISHIZAKA KAZUNORI
IPC分类号： H01L21/324
摘要： PURPOSE: To estimate cleanness of a heat-treating furnace and atmosphere gas, with respect to each contamination element, by heat-treating a wafer wherein a polycrystalline silicon film is deposited on the wafer surface, gathering impurities from the heat-treating furnace and the atmosphere gas on the polycrystalline silicon film, and performing element analysis. CONSTITUTION: Contamination elements contained in a heat-treating furnace and atmosphere gas are diffused in a wafer during heat treatment. When a wafer having a polycrystalline silicon film on the silicon substrate surface is used, impurity elements diffused in the wafer during heat treatment are preferentially gathered in the polycrystalline silicon film on the surface during heat- treating or cooling. By analyzing the impurity elements gathered preferentially in the polycrystalline silicon layer, with respect to each element, the contamination of the heat-treating furnace can be estimated for element. By performing heat treatment for each atmosphere gas, and analyzing the polycrystalline silicon film, the contamination contained in each atmospher gas can be estimated.

10. 发明专利

JPH05335320A 失效
公开(公告)号：JPH05335320A
公开(公告)日：1993-12-17
申请号：JP14381992
申请日：1992-06-04
申请人： NIPPON STEEL CORP
发明人： ISHIZAKA KAZUNORI , NAKASHIZU TSUNEO , SASAKI JUN , SUGIYAMA KENJI
IPC分类号： H01L21/322
摘要： PURPOSE:To impart an effect of eliminating heavy metal impurities mixed in the manufacturing process of a semiconductor integrated circuit. CONSTITUTION:Carbon ions of more than 1X10 ions/cm are implanted in the rear side of a silicon semiconductor substrate, and the semiconductor substrate forms crystal defects of more than 1X10 pieces/cm on the rear of the silicon semiconductor substrate by heat treatment of oxidizing atmosphere. On the basis of the defects generated at the time of ion implantation, secondary defects are generated by oxidizing heat treatment. By utilizing the rear of the semiconductor substrate as a gettering site, a gettering wafer can be manufactured with higher productivity than that of the conventional technology in which an ion-implantation layer is used as the gettering site.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式