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1. 发明公开

EP0448713A4 SEMICONDUCTOR DEVICE. 失效
标题翻译：半导体器件。
公开(公告)号：EP0448713A4
公开(公告)日：1991-07-09
申请号：EP89908519
申请日：1989-07-21
申请人： NIPPON DENSO CO , NIPPON SOKEN
发明人： OHARA FUMIO , KAWAI TOSHIYUKI , SAKAKIBARA NOBUYOSHI , HUZINO SEIZI , HATTORI TADASHI , KAWAMOTO KAZUNORI
IPC分类号： H01L21/60 , H01L23/13 , H01L23/538 , H01L29/06
CPC分类号： H01L24/32 , H01L23/13 , H01L23/5384 , H01L24/24 , H01L24/82 , H01L29/0657 , H01L2224/24137 , H01L2224/24225 , H01L2224/24227 , H01L2224/73267 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01023 , H01L2924/01033 , H01L2924/01322 , H01L2924/014 , H01L2924/04953 , H01L2924/10157 , H01L2924/10158 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/00
摘要： This invention relates to a semiconductor device of a type wherein a semiconductor chip is directly bonded to a substrate and contact is established between them. The semiconductor device comprises the substrate in which fixing holes having a tapered portion are formed, the semiconductor chip having a tapered portion corresponding to the fixing hole and having devices formed thereon, coupling members for coupling the tapered portions of the substrate and the semiconductor chip in such a manner as to oppose to each other, a flattening layer formed in such a manner as to extend over the substrate and the semiconductor chip and wires electrically connected to said devices and at least part of which is formed on the flattening layer. According to this structure, positioning accuracy of the semiconductor chip can be improved easily and the wiring pitch can be reduced drastically.

2. 发明专利

DE68910327D1 未知
公开(公告)号：DE68910327D1
公开(公告)日：1993-12-02
申请号：DE68910327
申请日：1989-07-21
申请人： NIPPON DENSO CO , NIPPON SOKEN
发明人： OHARA FUMIO , KAWAI TOSHIYUKI , SAKAKIBARA NOBUYOSHI , HUZINO SEIZI , HATTORI TADASHI , KAWAMOTO KAZUNORI
IPC分类号： H01L21/60 , H01L23/13 , H01L23/538 , H01L29/06 , H01L23/52
摘要： This invention relates to a semiconductor device of a type wherein a semiconductor chip is directly bonded to a substrate and contact is established between them. The semiconductor device comprises the substrate in which fixing holes having a tapered portion are formed, the semiconductor chip having a tapered portion corresponding to the fixing hole and having devices formed thereon, coupling members for coupling the tapered portions of the substrate and the semiconductor chip in such a manner as to oppose to each other, a flattening layer formed in such a manner as to extend over the substrate and the semiconductor chip and wires electrically connected to said devices and at least part of which is formed on the flattening layer. According to this structure, positioning accuracy of the semiconductor chip can be improved easily and the wiring pitch can be reduced drastically.

3. 发明专利

DE68910327T2 未知
公开(公告)号：DE68910327T2
公开(公告)日：1994-05-19
申请号：DE68910327
申请日：1989-07-21
申请人： NIPPON DENSO CO , NIPPON SOKEN
发明人： OHARA FUMIO , KAWAI TOSHIYUKI , SAKAKIBARA NOBUYOSHI , HUZINO SEIZI , HATTORI TADASHI , KAWAMOTO KAZUNORI
IPC分类号： H01L21/60 , H01L23/13 , H01L23/538 , H01L29/06 , H01L23/52
摘要： This invention relates to a semiconductor device of a type wherein a semiconductor chip is directly bonded to a substrate and contact is established between them. The semiconductor device comprises the substrate in which fixing holes having a tapered portion are formed, the semiconductor chip having a tapered portion corresponding to the fixing hole and having devices formed thereon, coupling members for coupling the tapered portions of the substrate and the semiconductor chip in such a manner as to oppose to each other, a flattening layer formed in such a manner as to extend over the substrate and the semiconductor chip and wires electrically connected to said devices and at least part of which is formed on the flattening layer. According to this structure, positioning accuracy of the semiconductor chip can be improved easily and the wiring pitch can be reduced drastically.

4. 发明专利

JPH0243771A MANUFACTURE OF INSULATED GATE TYPE SEMICONDUCTOR ELEMENT 失效
公开(公告)号：JPH0243771A
公开(公告)日：1990-02-14
申请号：JP19492988
申请日：1988-08-04
申请人： NIPPON SOKEN , NIPPON DENSO CO
发明人： FUJINO SEIJI , SAKAKIBARA NOBUYOSHI , MURAMOTO HIDETOSHI , HATTORI TADASHI , MUTO KOJI
IPC分类号： H01L27/12 , H01L21/336 , H01L29/78 , H01L29/786
摘要： PURPOSE:Not only to alleviate the ruggedness of a polycrystalline silicon surface, which is made to serve as an active region, so as to eliminate a gate failure due to a short circuit but also to improve a semiconductor element in electrical properties such as a carrier mobility and the like by a method wherein a polycrystalline silicon film is formed in film as thick as a specified value or more, which is covered with a cap layer and subjected to a heat treatment at a high temperature and whose surface is flattened. CONSTITUTION:In the manufacture of an insulated gate type semiconductor element provided with a polycrystalline silicon layer 3, serving as an active region deposited on an insulating layer 2, deposited on an insulating layer 2, the polycrystalline silicon layer 3 is formed in film as thick as more than 0.5mum. Then, after the surface of the polycrystalline silicon layer 3 is flattened, the vicinity of the flattened surface of the silicon layer 3, which is thicker than 0.5mum, is made to serve as a channel region 3b-2, and a gate electrode 5 is formed on the region 3b-2 through the intermediary of a gate insulating film 4 and concurrently a drain region 3b-1 and a source region 3b-2 are formed inside the polycrystalline silicon layer 3 so as to be connected to the channel region 3b-2.

5. 发明专利

JPS629302A PRODUCTION OF INTERFERENCE COLOR MIRROR 失效
公开(公告)号：JPS629302A
公开(公告)日：1987-01-17
申请号：JP14765985
申请日：1985-07-06
申请人： NIPPON SOKEN , NIPPON DENSO CO
发明人： UENO YOSHIKI , TAGUCHI TAKASHI , HATTORI TADASHI , INAYOSHI KOJI , SOWA KUNIYASU , TAKEUCHI SACHIOSA
IPC分类号： G02B5/08 , G02B5/26 , G02B5/28
摘要： PURPOSE:To prevent the generation of the uneven colors of an interference color mirror by depositing a thin transparent oxide film of uniform quality by evaporation on a mirror substrate in a vacuum deposition chamber then forming a thin metallic film thereon by an ordinary vapor deposition stage. CONSTITUTION:Oxygen or a gaseous mixture composed of oxygen and inert gas is introduced from an introducing port 9 into a vacuum deposition chamber 1 and ions are irradiated onto a substrate 5 by an ion source 8. An evaporating material 11 is deposited by evaporation onto the substrate 5 from an electron beam vapor source 2 to form the thin transparent oxide film thereon. The thin metallic film is then formed thereon by the ordinary vapor deposition method. The thin oxide film is oxidized to a stable oxide having the uniform quality and thereafter the thin metallic film is formed in the above-mentioned manner, by which the uneven refractive index is eliminated and the generation of the uneven color of the interference color mirror is prevented.

6. 发明专利

JPH02189960A MOUNTING STRUCTURE OF INTEGRATED CIRCUIT DEVICE 失效
公开(公告)号：JPH02189960A
公开(公告)日：1990-07-25
申请号：JP1023589
申请日：1989-01-18
申请人： NIPPON SOKEN , NIPPON DENSO CO
发明人： MATSUMOTO MUNEAKI , OTSUKA YOSHINORI , HATTORI TADASHI
IPC分类号： H01L25/00 , H01L23/00 , H03H7/01
摘要： PURPOSE:To attain miniaturization and improve noise resistance and surge characteristics by electrically connecting an integrated circuit element to a plurality of leads through electrodes formed onto both surfaces of a varistor. CONSTITUTION:A signal such as a power supply signal introduced from a lead 3 is wire-bonded onto an electrode 7 on a varistor 2 once through wire-bonding wires 4, and introduced to an IC chip 1. Consequently, currents made to flow through the IC chip 1 and the varistor 2 are made to flow to the outside only through the lead 3, thus preventing leakage through a case 6. Since the sintered dielectric 2 is insulated electrically from the case 6 but it is connected thermally to the case, heat generation with energy absorption at the time of the generation of a surge can be inhibited by the heat dissipation of the case, thus increasing energy resistance. Accordingly, noise resistance and surge characteristics are improved while miniaturization is enabled.

7. 发明专利

JPH02178965A INSULATED ISOLATION TYPE FIELD-EFFECT SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH02178965A
公开(公告)日：1990-07-11
申请号：JP33164488
申请日：1988-12-29
申请人： NIPPON DENSO CO , NIPPON SOKEN
发明人： SAKAKIBARA NOBUYOSHI , FUJINO SEIJI , MURAMOTO HIDETOSHI , HATTORI TADASHI , YAMAOKA MASAMI
IPC分类号： H01L27/00 , H01L27/10 , H01L27/12 , H01L29/786
摘要： PURPOSE:To stabilize the electrical characteristics of an SOI element, and to prevent a back channel by applying bias voltage to a conductor electrically conducted with a channel region and electrically isolated from source-drain regions. CONSTITUTION:A conductor 21, which is arranged just under a channel region 33 while being formed onto at least an insulator 20 and buried into the insulator 20, a top face of which in integral combination is formed to a plane shape and which is conducted electrically with the channel region 33 and isolated electrically from source-drain regions 32a, 32b, is shaped. Consequently, the conductor 21 is formed just under the channel region 33 while being electrically conducted with the channel region 33, thus applying bias voltage to the conductor 21 even when any potential is applied to a semiconductor substrate 10. Accordingly, the electrical characteristics of an SOI(Silicon on Insulator) element are stabilized, and the generation of a back channel can be prevented.

8. 发明专利

JPH0296350A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH0296350A
公开(公告)日：1990-04-09
申请号：JP24873788
申请日：1988-09-30
申请人： NIPPON SOKEN , NIPPON DENSO CO
发明人： TSURUTA KAZUHIRO , FUJINO SEIJI , KATADA MITSUTAKA , HATTORI TADASHI , YAMAOKA MASAMI
IPC分类号： H01L21/762 , H01L21/76 , H01L27/088 , H01L27/144
摘要： PURPOSE:To form vertical power elements and form an element isolation region in a little time in such a way that its region has high breakdown strength and does not diffuse crosswise very much by forming an insulation isolating region which is isolated by an oxide film in the first semiconductor substrate. CONSTITUTION:An recessed part 2 is formed on the mirror side of the first semiconductor substrate 1 on which one side face of its substrate is polished into a mirror and along the most part of an interface between the recessed part 2 and the mirror 1a, each trench part 3 which is deeper than the recessed part 2 is formed. The mirror of the second semiconductor substrate 5 where one side face of it is polished into the mirror is joined directly with the mirror of the first semiconductor substrate 1. A space which is formed on a joined substrate 10 between the recessed part 2 of the first semiconductor substrate 1 and the mirror of the second semiconductor substrate 5 is buried by an oxide film 11; besides, the oxide film 11 is formed at side faces of each trench part of the semiconductor substrate 1 to allow the trench part to be exposed to the outside from the other side of the first semiconductor substrate 1. Consequently, vertical power elements are formed at regions other than the element isolating region and then, an insulating isolating region is thus formed by the oxide film 11. Its region is formed in a short time in such a manner that it does not diffuse crosswise very much and has high breakdown strength.

9. 发明专利

JPS63118622A IGNITION PERIOD SENSOR 失效
公开(公告)号：JPS63118622A
公开(公告)日：1988-05-23
申请号：JP26396986
申请日：1986-11-07
申请人： NIPPON SOKEN , NIPPON DENSO CO
发明人： ITO NOBUE , HATTORI TADASHI , MATSUSHIRO RYUICHI , MATSUMOTO HISASHI
IPC分类号： F23N5/08 , F02P17/12 , G01J1/02 , G01J5/04
摘要： PURPOSE:To obtain an ignition period sensor which is reliable for a long period by boring a through-hole in a case flank between the tip opening part of a case which holds a light guide rod and the tip part of the light guide rod. CONSTITUTION:This sensor is equipped with the light guide rod 30 made of a photoconductive such as a quartz rod, a cylindrical case 32 made of metal with high heat resistance for holding the rod 30 while a combustion chamber is shielded from the outside air, and a photodetecting element which is arranged opposite the rear end of the rod 30 and photodetects and converts combustion light guided by the rod 30 into an electric signal. Further, the through-hole 70 is bored in the flank of a tube 32A between the tip opening part 32D of the tube 32A at the case tip part where the rod 30 is held and the light guide rod tip 30A. Combustion gas flows from the opening part 32D to the through- hole 70, so the gas flows at a relatively high speed at the rod tip 30A. Thus, the stagnant part of the combustion gas is eliminated at the rod tip part 30A, so a soot substance is prevented from sticking.

10. 发明专利

JPS62163755A ION WIND TYPE AIR CLEANER 失效
公开(公告)号：JPS62163755A
公开(公告)日：1987-07-20
申请号：JP553986
申请日：1986-01-14
申请人： NIPPON SOKEN , NIPPON DENSO CO
发明人： NOGUCHI HIROKI , FUKAMI AKIRA , HATTORI TADASHI , NABETA SADAICHI
IPC分类号： B03C3/40 , B03C3/41
摘要： PURPOSE:To prevent the turbulence of an ion wind by arranging an ion-repelling electrode on the air suction port side of a discharge electrode so that an electric potential intermediate between those of the discharge electrode and an electric field-forming electrode is impressed. CONSTITUTION:A dust-collecting electrode 2 is arranged at a position intermediate between the counter electrodes 3. At this time, the upstream end part 3a, with respect to the air current, of the dust-collecting electrode 3 is placed on the downstream side of the upstream end part 2a of the counter electrode 2. The discharge electrode 1 is placed on the upstream side of the counter electrode 2, and arranged at a position between the counter electrodes 2. The ion- repelling electrodes 4 are embedded in the wall surface of a duct 5 on the upstream side of the discharge electrode 1 at regular intervals, and made flush with the inner surface of the duct. A positive electric potential lower than that of the discharge electrode 1 is impressed on the ion-repelling electrode 4 by a high-voltage power source 6.

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