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1. 发明专利

DE69108957D1 未知
公开(公告)号：DE69108957D1
公开(公告)日：1995-05-24
申请号：DE69108957
申请日：1991-02-21
申请人： NIPPON DENSO CO
发明人： ISOBE YOSHIHIKO , IIDA MAKIO , MIURA SHOJI , KAJIURA KEIZOU , SUZUKI MIKIMASA , SAITO MASAMI
IPC分类号： H01L27/04 , H01L21/02 , H01L21/82 , H01L21/822 , H01L21/3205 , H01L23/525

2. 发明专利

DE19520768A1 Prodn. of semiconductor device with thin film resistance 未知
公开(公告)号：DE19520768A1
公开(公告)日：1995-12-14
申请号：DE19520768
申请日：1995-06-07
申请人： NIPPON DENSO CO
发明人： OHKAWA MAKOTO , IIDA MAKIO , SUZUKI MIKIMASA
IPC分类号： H01L27/04 , H01L21/02 , H01L21/822 , H01L21/70
摘要： Prodn. of a semiconductor device with a thin film resistance comprises: (a) forming a semiconductor element in a substrate (1); (b) forming an insulating film (2) on one surface of the substrate; (c) forming a contact hole in the insulating film; (d) applying a material (3) of the thin film resistance on the welding film; (e) moulding the material to a thin film resistance (3) by dry chemical etching; and (e) forming electrodes (6) which are in contact with the thin film resistance and the semiconductor element via the contact hole.

3. 发明专利

DE69108957T2 未知
公开(公告)号：DE69108957T2
公开(公告)日：1995-11-16
申请号：DE69108957
申请日：1991-02-21
申请人： NIPPON DENSO CO
发明人： ISOBE YOSHIHIKO , IIDA MAKIO , MIURA SHOJI , KAJIURA KEIZOU , SUZUKI MIKIMASA , SAITO MASAMI
IPC分类号： H01L27/04 , H01L21/02 , H01L21/82 , H01L21/822 , H01L21/3205 , H01L23/525

4. 发明专利

JPH0590501A MANUFACTURE OF THIN FILM RESISTOR 失效
公开(公告)号：JPH0590501A
公开(公告)日：1993-04-09
申请号：JP25192591
申请日：1991-09-30
申请人： NIPPON DENSO CO , SHIBAURA ENG WORKS LTD
发明人： SUZUKI MIKIMASA , IIDA MAKIO , MUTO MAKOTO
IPC分类号： H01C17/06 , H01C17/12 , H01L21/02 , H01L21/822 , H01L27/04
摘要： PURPOSE:To obtain a so-called highly selective etching method wherein the etching rate of a CrSi based film on an oxide film is larger than that of an oxide film as a substratum, and obtain a manufacturing method for a highly reliable CrSi based thin film resistor which method does not generate voids at the end portion of the CrSi based thin film resistor. CONSTITUTION:In a method for forming a CrSi based thin film resistor on an oxide film 2, mixed gas of CF4 and oxygen wherein oxygen of volume ratio of 70% or higher is contained is turned into plasma, in a plasma generating chamber of a plasma etching equipment wherein the plasma generating chamber and a plasma etching chamber are isolated. The CrSi based film 7 on an oxide film 2 arranged in the etching chamber is selectively irradiated with activated fluorine radicals. Thereby the CrSi based film 7 on the oxide film 2 is etched with high selectivity.

5. 发明专利

JPH06196477A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH06196477A
公开(公告)日：1994-07-15
申请号：JP34587492
申请日：1992-12-25
申请人： NIPPON DENSO CO
发明人： ISOBE YOSHIHIKO , SUZUKI MIKIMASA , ITO SHUICHI , IIDA MAKIO , ISHIHARA OSAMU
IPC分类号： H01L21/316 , H01L21/318 , H01L21/822 , H01L27/04
摘要： PURPOSE:To obtain a void-free aluminum film by a method wherein a silicon nitride film is formed through a plasma CVD method on a protecting silicon oxide film provided onto the aluminum film, and the aluminum film is annealed under specific conditions. CONSTITUTION:An opening is provided to the prescribed region of a field oxide film 2, and then a thermal silicon oxide film 3 is formed on the exposed surface of an N capacitor electrode 9. Then, an opening is provided to the field oxide film 2 for the formation of a contact hole, an aluminum film 4 is formed on the thermal silicon oxide film 3, and an aluminum electrode 5 is provided inside the above contact hole. Then, a protecting silicon oxide film 6 is formed thereon through a CVD method, and furthermore a P-SiN film 7 is provided thereon through an RF plasma CVD method. Thereafter, a semiconductor device of this constitution is annealed for 5 to 60 minutes at a temperature range of 440 to 500 deg.C to recover its characteristics deteriorated by a plasma CVD process. By this setup, voids can be restrained from being produced in an aluminum film even if it is annealed at a high temperature.

6. 发明专利

JPH0845908A CHEMICAL DRY-ETCHING METHOD 失效
公开(公告)号：JPH0845908A
公开(公告)日：1996-02-16
申请号：JP18105094
申请日：1994-08-02
申请人： NIPPON DENSO CO
发明人： KAJIURA KEIZO , TOMITA MASAHIRO , SUZUKI MIKIMASA , OKAWA MAKOTO
IPC分类号： C23F4/00 , H01L21/302 , H01L21/3065
摘要： PURPOSE:To provide a chemical dry-etching(CDE) method in which the removal of mask material is unnecessary after etching of the material to be etched. CONSTITUTION:Chemical dry etching is conducted on the CrSi resistor 5 formed on an Si substrate using the etching gas of CF4+O2 with the O2 volume ratio of 80 to 95%. As a result, mask material 6 can be removed by etching simultaneously with the etching of the CrSi resistor 5.

7. 发明专利

JPH07335831A METHOD OF FABRICATING SEMICONDUCTOR DEVICE HAVING THIN FILM RESISTOR 失效
公开(公告)号：JPH07335831A
公开(公告)日：1995-12-22
申请号：JP12611594
申请日：1994-06-08
申请人： NIPPON DENSO CO
发明人： OKAWA MAKOTO , IIDA MAKIO , SUZUKI MIKIMASA
IPC分类号： H01L27/04 , H01L21/02 , H01L21/822
摘要： PURPOSE:To simplify the processes by executing the patterning of a thin film resistor after formation of a contact hole and to form a thin film resistor without giving damage on the contact region by patterning the thin film resistor with a chemical dry etching process. CONSTITUTION:A semiconductor element is formed within a silicon semiconductor substrate 1 and an oxide film 2 is formed on the surface of this semiconductor substrate 1. A contact hole is formed in this oxide film 2 and a CrSiN film 3 is then formed as a thin film resistor on this oxide film 2 and moreover a TiW film 4 as a barrier metal thereon. This TiW film 4 is patterned with a mask 5 and the CrSiN film 3 is patterned by chemical dry etching. Finally, An aluminum electrode 6 and a protective film 7 are formed on the semiconductor element and CrSiN film 3 via the contact hole.

8. 发明专利

JPH03242966A SEMICONDUCTOR DEVICE AND ITS MANUFACTURE 失效
公开(公告)号：JPH03242966A
公开(公告)日：1991-10-29
申请号：JP4000890
申请日：1990-02-21
申请人： NIPPON DENSO CO
发明人： ISOBE YOSHIHIKO , IIDA MAKIO , MIURA SHOJI , KAJIURA KEIZO , SUZUKI MIKIMASA , SAITO MASAMI
IPC分类号： H01L27/04 , H01L21/02 , H01L21/82 , H01L21/822
摘要： PURPOSE:To reduce variation of the amount of absorption energy of a thin film resistor by selectively removing a first insulating film of a semiconductor substrate whereon a circuit element is formed, by forming a second insulating film which is thinner than the first insulating film and by forming a thin film resistor on the surface of the second insulating film. CONSTITUTION:An N -type buried diffusion region 2, an N -epitaxial layer 3 and a P -isolation region 4 are formed on a P -type silicon substrate 1. A silicon oxide film, etc., on the surface of the silicon substrate 1 is removed all over, a silicon oxide film 5 is formed as a field insulating film and the silicon oxide film 5 is selectively opened. Then, in a position wherein a thin film resistor is formed, an opening 30 is formed in the field insulating film 5 and a thermal oxidation silicon film (second insulating film) 20 is formed in the opening 30. A deposited Cr-Si layer is selectively etched to form a thin film resistor 9 on the thermal oxidation silicon film 20 and a contact hole 5c is further formed on silicon oxide films 5a, 5b and PSG film 8. Thereby, dispersions in insulation thickness can be reduced and variation of the amount of absorption energy of a thin film resistor can be also reduced.

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