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    • 1. 发明授权
    • Shared nonvolatile memory architecture
    • 共享非易失性存储器架构
    • US07831778B2
    • 2010-11-09
    • US11690629
    • 2007-03-23
    • Myung Rai ChoDongyun LeeAlan Ruberg
    • Myung Rai ChoDongyun LeeAlan Ruberg
    • G06F12/00G06F13/00G06F13/28G06F9/00G06F9/24G06F15/177
    • G06F15/177G06F9/4405
    • A method and system that utilizes a shared nonvolatile memory for initializing multiple processing components in a device. The startup logic and configuration data for processing components within a device is stored in a single nonvolatile memory. Upon receipt of a command to initialize the device, the shared memory system copies the startup logic and configuration data from the nonvolatile memory to a volatile main memory. Then, each processing component accesses the main memory to find its startup logic and configuration data and begin executing. The shared memory system reduces the number of nonvolatile memory components used to initialize multiple processing components.
    • 一种利用共享非易失性存储器来初始化设备中的多个处理组件的方法和系统。 用于处理设备内的组件的启动逻辑和配置数据存储在单个非易失性存储器中。 在接收到用于初始化设备的命令时,共享存储器系统将启动逻辑和配置数据从非易失性存储器复制到易失性主存储器。 然后,每个处理组件访问主存储器以找到其启动逻辑和配置数据并开始执行。 共享存储器系统减少用于初始化多个处理组件的非易失性存储器组件的数量。
    • 2. 发明授权
    • Inter-port communication in a multi-port memory device
    • 多端口存储设备中的端口间通信
    • US07949863B2
    • 2011-05-24
    • US11694819
    • 2007-03-30
    • Alan T. RubergDae Kyeung KimDaeyun ShimDongyun LeeMyung Rai ChoSungjoon Kim
    • Alan T. RubergDae Kyeung KimDaeyun ShimDongyun LeeMyung Rai ChoSungjoon Kim
    • G06F9/48G06F15/76
    • G11C8/16G06F13/4054G06F13/4243G11C7/1075G11C2207/108
    • A method and system for inter-port communication utilizing a multi-port memory device. The memory device contains an interrupt register, an interrupt signal interface (e.g., a dedicated pin), an interrupt mask, and one or more message buffers associated with each port. When a first component coupled to a first port of the memory device wants to communicate with a second component coupled to a second port of the memory device, the first component writes a message to a message buffer associated with the second port. An interrupt in the input register of the second port is set to notify the second component coupled to the second port that a new message is available. Upon receiving the interrupt, the second component reads the interrupt register to determine the nature of the interrupt. The second component then reads the message from the message buffer.
    • 一种利用多端口存储器件进行端口间通信的方法和系统。 存储器件包含中断寄存器,中断信号接口(例如,专用引脚),中断掩码以及与每个端口相关联的一个或多个消息缓冲器。 当耦合到存储设备的第一端口的第一组件想要与耦合到存储器设备的第二端口的第二组件通信时,第一组件将消息写入与第二端口相关联的消息缓冲器。 第二端口的输入寄存器中的中断被设置为通知耦合到第二端口的第二组件新消息可用。 在接收到中断时,第二个组件读取中断寄存器以确定中断的性质。 然后第二个组件从消息缓冲区读取消息。
    • 3. 发明授权
    • Multi-port memory device having variable port speeds
    • 具有可变端口速度的多端口存储设备
    • US07639561B2
    • 2009-12-29
    • US11694813
    • 2007-03-30
    • Dongyun LeeMyung Rai ChoSungjoon Kim
    • Dongyun LeeMyung Rai ChoSungjoon Kim
    • G11C8/18
    • G11C8/16G06F13/4054G06F13/4243G11C7/1075G11C2207/108
    • A multi-port memory device having two or more ports wherein each port may operate at a different speed. The multi-port memory device contains memory banks that may be accessed via the two or more ports. Two clock signals are applied to each port: a system clock and a port clock. The system clock is applied to port logic that interfaces with the memory banks so that the ports all operate at a common speed with respect to the memory banks. The port clock is applied to a clock divider circuit that is associated with each port. The port clock is divided to a desired frequency or kept at its original frequency. Such a configuration allows the ports to operate at different speeds that may be set on a port-by-port basis.
    • 具有两个或多个端口的多端口存储器件,其中每个端口可以以不同的速度操作。 多端口存储器件包含可通过两个或更多个端口访问的存储体。 每个端口都应用两个时钟信号:系统时钟和端口时钟。 系统时钟被应用于与存储体接口的端口逻辑,使得端口都以相对于存储体的公共速度运行。 端口时钟应用于与每个端口相关联的时钟分频器电路。 端口时钟被分为所需频率或保持在其原始频率。 这样的配置允许端口以可以逐个端口为基础设置的不同速度进行操作。
    • 5. 发明授权
    • Apparatus and lower thread winding-spool for detecting the ending region of lower thread of sewing machine
    • 用于检测缝纫机下线结束区域的装置和下线缠绕线轴
    • US08960111B2
    • 2015-02-24
    • US13821783
    • 2011-08-11
    • Myung Rai Cho
    • Myung Rai Cho
    • D05B59/02D05B51/00D05B59/00D05B57/08
    • D05B51/00D05B57/28D05B59/00D05B59/02
    • A lower thread ending region detection apparatus prevents problems associated with false stitchings occurring from inability to detect lower thread's exhaustion during sewing operation. The lower thread ending region detection apparatus comprises: light control unit, which contacts a part of lower thread wound on a thread bobbin and activates or inactivates at least one of the functions of emitting light, reflecting light, passing light and blocking light, due to the effect of the physical movement force generated depending on whether the lower thread of the ending region is unwound; light receiving unit, which receives the light transferred out by the light control unit and outputs a detection signal; and control and notification unit, which analyzes the detection signal output from the light receiving unit to determine whether the lower thread has reached the ending region and outputs the result to the user.
    • 下线结束区域检测装置防止在缝制操作期间由于无法检测到底线的疲劳而发生的与假缝相关的问题。 下线结束区域检测装置包括:光控制单元,其接触卷绕在线轴上的下线的一部分,并且由于由于光线控制单元接触到线轴上的下线的一部分而使得发光,反射光,通过光和阻挡光的功能中的至少一个由于 根据终端区域的下线是否解除产生的物理运动力的影响; 光接收单元,其接收由光控制单元传送的光并输出检测信号; 以及控制和通知单元,其分析从光接收单元输出的检测信号,以确定底线是否已经到达结束区域,并将结果输出给用户。
    • 6. 发明申请
    • APPARATUS AND LOWER THREAD WINDING-SPOOL FOR DETECTING THE ENDING REGION OF LOWER THREAD OF SEWING MACHINE
    • 用于检测缝纫机下部螺纹端面的装置和下螺纹卷扬机
    • US20130167763A1
    • 2013-07-04
    • US13821783
    • 2011-08-11
    • Myung Rai Cho
    • Myung Rai Cho
    • D05B51/00
    • D05B51/00D05B57/28D05B59/00D05B59/02
    • The present invention relates to a lower thread ending region detection apparatus (LTERDA) that prevents problems associated with poor quality and re-work resulting from false stitchings due to being unable to detect the exhaustion of the lower thread during the sewing operation. The lower thread ending region detection apparatus (LTERDA) comprises the following: a light control unit (LCU), which contacts a part of lower thread wound on a thread bobbin and activates or inactivates at least one of the functions of emitting light, reflecting light, passing or penetrating light and blocking light, due to the effect of the physical movement force (PMF) generated depending on whether the lower thread of the ending region is unwound; a light receiving unit (LRU), which receives the light transferred out by the light control unit (LCU) and outputs a detection signal; and a control and notification unit (CNU), which analyzes the detection signal output from the light receiving unit (LRU) to determine whether the lower thread has reached the ending region and outputs the result to the user.
    • 本发明涉及一种下线结束区域检测装置(LTERDA),其能够防止由于在缝制操作期间无法检测到底线的耗尽而导致由于假缝合导致的质量差和重新加工的问题。 下线结束区域检测装置(LTERDA)包括:光控制单元(LCU),其接触卷绕在线轴上的下线的一部分,并且激活或消除发光的功能,反射光 由于根据终端区域的底线是否展开而产生的物理移动力(PMF)的影响,通过或穿透光和阻挡光; 光接收单元(LRU),其接收由光控制单元(LCU)传出的光并输出检测信号; 以及控制和通知单元(CNU),其分析从光接收单元(LRU)输出的检测信号,以确定底线是否已经到达结束区域,并将结果输出给用户。