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1. 发明授权

US07169684B2 Device having inductors and capacitors and a fabrication method thereof 失效
标题翻译：具有电感器和电容器的装置及其制造方法
公开(公告)号：US07169684B2
公开(公告)日：2007-01-30
申请号：US10373735
申请日：2003-02-27
申请人： Moon-chul Lee , In-sang Song , Young-tack Hong , Sung-hye Jeong , Jeong-yoo Hong
发明人： Moon-chul Lee , In-sang Song , Young-tack Hong , Sung-hye Jeong , Jeong-yoo Hong
IPC分类号： H01L21/30
CPC分类号： H01L27/016 , H01L23/5223 , H01L23/5227 , H01L27/0744 , H01L28/10 , H01L28/40 , H01L2924/0002 , H03H7/00 , H03H7/0115 , H03H2001/0078 , H03H2001/0085 , H05K1/16 , H05K1/162 , H05K1/165 , H05K2201/1006 , H05K2201/10545 , Y10S438/977 , H01L2924/00
摘要： An LC device having a substrate, a support layer having upper and lower sides formed on the substrate, inductors formed on either the upper or lower side of the support layer, and capacitors formed in the opposite side of the support layer. The support layer may be formed of a low-k dielectric material, and a connection portion may be provided to connect the inductors and capacitors in the support layer. The inductors and capacitors are disposed in a stacked structure on the upper and lower sides of the low-k dielectric support layer on the substrate, so that space efficiency may be maximized on the substrate. The low-k dielectric support layer provides support between the inductors and capacitors so that substrate loss is minimized and a Q factor of the inductors is enhanced.
摘要翻译：具有衬底的LC器件，在衬底上形成有上下侧的支撑层，形成在支撑层的上侧或下侧的电感器以及形成在支撑层的相对侧的电容器。支撑层可以由低k介电材料形成，并且可以提供连接部分来连接支撑层中的电感器和电容器。电感器和电容器以堆叠的结构设置在衬底上的低k电介质支撑层的上侧和下侧，使得在衬底上空间效率最大化。低k电介质支撑层提供电感器和电容器之间的支撑，使得衬底损耗最小化并且电感器的Q因数增强。

2. 发明授权

US07939909B2 Device having inductors and capacitors 失效
标题翻译：器件有电感和电容
公开(公告)号：US07939909B2
公开(公告)日：2011-05-10
申请号：US11655915
申请日：2007-01-22
申请人： Moon-chul Lee , In-sang Song , Young-tack Hong , Sung-hye Jeong , Jeong-yoo Hong , Byung-yoo Hong
发明人： Moon-chul Lee , In-sang Song , Young-tack Hong , Sung-hye Jeong , Jeong-yoo Hong , Byung-yoo Hong
IPC分类号： H01L29/00
CPC分类号： H01L27/016 , H01L23/5223 , H01L23/5227 , H01L27/0744 , H01L28/10 , H01L28/40 , H01L2924/0002 , H03H7/00 , H03H7/0115 , H03H2001/0078 , H03H2001/0085 , H05K1/16 , H05K1/162 , H05K1/165 , H05K2201/1006 , H05K2201/10545 , Y10S438/977 , H01L2924/00
摘要： An LC device having a substrate, a support layer having upper and lower sides formed on the substrate, inductors formed on either the upper or lower side of the support layer, and capacitors formed in the opposite side of the support layer. The support layer may be formed of a low-k dielectric material, and a connection portion may be provided to connect the inductors and capacitors in the support layer. The inductors and capacitors are disposed in a stacked structure on the upper and lower sides of the low-k dielectric support layer on the substrate, so that space efficiency may be maximized on the substrate. The low-k dielectric support layer provides support between the inductors and capacitors so that substrate loss is minimized and a Q factor of the inductors is enhanced.
摘要翻译：具有衬底的LC器件，在衬底上形成有上下侧的支撑层，形成在支撑层的上侧或下侧的电感器以及形成在支撑层的相对侧的电容器。支撑层可以由低k介电材料形成，并且可以提供连接部分来连接支撑层中的电感器和电容器。电感器和电容器以堆叠的结构设置在衬底上的低k电介质支撑层的上侧和下侧，使得在衬底上空间效率最大化。低k电介质支撑层提供电感器和电容器之间的支撑，使得衬底损耗最小化并且电感器的Q因数增强。

3. 发明申请

US20070115702A1 Device having inductors and capacitors 失效
标题翻译：器件有电感和电容
公开(公告)号：US20070115702A1
公开(公告)日：2007-05-24
申请号：US11655915
申请日：2007-01-22
申请人： Moon-chul Lee , In-sang Song , Young-tack Hong , Sung-hye Jeong , Jeong-yoo Hong , Byung-yoo Hong
发明人： Moon-chul Lee , In-sang Song , Young-tack Hong , Sung-hye Jeong , Jeong-yoo Hong , Byung-yoo Hong
IPC分类号： H02M1/14
CPC分类号： H01L27/016 , H01L23/5223 , H01L23/5227 , H01L27/0744 , H01L28/10 , H01L28/40 , H01L2924/0002 , H03H7/00 , H03H7/0115 , H03H2001/0078 , H03H2001/0085 , H05K1/16 , H05K1/162 , H05K1/165 , H05K2201/1006 , H05K2201/10545 , Y10S438/977 , H01L2924/00
摘要： An LC device having a substrate, a support layer having upper and lower sides formed on the substrate, inductors formed on either the upper or lower side of the support layer, and capacitors formed in the opposite side of the support layer. The support layer may be formed of a low-k dielectric material, and a connection portion may be provided to connect the inductors and capacitors in the support layer. The inductors and capacitors are disposed in a stacked structure on the upper and lower sides of the low-k dielectric support layer on the substrate, so that space efficiency may be maximized on the substrate. The low-k dielectric support layer provides support between the inductors and capacitors so that substrate loss is minimized and a Q factor of the inductors is enhanced.
摘要翻译：具有衬底的LC器件，在衬底上形成有上下侧的支撑层，形成在支撑层的上侧或下侧的电感器以及形成在支撑层的相对侧的电容器。支撑层可以由低k介电材料形成，并且可以提供连接部分来连接支撑层中的电感器和电容器。电感器和电容器以堆叠的结构设置在衬底上的低k电介质支撑层的上侧和下侧，使得在衬底上空间效率最大化。低k电介质支撑层提供电感器和电容器之间的支撑，使得衬底损耗最小化并且电感器的Q因数增强。

4. 发明授权

US07926165B2 Micro antenna and method of manufacturing the same 失效
标题翻译：微天线及其制造方法
公开(公告)号：US07926165B2
公开(公告)日：2011-04-19
申请号：US11712526
申请日：2007-03-01
申请人： Young-tack Hong , Moon-chul Lee , In-sang Song , Sang-wook Kwon , Chang-won Jung , Eun-seok Park
发明人： Young-tack Hong , Moon-chul Lee , In-sang Song , Sang-wook Kwon , Chang-won Jung , Eun-seok Park
IPC分类号： H01P11/00 , H01Q13/00 , H01Q17/00 , H01Q1/36 , H05K3/36 , H01K3/10
CPC分类号： H01Q1/2283 , H01F17/0033 , H01F41/041 , H01Q1/362 , Y10T29/49016 , Y10T29/49018 , Y10T29/49126 , Y10T29/49165
摘要： A method of manufacturing a micro antenna is provided. The method includes forming a plurality of holes penetrating a first substrate, filling each of the plurality of holes with a conductive material to form a plurality of vertical conducting parts, forming a plurality of horizontal conducting parts on each of two different surfaces of the first substrate, wherein the each of the horizontal conducting parts is electrically connected to the corresponding vertical conducting parts, bonding the first substrate, on which the vertical conducting parts and the horizontal conducting parts have been formed, to a second substrate, and removing the first substrate to expose a whole structure of a 3D micro antenna which is formed on the second substrate and includes the vertical conducting parts and the horizontal conducting parts connected to each other.
摘要翻译：提供一种制造微型天线的方法。该方法包括：形成穿过第一基板的多个孔，用导电材料填充多个孔中的每个孔，以形成多个垂直导电部分，在第一基板的两个不同表面的每一个上形成多个水平导电部件其中，每个水平导电部分电连接到相应的垂直导电部分，将其上形成有垂直导电部分和水平导电部分的第一基板接合到第二基板，并且将第一基板去除露出形成在第二基板上的3D微型天线的整体结构，并且包括彼此连接的垂直导电部分和水平导电部件。

5. 发明授权

US07122942B2 Electrostatic RF MEMS switches 有权
标题翻译：静电RF MEMS开关
公开(公告)号：US07122942B2
公开(公告)日：2006-10-17
申请号：US10951612
申请日：2004-09-29
申请人： In-sang Song , Young-il Kim , Moon-chul Lee , Dong-ha Shim , Young-tack Hong , Sun-hee Park , Kuang-woo Nam
发明人： In-sang Song , Young-il Kim , Moon-chul Lee , Dong-ha Shim , Young-tack Hong , Sun-hee Park , Kuang-woo Nam
IPC分类号： H01L41/08
CPC分类号： H01P1/127 , H01H57/00 , H01H59/0009 , H01H2057/006
摘要： A micro switch having a dielectric layer having a movement region formed on a substrate, a conductive layer formed on a predetermined portion of the movement region, a dielectric film formed on the conductive layer, first and second electric conductors formed a predetermined distance above the dielectric film, one or two lower electrodes formed on the movement region, and one or two upper electrodes formed a predetermined distance above the two lower electrodes, the one or two upper electrodes moving the conductive layer and the dielectric film upwards when an electrostatic force occurs between the upper and lower electrodes, and capacitively coupled with the first and second electric conductors to allow a current to flow between the first and second electric conductors. Such a micro switch has a high on/off ratio and isolation degree and a simple structure, and can be fabricated in a very easy process.
摘要翻译：一种具有介电层的微型开关，具有形成在基板上的移动区域，形成在所述移动区域的预定部分上的导电层，形成在所述导电层上的电介质膜，在所述电介质上形成预定距离的第一和第二导电体膜，形成在移动区域上的一个或两个下电极，以及在两个下电极之上形成预定距离的一个或两个上电极，一个或两个上电极在静电力发生时向上移动导电层和电介质膜上电极和下电极，并且与第一和第二电导体电容耦合以允许电流在第一和第二电导体之间流动。这种微型开关具有高的开/关比和隔离度和简单的结构，并且可以在非常容易的过程中制造。

6. 发明申请

US20050040486A1 Electrostatic RF MEMS switches 有权
标题翻译：静电RF MEMS开关
公开(公告)号：US20050040486A1
公开(公告)日：2005-02-24
申请号：US10951612
申请日：2004-09-29
申请人： In-sang Song , Young-il Kim , Moon-chul Lee , Dong-ha Shim , Young-tack Hong , Sun-hee Park , Kuang-woo Nam
发明人： In-sang Song , Young-il Kim , Moon-chul Lee , Dong-ha Shim , Young-tack Hong , Sun-hee Park , Kuang-woo Nam
IPC分类号： B81B3/00 , H01H57/00 , H01H59/00 , H01L29/417 , H01L41/09 , H01P1/12 , H01L21/76
CPC分类号： H01P1/127 , H01H57/00 , H01H59/0009 , H01H2057/006
摘要： A micro switch having a dielectric layer having a movement region formed on a substrate, a conductive layer formed on a predetermined portion of the movement region, a dielectric film formed on the conductive layer, first and second electric conductors formed a predetermined distance above the dielectric film, one or two lower electrodes formed on the movement region, and one or two upper electrodes formed a predetermined distance above the two lower electrodes, the one or two upper electrodes moving the conductive layer and the dielectric film upwards when an electrostatic force occurs between the upper and lower electrodes, and capacitively coupled with the first and second electric conductors to allow a current to flow between the first and second electric conductors. Such a micro switch has a high on/off ratio and isolation degree and a simple structure, and can be fabricated in a very easy process.
摘要翻译：一种具有介电层的微型开关，具有形成在基板上的移动区域，形成在所述移动区域的预定部分上的导电层，形成在所述导电层上的电介质膜，在所述电介质上形成预定距离的第一和第二导电体膜，形成在移动区域上的一个或两个下电极，以及在两个下电极之上形成预定距离的一个或两个上电极，一个或两个上电极在静电力发生时向上移动导电层和电介质膜上电极和下电极，并且与第一和第二电导体电容耦合以允许电流在第一和第二电导体之间流动。这种微型开关具有高的开/关比和隔离度和简单的结构，并且可以在非常容易的过程中制造。

7. 发明申请

US20080072416A1 Micro antenna and method of manufacturing the same 失效
标题翻译：微天线及其制造方法
公开(公告)号：US20080072416A1
公开(公告)日：2008-03-27
申请号：US11712526
申请日：2007-03-01
申请人： Young-tack Hong , Moon-chul Lee , In-sang Song , Sang-wook Kwon , Chang-won Jung , Eun-seok Park
发明人： Young-tack Hong , Moon-chul Lee , In-sang Song , Sang-wook Kwon , Chang-won Jung , Eun-seok Park
IPC分类号： H01P11/00 , H01Q13/00
CPC分类号： H01Q1/2283 , H01F17/0033 , H01F41/041 , H01Q1/362 , Y10T29/49016 , Y10T29/49018 , Y10T29/49126 , Y10T29/49165
摘要： A micro antenna and a method of manufacturing the micro antenna are provided. A plurality of holes are formed to penetrate a first substrate. A plurality of vertical conducting parts are formed in the plurality of holes using a conductive material. Horizontal conducting parts are formed on upper and lower surfaces of the first substrate to be electrically connected to the plurality of vertical conducting parts so as to form a 3-dimensional (3-D) coil structure. The first substrate including the 3-D coil structure is bonded to a second substrate and then removed so as to realize the micro antenna.
摘要翻译：提供微型天线和制造微型天线的方法。形成多个孔以穿透第一基板。使用导电材料在多个孔中形成多个垂直导电部件。水平导电部分形成在第一基板的上表面和下表面上以与多个垂直导电部分电连接，以形成三维（3-D）线圈结构。将包括3-D线圈结构的第一基板接合到第二基板，然后移除以实现微天线。

8. 发明申请

US20060273444A1 Packaging chip and packaging method thereof 失效
标题翻译：包装芯片及其包装方法
公开(公告)号：US20060273444A1
公开(公告)日：2006-12-07
申请号：US11390220
申请日：2006-03-28
申请人： Kyu-dong Jung , Woon-bae Kim , In-sang Song , Moon-chul Lee , Jun-sik Hwang , Suk-jin Ham
发明人： Kyu-dong Jung , Woon-bae Kim , In-sang Song , Moon-chul Lee , Jun-sik Hwang , Suk-jin Ham
IPC分类号： H01L23/48
CPC分类号： H01L23/055 , H01L23/04 , H01L27/14618 , H01L2224/16
摘要： A packaging chip in which a circuit module is packaged and a method of packaging a circuit module are provided. The packaging chip includes a base wafer; a circuit module on the base wafer; a packaging wafer having a cavity and combined with the base wafer so that the circuit module fits inside the cavity; a connecting electrode connecting upper and lower surfaces of the cavity; and a seed layer between the connecting electrode and the packaging wafer. The method includes etching a lower surface of the packaging wafer to form a cavity, stacking a metal layer in an area of the lower surface, combining the base wafer with the packaging wafer, polishing the packaging wafer, forming a viahole through the packaging wafer, stacking a seed layer on the packaging wafer, plating the inside of the viahole, removing the seed layer and forming an electrode.
摘要翻译：提供电路模块封装的封装芯片和封装电路模块的方法。包装芯片包括基底晶片; 基底晶片上的电路模块; 封装晶片，其具有空腔并与所述基底晶片组合，使得所述电路模块装配在所述腔内; 连接所述空腔的上表面和下表面的连接电极; 以及连接电极和封装晶片之间的晶种层。该方法包括蚀刻封装晶片的下表面以形成空腔，在下表面的区域中堆叠金属层，将基底晶片与封装晶片组合，抛光封装晶片，通过封装晶片形成通孔，将种子层堆叠在包装晶片上，电镀通孔内部，去除种子层并形成电极。

9. 发明授权

US07411261B2 MEMS device and fabrication method thereof 失效
标题翻译： MEMS器件及其制造方法
公开(公告)号：US07411261B2
公开(公告)日：2008-08-12
申请号：US10773312
申请日：2004-02-09
申请人： Eun-sung Lee , Chung-woo Kim , In-sang Song , Jong-seok Kim , Moon-chul Lee
发明人： Eun-sung Lee , Chung-woo Kim , In-sang Song , Jong-seok Kim , Moon-chul Lee
IPC分类号： H01L29/84
CPC分类号： B81B3/0078 , B81B2201/014 , B81B2203/0118 , B81B2203/0307 , B81B2203/04 , B81C2201/0107 , B81C2201/014 , H01H59/0009
摘要： A method for fabricating a MEMS device having a fixing part fixed to a substrate, a connecting part, a driving part, a driving electrode, and contact parts, includes patterning the driving electrode on the substrate; forming an insulation layer on the substrate; patterning the insulation layer and etching a fixing region and a contact region of the insulation layer; forming a metal layer over the substrate; planarizing the metal layer until the insulation layer is exposed; forming a sacrificial layer on the substrate; patterning the sacrificial layer to form an opening exposing a portion of the insulation layer and the metal layer in the fixing region; forming a MEMS structure layer on the sacrificial layer to partially fill the opening, thereby forming sidewalls therein; and selectively removing a portion of the sacrificial layer by etching so that a portion of the sacrificial layer remains in the fixing region.
摘要翻译：一种用于制造具有固定到基板上的固定部件，连接部件，驱动部件，驱动电极和接触部件的MEMS器件的方法，包括在所述基板上图形化所述驱动电极; 在所述基板上形成绝缘层; 图案化绝缘层并蚀刻绝缘层的固定区域和接触区域; 在衬底上形成金属层; 平坦化金属层直到绝缘层露出; 在所述基板上形成牺牲层; 图案化牺牲层以形成露出固定区域中绝缘层和金属层的一部分的开口; 在所述牺牲层上形成MEMS结构层以部分地填充所述开口，从而在其中形成侧壁; 并且通过蚀刻选择性地去除牺牲层的一部分，使得牺牲层的一部分保留在固定区域中。

10. 发明授权

US07432781B2 Monolithic duplexer and fabrication method thereof 有权
标题翻译：单片双工器及其制造方法
公开(公告)号：US07432781B2
公开(公告)日：2008-10-07
申请号：US11392624
申请日：2006-03-30
申请人： Sang-chul Sul , Duck-hwan Kim , Chul-soo Kim , In-sang Song , Moon-chul Lee , Kyu-dong Jung , Jea-shik Shin
发明人： Sang-chul Sul , Duck-hwan Kim , Chul-soo Kim , In-sang Song , Moon-chul Lee , Kyu-dong Jung , Jea-shik Shin
IPC分类号： H03H7/46
CPC分类号： H03H3/02 , H03H9/0571 , H03H9/706
摘要： A monolithic duplexer and a fabrication method thereof. The monolithic duplexer includes a device wafer, a plurality of elements distanced from each other on a top portion of a device wafer, first sealing parts formed on the top portion of the device wafer, and a plurality of first ground planes formed between the plurality of elements. A cap wafer is also provided having an etched area for packaging the device wafer, a plurality of protrusion parts, a plurality of ground posts, and cavities. Second sealing parts are formed on a bottom portion of the protrusion parts, and a plurality of second ground planes cover the plurality of ground posts. Via holes vertically penetrate the cap wafer to connect to the plurality of the second ground planes, and ground terminals are formed on top portions of the via holes. The first sealing parts and the first ground planes are attached to the second sealing parts and the second ground planes, respectively.
摘要翻译：一种单片双工器及其制造方法。单片双工器包括器件晶片，在器件晶片的顶部彼此远离的多个元件，形成在器件晶片的顶部上的第一密封部分和形成在器件晶片的顶部之间的多个第一接地平面元素。还提供了盖晶片，其具有用于封装器件晶片，多个突出部分，多个接地柱和空腔的蚀刻区域。第二密封部分形成在突出部分的底部上，并且多个第二接地平面覆盖多个接地柱。通孔垂直穿过盖晶片以连接到多个第二接地平面，并且接地端子形成在通孔的顶部上。第一密封部分和第一接地平面分别附接到第二密封部分和第二接地平面。

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