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1. 发明授权

US08410886B2 Multilayer coil component 有权
标题翻译：多层线圈组件
公开(公告)号：US08410886B2
公开(公告)日：2013-04-02
申请号：US13357582
申请日：2012-01-24
申请人： Mitsuru Odahara , Akihiro Motoki , Akihiro Ono
发明人： Mitsuru Odahara , Akihiro Motoki , Akihiro Ono
IPC分类号： H01F5/00
CPC分类号： H01F41/04 , H01F17/0013 , H01F17/04 , H01F27/2804 , H01F41/046 , H01F2027/2809
摘要： A multilayer coil component is provided to have high reliability and in which internal stress arising from the difference in firing shrinkage behavior and/or thermal expansion coefficient between ferrite layers and internal conductor layers is alleviated without forming conventional voids between the ferrite layers and the internal conductor layers. A method of manufacturing a multilayer coil includes a step of isolating interfaces between internal conductors and surrounding ferrite by allowing a complexing agent solution to reach interfaces between the internal conductors and the surrounding ferrite through side gap portions from side surfaces of a ferrite element including a helical coil. The complexing agent solution contains at least one selected from the group consisting of an aminocarboxylic acid, a salt of the aminocarboxylic acid, an oxycarboxylic acid, a salt of the oxycarboxylic acid, an amine, phosphoric acid, a salt of phosphoric acid, and a lactone compound.
摘要翻译：提供多层线圈部件以具有高可靠性，并且在铁氧体层和内部导体之间不形成常规的空隙而减轻铁氧体层和内部导体层之间的烧制收缩性能和/或热膨胀系数差异产生的内部应力层。制造多层线圈的方法包括通过使络合剂溶液通过包括螺旋形的铁氧体元件的侧表面的侧面间隙部分的内部导体和周围的铁氧体之间的界面来分离内部导体和周围的铁氧体之间的界面的步骤线圈络合剂溶液含有至少一种选自氨基羧酸，氨基羧酸的盐，羟基羧酸，羟基羧酸的盐，胺，磷酸，磷酸的盐和内酯化合物。

2. 发明授权

US08797711B2 Electronic component and producing method thereof 有权
标题翻译：电子元件及其制造方法
公开(公告)号：US08797711B2
公开(公告)日：2014-08-05
申请号：US12632823
申请日：2009-12-08
申请人： Seiichi Matsumoto , Toshiyuki Iwanaga , Makoto Ogawa , Akihiro Motoki
发明人： Seiichi Matsumoto , Toshiyuki Iwanaga , Makoto Ogawa , Akihiro Motoki
IPC分类号： H01G4/228
CPC分类号： H01G4/30 , H01G4/232
摘要： A region where a plating film constituting an external electrode is formed can be accurately controlled in an electronic component in which the external electrode is formed by directly plating a particular region in a surface of a component body. In a component body, a bump is provided in a position in which a region where an external electrode should be formed is partitioned. In a plating process, growth of the plating film constituting the external electrode is substantially stopped or delayed in the bump. As a result, a termination point of the growth of the plating film constituting the external electrode can be accurately controlled in the position of the bump.
摘要翻译：在形成外部电极的电子部件中，通过直接对构成体的表面的特定区域进行电镀，能够精确地控制形成有构成外部电极的镀膜的区域。在构成体中，在形成有外部电极的区域被分隔的位置设置凸块。在电镀工艺中，构成外部电极的镀膜的生长在凸块中基本上停止或延迟。结果，可以在凸块的位置上精确地控制构成外部电极的镀膜的生长终止点。

3. 发明授权

US08730646B2 Laminated electronic component and method for manufacturing the same 有权
标题翻译：层压电子部件及其制造方法
公开(公告)号：US08730646B2
公开(公告)日：2014-05-20
申请号：US12466435
申请日：2009-05-15
申请人： Kenichi Kawasaki , Shunsuke Takeuchi , Akihiro Motoki , Makoto Ogawa , Toshiyuki Iwanaga
发明人： Kenichi Kawasaki , Shunsuke Takeuchi , Akihiro Motoki , Makoto Ogawa , Toshiyuki Iwanaga
IPC分类号： H01G4/008 , H01G2/20 , H01G4/228
CPC分类号： H01G4/005 , H01G4/008 , H01G4/232
摘要： A laminated electronic component includes outer terminal electrodes including lower plating films including metal particles having an average size of 0.5 μm or less, the lower plating films being formed by directly plating an outer surface of an electronic component body such that the lower plating films are electrically connected to exposed portions of inner conductors. The outer terminal electrodes may further include upper plating films formed on the lower plating films, the upper plating films being defined by one or more layers. Metal particles defining the upper plating films may have an average size of 0.5 μm or less. The metal particles defining the lower plating films may be Cu particles.
摘要翻译：层叠电子部件包括外部端子电极，其包括具有平均尺寸为0.5μm以下的金属粒子的下部电镀膜，下部电镀膜通过直接电镀电子部件主体的外表面而形成，使得下部电镀膜为电气连接到内部导体的暴露部分。外部端子电极还可以包括形成在下部镀膜上的上部镀膜，上部镀膜由一层或多层限定。限定上镀膜的金属粒子的平均粒径可以为0.5μm以下。限定下镀层的金属颗粒可以是Cu颗粒。

4. 发明授权

US08411409B2 Ceramic electronic component and manufacturing method therefor 有权
标题翻译：陶瓷电子元件及其制造方法
公开(公告)号：US08411409B2
公开(公告)日：2013-04-02
申请号：US13161535
申请日：2011-06-16
申请人： Makoto Ogawa , Akihiro Motoki , Masahito Saruban , Toshiyuki Iwanaga , Syunsuke Takeuchi , Kiyoyasu Sakurada
发明人： Makoto Ogawa , Akihiro Motoki , Masahito Saruban , Toshiyuki Iwanaga , Syunsuke Takeuchi , Kiyoyasu Sakurada
IPC分类号： H01G4/30
CPC分类号： H01G4/12 , H01C1/14 , H01G4/005 , H01G4/232
摘要： When an external terminal electrode of a ceramic electronic component such as a laminated ceramic capacitor is formed by plating, plating growth may be also caused even in an undesired location. The ceramic surface provided by a component main body is configured to include a high plating growth region of, for example, a barium titanate based ceramic, which exhibits relatively high plating growth, and a low plating growth region of, for example, a calcium zirconate based ceramic, which exhibits relatively low plating growth. The plating film constituting a first layer to define a base for an external terminal electrode is formed in such a way that the growth of a plated deposit deposited with conductive surfaces provided by exposed ends of internal electrodes as starting points is limited so as not to cross over a boundary between the high plating growth region and the low plating growth region toward the low plating growth region.
摘要翻译：当通过电镀形成层压陶瓷电容器等陶瓷电子部件的外部端子电极时，即使在不希望的位置也可能产生电镀生长。由组件主体提供的陶瓷表面被构造为包括例如呈现较高镀层生长的例如钛酸钡系陶瓷的高镀层生长区域和例如锆酸锆的低镀层生长区域其具有相对较低的电镀生长。构成用于限定外部端子电极的基底的第一层的电镀膜以这样的方式形成，使得以由内部电极的暴露端作为起点设置的导电表面沉积的镀覆沉积物的生长被限制为不交叉在高电镀生长区域和低电镀生长区域之间的边界朝向低电镀生长区域。

5. 发明授权

US08154848B2 Multilayer ceramic electronic component including external electrodes that include a plating layer having a low film stress 有权
标题翻译：包括具有低膜应力的镀层的外部电极的多层陶瓷电子部件
公开(公告)号：US08154848B2
公开(公告)日：2012-04-10
申请号：US12354026
申请日：2009-01-15
申请人： Akihiro Motoki , Makoto Ogawa , Shunsuke Takeuchi , Kenichi Kawasaki
发明人： Akihiro Motoki , Makoto Ogawa , Shunsuke Takeuchi , Kenichi Kawasaki
IPC分类号： H01G4/228 , H01G4/06
CPC分类号： H01G4/005 , H01G4/008 , H01G4/12 , H01G4/30
摘要： A multilayer ceramic electronic component includes a laminate including a stack of a plurality of ceramic layers and a plurality of internal electrodes extending along interfaces between the ceramic layers, and a plurality of external electrodes electrically connecting the internal electrodes exposed at surfaces of the laminate. Each external electrode includes a plating layer at least at the portion directly connected to the internal electrodes. The plating layer has a compressive film stress of about 100 MPa or less or a tensile film stress of about 100 MPa or less.
摘要翻译：多层陶瓷电子部件包括层叠体，其包括多个陶瓷层的叠层和沿着陶瓷层之间的界面延伸的多个内部电极，以及电连接在层叠体的表面露出的内部电极的多个外部电极。每个外部电极至少包括直接连接到内部电极的部分的镀层。镀层的压缩应力为约100MPa以下或拉伸膜应力为约100MPa以下。

6. 发明授权

US07774591B2 Data processing device and data processing method 有权
标题翻译：数据处理装置和数据处理方法
公开(公告)号：US07774591B2
公开(公告)日：2010-08-10
申请号：US11620419
申请日：2007-01-05
申请人： Satoshi Kamiya , Hiroshi Ueno , Akihiro Motoki , Takeo Hayashi
发明人： Satoshi Kamiya , Hiroshi Ueno , Akihiro Motoki , Takeo Hayashi
IPC分类号： G06F1/24
CPC分类号： G06F15/7867
摘要： A data processing device includes a memory, a processing unit, a logic element, a first database and a management unit. The memory stores a plurality of software modules which processes input data. The processing unit enables to execute the plurality of software module. The logic element enables to configure a plurality of hardware modules, which can perform processings equivalent to those performed by the plurality of software module, using a dynamic reconfiguration. The first database stores configuration information indicating a configuration of the plurality of hardware modules when the plurality of hardware modules is set to the logic element. The management unit determines a first software module to be set to the logic element as a hardware module in the plurality of software modules on the basis of a predetermined condition with respect to a processing of the input data, and sets a first hardware module corresponding to the first software module to the logic element with reference to the first database.
摘要翻译：数据处理装置包括存储器，处理单元，逻辑元件，第一数据库和管理单元。存储器存储处理输入数据的多个软件模块。处理单元能够执行多个软件模块。逻辑元件使得能够配置多个硬件模块，其可以使用动态重新配置来执行与由多个软件模块执行的处理相当的处理。第一数据库存储当多个硬件模块被设置为逻辑元件时指示多个硬件模块的配置的配置信息。所述管理单元根据关于所述输入数据的处理的预定条件，将要设置为所述逻辑元件的第一软件模块确定为所述多个软件模块中的硬件模块，并且设置与所述逻辑单元对应的第一硬件模块参考第一个数据库的逻辑元件的第一个软件模块。

7. 发明授权

US07764484B2 Multilayer electronic component and method for manufacturing the same 有权
标题翻译：多层电子元件及其制造方法
公开(公告)号：US07764484B2
公开(公告)日：2010-07-27
申请号：US12142924
申请日：2008-06-20
申请人： Akihiro Motoki , Makoto Ogawa , Kenichi Kawasaki , Shunsuke Takeuchi
发明人： Akihiro Motoki , Makoto Ogawa , Kenichi Kawasaki , Shunsuke Takeuchi
IPC分类号： H01G4/00
CPC分类号： H01G4/30 , H01G4/232 , H01G4/2325 , H05K1/0306 , H05K1/092 , H05K3/102 , H05K3/246 , H05K3/403 , H05K2201/0347 , H05K2203/025 , Y10T29/417 , Y10T29/43 , Y10T29/435 , Y10T428/25
摘要： A method for manufacturing a multilayer electronic component includes a step of preparing a laminate which includes a plurality of stacked insulator layers and a plurality of internal electrodes extending along the interfaces between the insulator layers, and in which an end of each of the plurality of internal electrodes is exposed at a predetermined surface corresponding to one of the first and second end surfaces; a step of forming external electrodes on the predetermined surfaces; and a step of forming thick-film edge electrodes at edge portions. The step of forming external electrodes includes a step of attaching a plurality of conductive particles having a particle size of about 1 μm or more to the predetermined surfaces of the laminate, and a step of performing plating directly on the predetermined surfaces to which the conductive particles are attached.
摘要翻译：一种制造多层电子部件的方法包括制备层压体的步骤，该层压体包括多个堆叠的绝缘体层和沿着绝缘体层之间的界面延伸的多个内部电极，并且其中多个内部电极在对应于第一和第二端面之一的预定表面处露出; 在所述预定表面上形成外部电极的步骤; 以及在边缘部分形成厚膜边缘电极的步骤。形成外部电极的步骤包括将多个具有约1μm以上的粒径的导电粒子附着在层叠体的规定表面上的步骤，以及在导电粒子的规定表面上直接进行电镀的工序附上。

8. 发明授权

US07589952B2 Multilayer electronic device and method for manufacturing the same 有权
标题翻译：多层电子器件及其制造方法
公开(公告)号：US07589952B2
公开(公告)日：2009-09-15
申请号：US12109371
申请日：2008-04-25
申请人： Akihiro Motoki , Kenichi Kawasaki , Makoto Ogawa , Shigeyuki Kuroda , Tatsuo Kunishi
发明人： Akihiro Motoki , Kenichi Kawasaki , Makoto Ogawa , Shigeyuki Kuroda , Tatsuo Kunishi
IPC分类号： H01G4/228
CPC分类号： H01G4/2325 , H01G4/30 , Y10T29/435
摘要： A multilayer electronic device includes a laminate and an external electrode that is formed on an end surface of the laminate after a plurality of conductive particles having a particle diameter of about 1 μm or more is adhered to the end surface of the laminate, for example, by a sandblast method or a brush polishing method. The external electrode is defined by a plating film that is formed by electroplating or electroless plating.
摘要翻译：例如，多层电子器件包括层压体和形成在层叠体的端面上的外部电极，该多个电子器件在层叠体的端面附着有多个粒径为1μm以上的导电粒子之后，通过喷砂法或刷子抛光法。外部电极由通过电镀或无电镀形成的电镀膜限定。

9. 发明授权

US09165714B2 Electronic component 有权
标题翻译：电子元器件
公开(公告)号：US09165714B2
公开(公告)日：2015-10-20
申请号：US13479397
申请日：2012-05-24
申请人： Makoto Ogawa , Akihiro Motoki , Atsuko Saito , Kenji Masuko , Toshinobu Fujiwara
发明人： Makoto Ogawa , Akihiro Motoki , Atsuko Saito , Kenji Masuko , Toshinobu Fujiwara
IPC分类号： H01G4/228 , H01G2/20 , H01G4/008 , C25D5/12 , C25D3/30 , C25D3/12
CPC分类号： H01G4/008 , C25D3/12 , C25D3/30 , C25D5/12
摘要： An electronic component, preferably in the form of a laminated ceramic capacitor, which suppresses the growth of whiskers and has excellent solderability, includes an electronic component element in the shape of, for example, a rectangular parallelepiped. External electrodes of terminal electrodes are located on first and second end surfaces of the electronic component element. First plated films including plated Ni are located on the surfaces of the external electrodes. Second plated films are located on the surfaces of the first plated films. The second plated films have stacked structures including first plated layers and second plated layers. The second plated layers have lower degrees of densification than the first plated layers.
摘要翻译：抑制晶须生长并且具有优异的可焊性的电子部件优选为层叠陶瓷电容器，包括例如长方体形状的电子部件元件。端子电极的外部电极位于电子元件的第一和第二端面上。包含电镀Ni的第一电镀膜位于外部电极的表面上。第二镀膜位于第一镀膜的表面上。第二镀膜具有包括第一镀层和第二镀层的堆叠结构。第二镀层比第一镀层具有较低的致密化程度。

10. 发明申请

US20140123140A1 NETWORK VIRTUALIZATION SYSTEM, PHYSICAL NODE, AND VIRTUAL INTERFACE IDENTIFICATION METHOD IN VIRTUAL MACHINE 有权
标题翻译：虚拟机网络虚拟化系统，物理节点和虚拟界面识别方法
公开(公告)号：US20140123140A1
公开(公告)日：2014-05-01
申请号：US13993065
申请日：2011-10-04
申请人： Akihiro Motoki
发明人： Akihiro Motoki
IPC分类号： G06F9/455
CPC分类号： G06F9/45533 , H04L41/0806
摘要： A domain management apparatus instructs physical nodes about the configuration of virtual nodes and virtual links of virtual networks. The physical nodes assign a virtual machine to a virtual node based on the definition of the virtual node contained in an instruction from the domain management apparatus. The physical nodes write a configuration associating virtual interfaces in the virtual node definition with virtual NICs on the virtual machine into a configuration file of the operating system to be started up on the virtual machine before the start-up of the virtual machine and, then, start up the virtual machine. Therefore, it is possible to recognize the correspondence relation between the virtual interface in the virtual node definition and the virtual NIC in the virtual machine without referring to the virtual network assignment result and without waiting for the start-up of the virtual machine.
摘要翻译：域管理装置向物理节点指示虚拟网络的虚拟节点和虚拟链路的配置。物理节点基于来自域管理装置的指令中包含的虚拟节点的定义，将虚拟机分配给虚拟节点。物理节点写入将虚拟节点定义中的虚拟接口与虚拟机上的虚拟NIC相关联的配置，以在虚拟机启动之前在虚拟机上启动的操作系统的配置文件中，启动虚拟机。因此，可以在不参照虚拟网络分配结果的情况下，识别虚拟节点定义中的虚拟接口与虚拟机中的虚拟NIC之间的对应关系，而不用等待虚拟机的启动。

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