会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明授权
    • Semiconductor channel switch
    • 半导体通道开关
    • US4107472A
    • 1978-08-15
    • US707352
    • 1976-07-21
    • Mitsuru KawanamiShinzi OkuharaTakuzi Mukaemachi
    • Mitsuru KawanamiShinzi OkuharaTakuzi Mukaemachi
    • H03K17/735H04Q3/52H04Q3/50
    • H04Q3/521H03K17/735
    • A plurality of PNPN switches, each permitting current flow in either, i.e., positive or negative, direction, are arranged at the cross points between the rows and the columns of the speech paths so as to form a matrix. The gate trigger terminal of each PNPN switch is connected with a gating current circuit having a high impedance, which circuit is adapted to control ON and OFF operations of the switch. A plurality of means are provided to selectively turn the gate current circuits on and off so that gate current is supplied continuously for the gate terminal of any desired PNPN switch at least for the time during which the corresponding cross point of the matrix is to be electrically bridged.
    • 多个PNPN开关,每个允许电流在任一方向,即正或负方向流动,布置在语音路径的行和列之间的交叉点处,以形成矩阵。 每个PNPN开关的门极触发端子与具有高阻抗的选通电流电路连接,该电路适于控制开关的导通和截止操作。 提供了多个装置以选择性地打开和关闭栅极电流电路,使得至少在矩阵的对应交叉点电气地连续地为任何期望的PNPN开关的栅极端子提供栅极电流 桥接
    • 2. 发明授权
    • Semiconductor switch
    • 半导体开关
    • US4071779A
    • 1978-01-31
    • US715156
    • 1976-08-17
    • Mitsuru KawanamiIchiro OhhinataShinzi Okuhara
    • Mitsuru KawanamiIchiro OhhinataShinzi Okuhara
    • H02M1/08H03K17/0812H03K17/16H03K17/73H03K17/02H03K17/60
    • H03K17/08124H03K17/73
    • A semiconductor switch of a PNPN structure comprises a PNPN switch of an equivalently four-layered structure including a P-type anode, N-type cathode, N-type gate and P-type gate, a first NPN transistor, a second PNP transistor, a level shifting circuit, and an impedance element, wherein the impedance element is connected between the collector and emitter of the first transistor, the first transistor has its collector and emitter connected to the P-type gate and N-type cathode respectively, and the second transistor has its emitter and base connected to the P-type anode and N-type gate, respectively, and has its collector connected to the base of the first transistor through the level shifting circuit. In this arrangement, the first transistor is driven by the current flowing through a PN junction at the end on the side of the anode of the PNPN switch and the level shifting circuit, so that the semiconductor switch has a great dv/dt withstanding power, operates with high sensitivity, has a high breakdown voltage in both directions and facilitates the setting of circuit constants.
    • PNPN结构的半导体开关包括具有P型阳极,N型阴极,N型栅极和P型栅极的等效四层结构的PNPN开关,第一NPN晶体管,第二PNP晶体管, 电平移动电路和阻抗元件,其中阻抗元件连接在第一晶体管的集电极和发射极之间,第一晶体管的集电极和发射极分别连接到P型栅极和N型阴极, 第二晶体管的发射极和基极分别连接到P型阳极和N型栅极,并且其集电极通过电平移位电路连接到第一晶体管的基极。 在这种布置中,第一晶体管由流过PNPN开关和电平移动电路的阳极侧端部的PN结的电流驱动,使得半导体开关具有很好的dv / dt承受功率, 以高灵敏度工作,在两个方向上具有高击穿电压,并有助于设置电路常数。
    • 3. 发明授权
    • Semiconductor switch circuit
    • 半导体开关电路
    • US4125787A
    • 1978-11-14
    • US790938
    • 1977-04-26
    • Ichiro OhhinataShinzi OkuharaMitsuru KawanamiMichio Tokunaga
    • Ichiro OhhinataShinzi OkuharaMitsuru KawanamiMichio Tokunaga
    • H02M1/06H02M1/08H03K17/60H03K17/615H03K17/73H03K17/72
    • H03K17/615H03K17/60H03K17/73
    • A semiconductor switch circuit comprises a PNPN switch with a PNPN semiconductor four-layered structure equivalently including first and second transistors and a gate terminal, a load current dividing circuit including at least one transistor, a variable impedance bypass circuit including at least one transistor, and a capacitive element. The base and the collector of the transistor included in the load current dividing circuit are connected to the cathode and the anode of the PNPN switch, respectively. The collector and the emitter of the transistor included in the variable impedance bypass circuit are connected to the P-type base of the second transistor of the PNPN switch and to the emitter of the transistor of the load-current-dividing circuit, respectively. The base of the transistor of the variable impedance bypass circuit is connected to the anode of the PNPN switch through the capacitive element and is controlled for gate turn-off operation. The PNPN switch having self-holding ability is combined with a transistor which does not have self-holding ability but current-amplifying ability to divide the load current into a current flowing through the PNPN switch and a collector current of the transistor. No large load current is imposed on the PNPN switch but most of the load current is passed through the transistors thereby to facilitate gate turn-off operation. Further, the PNPN switch is protected against the rate effect by use of the variable impedance bypass circuit. Thus both large and small load currents can be controlled with a small self-holding current.
    • 半导体开关电路包括具有PNPN半导体四层结构的PNPN开关,其等效地包括第一和第二晶体管和栅极端子,负载电流分配电路包括至少一个晶体管,包括至少一个晶体管的可变阻抗旁路电路和 电容元件。 包括在负载分流电路中的晶体管的基极和集电极分别连接到PNPN开关的阴极和阳极。 包含在可变阻抗旁路电路中的晶体管的集电极和发射极分别连接到PNPN开关的第二晶体管的P型基极和负载分流电路的晶体管的发射极。 可变阻抗旁路电路的晶体管的基极通过电容元件连接到PNPN开关的阳极,并被控制用于栅极关断操作。 具有自保持能力的PNPN开关与不具有自持能力但是将负载电流分流成流过PNPN开关的电流和晶体管的集电极电流的电流放大能力的晶体管组合。 对PNPN开关没有施加大的负载电流,但是大部分负载电流通过晶体管,从而便于关闭关断操作。 此外,PNPN开关通过使用可变阻抗旁路电路来防止速率效应。 因此,可以用小的自保持电流来控制大小负载电流。
    • 5. 发明授权
    • Constant current circuit
    • 恒流电路
    • US4112346A
    • 1978-09-05
    • US823197
    • 1977-08-09
    • Michio TokunagaIchiro OhhinataShinzi Okuhara
    • Michio TokunagaIchiro OhhinataShinzi Okuhara
    • G05F1/56
    • G05F1/56
    • A constant current circuit includes two characteristic-correlated PNP transistors connected to a constant voltage source and having common-connected emitters and common-connected bases and an NPN transistor. A constant current is taken out of a collector of a first PNP transistor. A collector of a second PNP transistor is connected to a base of the NPN transistor and the common-connected emitters of the first and second PNP transistors is connected to a collector of the NPN transistor to form a negative feedback circuit in the first PNP transistor, whereby when a current gain of the second PNP transistor which is characteristic corelated to the first PNP transistor is high a large amount of feedback is applied and when the current gain is low a small amount of feedback is applied so that the magnitude of the output constant current taken from the collector of the first PNP transistor is adjusted.
    • 恒流电路包括连接到恒压源并且具有共同连接的发射极和共连接基极的两个特征相关PNP晶体管和NPN晶体管。 从第一PNP晶体管的集电极中取出恒定电流。 第二PNP晶体管的集电极连接到NPN晶体管的基极,并且第一和第二PNP晶体管的共同连接的发射极连接到NPN晶体管的集电极,以在第一PNP晶体管中形成负反馈电路, 由此当第一PNP晶体管特征化的第二PNP晶体管的电流增益高时,施加大量反馈,并且当电流增益为低时,施加少量的反馈,使得输出常数的大小 调整从第一PNP晶体管的集电极获取的电流。
    • 6. 发明授权
    • Memory circuit
    • 存储电路
    • US4031412A
    • 1977-06-21
    • US643757
    • 1975-12-23
    • Ichiro OhhinataShinzi Okuhara
    • Ichiro OhhinataShinzi Okuhara
    • G11C11/36G11C11/41G11C11/411H03K3/286H03K3/352H03K17/00G11C11/40
    • H03K3/352G11C11/4113H03K3/286
    • A memory circuit comprises a semiconductor element circuit having equivalently a PNPN four-layer structure, at least an NPN transistor and a diode. An N-type emitter of the semiconductor element circuit is connected to the base of the NPN transistor, while a P-type base of the circuit is connected to the collector of the NPN transistor through the diode. The semiconductor element circuit has a positive feedback loop which is additionally provided with another feedback loop extending across the P-type base and the N-type emitter of the semiconductor element circuit, whereby in the ON holding state of the memory circuit the semiconductor element circuit is operated as a current stabilizing circuit and the transistor included in the additional feedback loop is stabilized in a controlled staturation state. The memory circuit can thus be operated at a high speed with a low power consumption.
    • 存储电路包括具有等效的PNPN四层结构的半导体元件电路,至少NPN晶体管和二极管。 半导体元件电路的N型发射极连接到NPN晶体管的基极,而电路的P型基极通过二极管连接到NPN晶体管的集电极。 半导体元件电路具有正反馈回路,其另外设置有跨越P型基极和半导体元件电路的N型发射极的另一个反馈回路,由此在存储电路的导通保持状态下,半导体元件电路 作为电流稳定电路工作,并且包含在附加反馈回路中的晶体管被​​稳定在受控的稳态状态。 因此,存储器电路可以以低功耗高速运行。
    • 7. 发明授权
    • Semiconductor speech path switch circuitry
    • 半导体语音路径开关电路
    • US3942040A
    • 1976-03-02
    • US484320
    • 1974-06-28
    • Shinzi Okuhara
    • Shinzi Okuhara
    • H03K17/00H03K17/72H03K17/725H04Q3/52H03K17/56
    • H04Q3/521H03K17/725
    • A semiconductor speech path switch circuitry is disclosed in which a terminal is provided to one region of a semiconductor device located between two points to be channeled to each other and having a four-region structure of PNPN with three PN junctions, the one region having the lowest impurity concentration in the semiconductor device and also determining the breakdown voltage thereof, a bias voltage being applied to the terminal through a variable impedance circuit exhibiting a high impedance in the turned-on state of the semiconductor device while exhibiting a low impedance in the turned-off state of the semiconductor device. In the semiconductor channel switch circuitry, the crosstalk through the junction capacitances is greatly reduced and the available frequency band is wide.
    • 公开了一种半导体语音路径切换电路,其中终端被提供给位于要被引导到彼此之间的两个点之间的半导体器件的一个区域,并具有具有三个PN结的PNPN的四区域结构,该区域具有 半导体器件中的最低杂质浓度,并且还确定其击穿电压,偏置电压通过可变阻抗电路施加到端子,该可变阻抗电路在半导体器件的接通状态下呈现高阻抗,同时在转向 - 半导体器件的状态。 在半导体通道开关电路中,通过结电容的串扰大大降低,可用频带宽。
    • 10. 发明授权
    • Cathode gate triggering method and system for speech path switches
    • 阴极门触发方法和语音路径开关系统
    • US4025726A
    • 1977-05-24
    • US641298
    • 1975-12-16
    • Mitsuo MatsuyamaShinzi Okuhara
    • Mitsuo MatsuyamaShinzi Okuhara
    • H04Q3/52
    • H04Q3/521
    • A cathode gate triggering method and system for speech path channel switches using m .times. n PNPN switches as switching elements, in which l .times. n PNPN switches in each switch array connected in common at the anode thereof are connected in multiple at the control gate thereof to substantially a single control gate common line through respective diodes, and a single constant-current regulated power supply capable of switching the output current thereof by being controlled by an external control source is connected to this control gate common line for supplying constant current to the control gate of each of the PNPN switches, so that uniform gate current can be supplied to each of the multiple connection stages, and each of the PNPN switches can be triggered in a stable and reliable manner.
    • 一种使用mxn PNPN开关作为开关元件的语音路径通道切换的阴极门触发方法和系统,其中在其阳极处共同连接的每个开关阵列中的每个开关阵列中的lnn PNPN开关在其控制栅极处连接到基本上单个控制 通过各个二极管的栅极公共线,并且能够通过外部控制源来控制其输出电流的单个恒定电流调节电源连接到该控制栅极公共线,以向每个的控制栅极提供恒定电流 PNPN交换机,从而可以向多个连接级中的每一个提供均匀的栅极电流,并且可以以稳定可靠的方式触发每个PNPN开关。