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    • 7. 发明专利
    • Oscillating and boosting circuit
    • 振荡和升压电路
    • JPS5743571A
    • 1982-03-11
    • JP11939180
    • 1980-08-28
    • Nec Home Electronics Ltd
    • KANEDA ISAO
    • H05B41/18H02M5/20H02M7/04H03K3/352H05B41/04
    • H02M5/20H03K3/352H05B41/042H05B41/044
    • PURPOSE:To improve the efficiency of a high-frequency power source, by a method wherein an impedance matching means is provided between the load and the high- frequency high-voltage source which is actuated by a low-frequency power source. CONSTITUTION:A power source 5 which generates high frequency high voltage is actuated by a low-frequency alternating current source 1, and a matching circuit 7 is inserted between the source 5 and the load 3. The impedance of the matching circuit 7 is so determined that the interior impedance of the source 5 and the exterior impedance which includes the matching circuit 7 and the load 3 are matched. For example, in case of applying above configulation to the load 3 such as a discharge lamp, the impedance Z1 of a high-frequency inductor 71 as a matching means is so determined that the sum of Z1 and the impedance of the discharge lamp 3 is equal to the interior impedance of the intermittent high-voltage circuit 5.
    • 目的:为了提高高频电源的效率,通过一种方法,其中在由低频电源驱动的负载和高频高压电源之间提供阻抗匹配装置。 构成:产生高频高电压的电源5由低频交流电源1驱动,匹配电路7插入在源5和负载3之间。匹配电路7的阻抗如此确定 源5的内部阻抗和包括匹配电路7和负载3的外部阻抗匹配。 例如,在对放电灯等负载3进行上述配置的情况下,作为匹配装置的高频电感器71的阻抗Z1被确定为:Z1与放电灯3的阻抗之和为 等于间歇高压电路5的内部阻抗。
    • 8. 发明专利
    • Oscillation circuit
    • 振荡电路
    • JPS5728427A
    • 1982-02-16
    • JP10278680
    • 1980-07-25
    • Nec Corp
    • NAKAYAMA KATSUYUKIKOMIYA YUUJI
    • H03K3/352H03K3/42
    • H03K3/352
    • PURPOSE:To achieve low power consumption and to reduce the number of components, by connecting a resistor to the gate of a photo N gate SCR(LAPUT) and a capacitor to the anode. CONSTITUTION:When no optical signal 9 is irradiated, a LAPUT11 is at high impedance state and no oscillation is made. When the optical signal is irradiated, a reverse current flows to the junction between the gate and the anode of the LAPUT11 and a capacitor 2 is charged with this current. When the anode potential is higher than the potential of the gate G, the anode A and the cathode K of the LAPUT11 are conducted and a pulse current flows to the cathode K from a power supply 2 via a resistor 10. At the same time, a capacitor 2 is discharged and the state restores to the initial condition. Thereafter, the same operation is repeated.
    • 目的:通过将电阻连接到光栅N栅极SCR(LAPUT)和电容器到阳极的栅极,实现低功耗和减少元件数量。 构成:当没有光信号9被照射时,LAPUT11处于高阻抗状态,不产生振荡。 当光信号被照射时,反向电流流到LAPUT11的栅极和阳极之间的结,并且电容器2被该电流充电。 当阳极电位高于栅极G的电位时,导通LAPUT11的阳极A和阴极K,脉冲电流通过电阻10从电源2流向阴极K.同时, 电容器2被放电,状态恢复到初始状态。 此后,重复相同的操作。
    • 9. 发明公开
    • 트랜지스터를 이용한 래치회로
    • 使用晶体管的锁存电路
    • KR1020010065382A
    • 2001-07-11
    • KR1019990065259
    • 1999-12-29
    • 엘지이노텍 주식회사
    • 문창덕
    • H03K19/00
    • H03K3/288H03K3/352
    • PURPOSE: A latch circuit using transistors is provided which replaces a conventional latch circuit constructed of flip-flops to be used as a circuit for protecting microcomputers, ICs, power circuits and electric devices. CONSTITUTION: A latch circuit using transistors includes the first transistor(Q1) whose collector is connected to a power supply(Vcc) through the second resistor(R2), whose base receives a reset signal and whose emitter is connected to the collector of the third transistor(Q3), and the second transistor(Q2) whose emitter is connected to the power supply through the first resistor(R1), whose base receives an input signal and whose collector is connected to the third resistor(R3). The latch circuit further has the third transistor whose base is connected to the collector of the fourth transistor(Q4), whose collector is connected to the collector of the second transistor, the fourth resistor(R4) and the base of the fourth transistor, and the fourth transistor whose emitter is connected to the third resistor and free terminal of the fourth resistor.
    • 目的:提供一种使用晶体管的锁存电路,其替代了用作保护微型计算机,IC,电源电路和电气设备的电路的触发器构成的常规锁存电路。 构成:使用晶体管的锁存电路包括其集电极通过第二电阻器(R2)连接到电源(Vcc)的第一晶体管(Q1),其基极接收复位信号,其发射极连接到第三晶体管 晶体管(Q3)和第二晶体管(Q2),其发射极通过第一电阻器(R1)连接到电源,其基极接收输入信号并且其集电极连接到第三电阻器(R3)。 锁存电路还具有第三晶体管,其基极连接到第四晶体管(Q4)的集电极,其集电极连接到第二晶体管的集电极,第四电阻器(R4)和第四晶体管的基极,以及 第四晶体管的发射极连接到第四电阻器的第三电阻器和自由端子。
    • 10. 发明专利
    • Pulse oscillator
    • 脉冲振荡器
    • JPS5778212A
    • 1982-05-15
    • JP15571080
    • 1980-10-31
    • Matsushita Electric Works Ltd
    • MATSUMURA JIYUNJI
    • H03K3/017H03K3/352H03K3/3525
    • H03K3/352
    • PURPOSE:To vary a duty ratio and a flicker period independently of each other with a simple constitution, by comparing the charging voltage of the capacitor of a relaxation oscillating circuit with a reference voltage and by controlling a switch part by the comparison output. CONSTITUTION:A relaxation oscillating circuitIis operated by a voltage obtained by rectifying an AC power source E by diodes D1-D4. When a charging voltage VA of a capacitor C2 of the circuitIbecomes higher than a reference voltage Vd determined by resistances R5-R7 of a comparing part II, a comparator 2 is turned off to make a thyristor TH3 of a switch part III conductive. When the voltage VA reaches a gate voltage VG of a PUT1, the PUT1 becomes conductive, and charge of the C2 is discharged, and the comparator 2 is turned on to cut off the TH3. By repeating this operation, power is supplied intermittently to a relay RY of a relay part - to flicker a light emitting diode LED. The value of a resistance R8 is changed to change the flicker period with a constant duty ratio, and the value of the resistance R5 or R6 is changed to change the duty ratio with a constant flicker period.
    • 目的:通过简单的结构,通过将弛豫振荡电路的电容器的充电电压与参考电压进行比较,并通过比较输出控制开关部分,来独立地改变占空比和闪烁周期。 构成:弛豫振荡电路通过由二极管D1-D4对AC电源E进行整流而获得的电压进行操作。 当电路的电容器C2的充电电压VA高于由比较部分II的电阻R5-R7确定的参考电压Vd时,比较器2被截止,使得开关部分III的晶闸管TH3导通。 当电压VA达到PUT1的栅极电压VG时,PUT1导通,C2的电荷被放电,比较器2导通以截断TH3。 通过重复该操作,间歇地向继电器部件的继电器RY供电,以闪烁发光二极管LED。 改变电阻R8的值以恒定占空比改变闪烁周期,并且改变电阻R5或R6的值以改变具有恒定闪烁周期的占空比。