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1. 发明专利

DE3414781A1 Multi-layer connection structure of a semi-conductor device 未知
公开(公告)号：DE3414781A1
公开(公告)日：1984-10-25
申请号：DE3414781
申请日：1984-04-18
申请人： MITSUBISHI ELECTRIC CORP
发明人： OKAMOTO TATSUO , EGUCHI KOUJI , KOTANI HIDEO
IPC分类号： H01L23/52 , H01L21/3205 , H01L21/768 , H01L23/532 , H01L21/90 , H01L21/94
摘要： A multi-layer connection structure of a semi-conductor device is described, which is provided on a semi-conductor substrate (1), said multi-layer connection structure having conductive layers (3a, 3b and 8a) and an insulating layer (4), which are provided so as to overlap on the semi-conductor substrate (1), and further having an interlayer (12a) which is provided between the upper conductive layer (8a) and the insulating layer (4). The conductive layers (3a, 3b and 8a) consist of aluminium or of aluminium-containing alloys, and the insulating layer (4) consists of silicon nitride or silicon oxide. The interlayer (12a) consists of titanium or of a titanium-containing alloy and has strong adhesion to the conductive layer (8a) and to the insulating layer (4). The interlayer (12a) serves as a barrier for preventing the reaction between the conductive layer (8a) and the insulating layer (4). In said multi-layer connection structure with the interlayer (12a), the conductive layer (8a) never buckles separately from the insulating layer (4), even if a heat treatment is applied.

2. 发明专利

DE4218495A1 Semiconductor device suitable for LSI - has 2nd metal wiring layer formed on metal film electrically connected to photoresist, selectively coated on 1st metal wiring above insulating layer 未知
公开(公告)号：DE4218495A1
公开(公告)日：1992-12-10
申请号：DE4218495
申请日：1992-06-04
申请人： MITSUBISHI ELECTRIC CORP
发明人： ADACHI HIROSHI , ADACHI ETSUSHI , MINAMI SHINTARO , KOTANI HIDEO , HAYASHIDE YOSHIO , TSUTSUMI TOSHIAKI , MATSUURA MASAZUMI , ISHII ATSUSHI
IPC分类号： H01L21/285 , H01L21/28 , H01L21/312 , H01L21/768 , H01L23/522 , H01L23/532
摘要： Semiconductor device has a semiconductor substrate (I) with an insulating upper main surface (IA); a 1st. metal wiring layer (II) on (IA); an intermediate insulating film (III), with a photoresist film (IIIA) at least on top, which is coated selectively on (II) and has a defined opening; a metal film (IV) at least in the opening and connected electrically with (II); and a 2nd. metal wiring layer (V) formed on (III) and (IV) and connected electrically with (IV). (IA) Is an oxide film. (IV) is produced by CVD. (III) consists of an insulating film esp. an oxide film, covered with (IIIA); or of (IIIA) only. (IIIA) is hardened film of a silicone ladder polymer of formula (IIIA-1), esp. a photopolymer. In (IIIA-1), R1-2 are phenyl, lower alkyl or photosensitive gps., pref. at least 3 mole-% being photopolymerisable unsatd. gps.; R3-6 are H, lower alkyl or photosensitive gps.; and n is 5-1000 (pref. 20-1000). USE/ADVANTAGE - The device is suitable for LSI. A tungsten film with very low electrical resistance can be formed in the contact hole only, since no tungsten is deposited on (III) under suitable CVD conditions, which saves etching. (V) adheres very well to the silicone ladder polymer film pref. used as (IIIA) and is extremely level. If (III) is a silicone ladder photopolymer, no other (IIIA) is needed, which simplifies prodn..

3. 发明专利

DE4100525A1 未知
公开(公告)号：DE4100525A1
公开(公告)日：1991-08-08
申请号：DE4100525
申请日：1991-01-10
申请人： MITSUBISHI ELECTRIC CORP
发明人： MATSUURA MASAZUMI , KOTANI HIDEO , FUJII ATSUHIRO , NAGAO SHIGEO , GENJO HIDEKI
IPC分类号： H01L21/02 , H01L21/316 , H01L21/768
摘要： The method of forming an interlayer insulating film insulating first and second layers of conductor patterns in a semiconductor device includes the steps of preparing a reaction gas including at least ozone and silicon alkoxide, wherein the ratio of ozone with respect to silicon alkoxide is adjusted to be not less than 5 within the reaction gas, and forming an insulating film by CVD reacting the reaction gas at atmospheric pressure at the temperature of 350 DEG C.-450 DEG C., whereupon the interlayer insulating film includes at least the insulating film formed by atmospheric pressure CVD reaction.

4. 发明专利

DE4100525C2 未知
公开(公告)号：DE4100525C2
公开(公告)日：1994-12-08
申请号：DE4100525
申请日：1991-01-10
申请人： MITSUBISHI ELECTRIC CORP
发明人： MATSUURA MASAZUMI , KOTANI HIDEO , FUJII ATSUHIRO , NAGAO SHIGEO , GENJO HIDEKI
IPC分类号： H01L21/02 , H01L21/316 , H01L21/768 , H01L21/72 , H01L27/108 , C23C16/40
摘要： The method of forming an interlayer insulating film insulating first and second layers of conductor patterns in a semiconductor device includes the steps of preparing a reaction gas including at least ozone and silicon alkoxide, wherein the ratio of ozone with respect to silicon alkoxide is adjusted to be not less than 5 within the reaction gas, and forming an insulating film by CVD reacting the reaction gas at atmospheric pressure at the temperature of 350 DEG C.-450 DEG C., whereupon the interlayer insulating film includes at least the insulating film formed by atmospheric pressure CVD reaction.

5. 发明专利

JPH0258353A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH0258353A
公开(公告)日：1990-02-27
申请号：JP21020388
申请日：1988-08-24
申请人： MITSUBISHI ELECTRIC CORP
发明人： KOTANI HIDEO
IPC分类号： H01L21/768 , H01L21/316
摘要： PURPOSE:To form a semiconductor device having an interlayer insulating layer which has satisfactory crack resistance and step coverage by forming the interlayer insulating layer of first and second insulating layers, and disposing the first layer on the side of a semiconductor substrate. CONSTITUTION:A semiconductor substrate 1 containing a semiconductor element, etc., an aluminum alloy conductive layer 2 formed 0.6(mum) thick on the substrate, a first insulating layer 6 formed 0.2(mum) thick by a plasma CVD method using silane, nitrogen suboxide as reaction gases, and a second insulating layer 7 formed 0.6(mum) thick by a normal pressure CVD method using organic silane as reaction gas on the upper face of the layer 6, and an interlayer insulating layer is formed together with the first layer. In this structure, the layer 6 having no problem for crack resistance is disposed on the side in direct contact with the layer 2, and the layer 7 having a slight problem for the crack resistance but satisfactory step coverage is disposed in the shape not in direct contact with the layer 2.

6. 发明专利

JPS6386453A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS6386453A
公开(公告)日：1988-04-16
申请号：JP23205386
申请日：1986-09-29
申请人： MITSUBISHI ELECTRIC CORP
发明人： KOTANI HIDEO , OKAMOTO TATSURO , ONO TAKIO , WATABE KIYOTO , KINOSHITA YASUSHI , NISHIKAWA KIICHI
IPC分类号： H01L21/3205
摘要： PURPOSE:To make larger the width of a first conductor film than the width of a wiring even though side etchings are generated and to improve the coverage forms of the step parts of an insulating film by a method wherein the first conductor film is etched using the wiring and parts of the thin films left only on the sidewall parts of this wiring as masks. CONSTITUTION:A thin film 10 consisting of an Si oxide film, a titanium-tungsten alloy film or the like is formed on the surface of a barrier metal film 2 and the surface of a wiring 3 by a CVD method or the like. Then, the thin film 10 is anisotropically etched by a reactive ion etching method or the like and thin films 10a and 10b are left only on the sidewall parts of the wiring 3. Then, the barrier metal film 2 is etched using the wiring 3 and the thin films 10a and 10b as masks to form a barrier metal film 21. At this time, the amounts of side etchings 50a and 50b to be generated are each contrived so as to become smaller than the widths of the bottom surfaces of the thin films 10a and 10b. Then, the thin films 10a and 10b are removed by isotropically etching. As the width of the barrier metal film 21 is larger than that of the wiring 3, the coverage form of an insulating film 60 to be lastly formed is improved.

7. 发明专利

JPS6249735B2 失效
公开(公告)号：JPS6249735B2
公开(公告)日：1987-10-21
申请号：JP19470481
申请日：1981-11-30
申请人： MITSUBISHI ELECTRIC CORP
发明人： TSUKAMOTO KATSUHIRO , KOTANI HIDEO , YAKUSHIJI HISAO , HARADA HIROTSUGU
IPC分类号： H01L21/768

8. 发明专利

JPS62108531A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS62108531A
公开(公告)日：1987-05-19
申请号：JP24954085
申请日：1985-11-06
申请人： MITSUBISHI ELECTRIC CORP
发明人： KOTANI HIDEO , NAKAO SHUJI
IPC分类号： H01L21/316 , H01L21/314 , H01L21/318
摘要： PURPOSE:To obtain a semiconductor device having damp-proofing property by forming a coated glass film onto a final protective film being shaped, while coating a semiconductor element on a semiconductor substrate. CONSTITUTION:Glass for coating is manufactured by dissolving an silicon compound into an organic solvent. Glass for coating is applied onto a final protective film 3 through a specified method of application, and baked at a temperature of approximately 400-450 deg.C, thus forming an applying glass film as a thin-film mainly comprising silicon oxide. The glass liquid penetrates into a crack 4 and a pin hole 5 generated in the final protective film 3 through an application process while coating these crack and pinhole, thus shaping a solid mainly comprising silicon oxide through a braking process. Accordingly, the intrusion of moisture, etc. into a semiconductor device is prevented.

9. 发明专利

JPS6124467B2 JPS6124467B2 - 失效
公开(公告)号：JPS6124467B2
公开(公告)日：1986-06-11
申请号：JP4912681
申请日：1981-03-30
申请人： Mitsubishi Electric Corp
发明人： KOTANI HIDEO , MIZUGUCHI KAZUO , OOHAYASHI YOSHIKAZU , DENDA MASAHIKO , SATO SHINICHI
IPC分类号： C23C16/50 , C23C16/509 , H01L21/285
CPC分类号： C23C16/5096

10. 发明专利

JPS60214543A Manufacture of semiconductor device 失效
标题翻译：半导体器件的制造
公开(公告)号：JPS60214543A
公开(公告)日：1985-10-26
申请号：JP7119584
申请日：1984-04-09
申请人： Mitsubishi Electric Corp
发明人： MATSUDA SHIYUUICHI , OKAMOTO TATSUROU , KOTANI HIDEO
IPC分类号： H01L23/522 , H01L21/768 , H01L21/88
摘要： PURPOSE:To prevent the generation of a hillock and electromigration by a method wherein a metal film of Al or an Al-Si alloy is formed on the substrate, and after that, the surface of the metal film is made to oxide and the metal film is turned into an insulating film. CONSTITUTION:A metal film 2 is formed on an Si substrate 1 by a sputtering method and when a lamp annealing is performed by irradiating infrared rays 7 on the metal film 2 for a short time in an atmosphere of O2 gas, the surface of the metal film 2 is brought to high temperatures and is oxidized with O2 and a thin oxide film 8 is formed. Accordingly, a resist pattern 3 is formed, the metal film 2 is performed an atching using an RIE, and after that, when an interlayer insulating film 5 is formed by a CVD method, it can be prevented for a hillock to generate on the surface of the metal film 2. Moreover, the electromigration- resisting property of the metal film 2 is upgraded by this oxide film 8 and the lifetime of this semiconductor device is improved.
摘要翻译：目的：通过在基板上形成Al或Al-Si合金的金属膜的方法，防止产生小丘和电迁移，然后将金属膜的表面制成氧化物，将金属膜变成绝缘膜。构成：通过溅射法在Si衬底1上形成金属膜2，并且当通过在O 2气体的气氛中短时间地在金属膜2上照射红外线7进行灯退火时，金属的表面将膜2带到高温并用O 2氧化并形成薄的氧化膜8。因此，形成抗蚀剂图案3，使用RIE进行金属膜2的翘曲，之后，通过CVD法形成层间绝缘膜5时，可以防止在表面产生小丘此外，通过该氧化膜8使金属膜2的耐迁移性提高，并且该半导体器件的寿命得到改善。

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