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1. 发明授权

US06214745B1 Method of improving surface planarity of chemical-mechanical polishing operation by forming shallow dummy pattern 失效
标题翻译：通过形成浅虚拟图案提高化学机械抛光操作的表面平面度的方法
公开(公告)号：US06214745B1
公开(公告)日：2001-04-10
申请号：US09195685
申请日：1998-11-19
申请人： Ming-Sheng Yang , Yimin Huang , Juan-Yuan Wu , Water Lur
发明人： Ming-Sheng Yang , Yimin Huang , Juan-Yuan Wu , Water Lur
IPC分类号： H01L2131
CPC分类号： H01L21/7684 , H01L21/3212
摘要： A chemical-mechanical polishing method utilizes a shallow dummy pattern for planarizing a dielectric layer. The method includes the steps of first forming a shallow dummy pattern on the dielectric layer, and then coating a patterned photoresist layer over the dielectric layer. Thereafter, the photoresist layer is used as a mask to form openings in other areas of the dielectric layer. Subsequently, the photoresist layer is removed to expose the shallow dummy pattern, and then a glue/barrier layer and a conductive layer are sequentially deposited. Next, a chemical-mechanical polishing operation is carried out to remove excess conductive layer and glue/barrier layer above the dielectric layer as well as the shallow dummy pattern at the same time. Since the removal rate of glue/barrier layer in each area above the dielectric layer is about the same, a planar substrate surface is obtained.
摘要翻译：化学机械抛光方法利用浅哑图形来平坦化介电层。该方法包括以下步骤：首先在电介质层上形成浅哑图案，然后在电介质层上涂覆图案化的光致抗蚀剂层。此后，将光致抗蚀剂层用作掩模以在电介质层的其它区域中形成开口。随后，去除光致抗蚀剂层以露出浅哑图案，然后依次沉积胶/阻挡层和导电层。接下来，进行化学机械抛光操作，以同时去除介电层上方的多余的导电层和胶/阻挡层以及浅哑图案。由于介电层上方的每个区域中胶/阻挡层的去除速率大致相同，所以获得了平坦的基板表面。

2. 发明授权

US06790742B2 Chemical mechanical polishing in forming semiconductor device 有权
标题翻译：化学机械抛光成型半导体器件
公开(公告)号：US06790742B2
公开(公告)日：2004-09-14
申请号：US10293243
申请日：2002-11-13
申请人： Ming-Sheng Yang , Juan-Yuan Wu , Water Lur
发明人： Ming-Sheng Yang , Juan-Yuan Wu , Water Lur
IPC分类号： H01L2176
CPC分类号： H01L21/76229
摘要： A method of chemical-mechanical polishing for forming a shallow trench isolation is disclosed. A substrate having a number of active regions, including a number of relatively large active regions and a number of relative small active regions, is provided. The method comprises the following steps. A silicon nitride layer on the substrate is formed. A number of shallow trenches are formed between the active regions one or more of which may constitute an alignment mark. An oxide layer is formed over the substrate, so that the shallow trenches are filled with the oxide layer. A partial reverse active mask is formed on the oxide layer. The partial reverse active mask exposes a portion of the oxide layer over the large active area and over the alignment mark. The oxide layer of each large active region and the alignment mark is removed. The partial reverse active mask is removed. The oxide layer is planarized.
摘要翻译：公开了用于形成浅沟槽隔离的化学机械抛光的方法。提供了具有多个有效区域的基板，包括多个相对较大的有源区域和多个相对小的有源区域。该方法包括以下步骤。形成衬底上的氮化硅层。在有源区域之间形成多个浅沟槽，其中一个或多个可以构成对准标记。在衬底上形成氧化物层，使得浅沟槽被氧化物层填充。在氧化物层上形成部分反向有源掩模。部分反向有源掩模将氧化物层的一部分暴露在大的有效区域上方和对准标记之上。去除每个大活性区域的氧化物层和对准标记。去除部分反向主动掩模。氧化层平坦化。

3. 发明授权

US6024106A Post-CMP wafer clean process 有权
标题翻译： CMP后晶圆清洁工艺
公开(公告)号：US6024106A
公开(公告)日：2000-02-15
申请号：US195794
申请日：1998-11-19
申请人： Ming-Sheng Yang , Juan-Yuan Wu , Water Lur
发明人： Ming-Sheng Yang , Juan-Yuan Wu , Water Lur
IPC分类号： B08B3/12 , C11D7/26 , C11D7/32 , C11D11/00 , H01L21/00 , B08B6/00 , C11D9/04
CPC分类号： H01L21/67057 , B08B3/12 , C11D11/0047 , C11D11/007 , C11D7/3218
摘要： A post-CMP wafer clean process. A post-CMP wafer is provided. A portion of particles and slurry are removed from the wafer by double side scrubber. The residual particles and slurry are then removed from the wafer in a solvent tank by magasonic and a solvent in the solvent tank includes an amine-based compound.
摘要翻译：后CMP晶圆清洁工艺。提供了后CMP晶片。通过双面洗涤器将一部分颗粒和浆料从晶片上除去。然后通过磁共振在溶剂罐中从晶片上除去残留的颗粒和浆料，溶剂槽中的溶剂包括胺类化合物。

4. 发明授权

US06609954B1 Method of planarization 有权
标题翻译：平面化方法
公开(公告)号：US06609954B1
公开(公告)日：2003-08-26
申请号：US09182968
申请日：1998-10-29
申请人： Ming-Sheng Yang , Kuen-Jian Chen , Juan-Yuan Wu , Water Lur
发明人： Ming-Sheng Yang , Kuen-Jian Chen , Juan-Yuan Wu , Water Lur
IPC分类号： B24B100
CPC分类号： B24B37/042 , B24B57/02 , H01L21/31053 , H01L21/3212
摘要： A polarization method that utilizes a chemical-mechanical polishing operation. In the polishing operation, slurry for polishing a metallic layer is first employed to remove a greater portion of the metallic layer. Next, slurry for polishing a dielectric layer and having properties very similar to the metal-polishing slurry is added and mixed together with the slurry for polishing a metallic layer so that the polishing rate for the dielectric layer is increased. Consequently, metallic residues remaining on the dielectric layer are removed and a planar dielectric layer is obtained at the same time.
摘要翻译：利用化学机械抛光操作的极化方法。在抛光操作中，首先使用用于抛光金属层的浆料去除大部分金属层。接下来，添加用于抛光电介质层并且具有与金属抛光浆料非常相似的性质的浆料，并与用于抛光金属层的浆料混合在一起，使得电介质层的抛光速率增加。因此，除去残留在电介质层上的金属残留物，同时获得平面介电层。

5. 发明授权

US06362101B1 Chemical mechanical polishing methods using low pH slurry mixtures 失效
公开(公告)号：US06362101B1
公开(公告)日：2002-03-26
申请号：US08976605
申请日：1997-11-24
申请人： Ming-Sheng Yang , Juan-Yuan Wu , Water Lur , Shih-Wei Sun
发明人： Ming-Sheng Yang , Juan-Yuan Wu , Water Lur , Shih-Wei Sun
IPC分类号： H01L21302
摘要： A method for chemical mechanical polishing a component includes providing an oxide layer and forming at least one via through the oxide layer. A tungsten layer is formed within the via and over the oxide layer. A first chemical mechanical polishing step is carried out on a polishing pad using a first slurry having an oxidizing component and having a pH of approximately 2 to approximately 4 to remove the tungsten layer from over the oxide layer. A second chemical mechanical polishing step is carried out on the polishing pad using a second slurry having a pH of approximately 2 to approximately 4 to polish scratches out of the oxide layer.

6. 发明授权

US07037802B2 Chemical mechanical polishing in forming semiconductor device 有权
公开(公告)号：US07037802B2
公开(公告)日：2006-05-02
申请号：US10939716
申请日：2004-09-13
申请人： Ming-Sheng Yang , Juan-Yuan Wu , Water Lur
发明人： Ming-Sheng Yang , Juan-Yuan Wu , Water Lur
IPC分类号： H01L21/76
CPC分类号： H01L21/76229
摘要： A method of chemical-mechanical polishing for forming a shallow trench isolation is disclosed. A substrate having a number of active regions, including a number of relatively large active regions and a number of relative small active regions, is provided. The method comprises the following steps. A silicon nitride layer on the substrate is formed. A number of shallow trenches are formed between the active regions one or more of which may constitute an alignment mark. An oxide layer is formed over the substrate, so that the shallow trenches are filled with the oxide layer. A partial reverse active mask is formed on the oxide layer. The partial reverse active mask exposes a portion of the oxide layer over the large active area and over the alignment mark. The oxide layer of each large active region and the alignment mark is removed. The partial reverse active mask is removed. The oxide layer is planarized.

7. 发明授权

US06344408B1 Method for improving non-uniformity of chemical mechanical polishing by over coating 有权
标题翻译：通过过涂层改善化学机械抛光不均匀的方法
公开(公告)号：US06344408B1
公开(公告)日：2002-02-05
申请号：US09296177
申请日：1999-04-22
申请人： Hsueh-Chung Chen , Ming-Sheng Yang , Juan-Yuan Wu , Water Lur
发明人： Hsueh-Chung Chen , Ming-Sheng Yang , Juan-Yuan Wu , Water Lur
IPC分类号： H01L214763
CPC分类号： H01L21/3212
摘要： A method for improving non-uniformity of chemical mechanical polishing by over coating layer is disclosed. The essential point of the invention is that an over coating layer is formed over a surface before the surface is planarized by a chemical mechanical polishing process. Note that polishing rate of the over coating layer must be less than the polishing rate of the surface, where the ratio of polishing rate is called as selectivity. Because the topography of the surface is not uniform, the topography of the over coating layer also is non-uniform and then the polishing probability in different parts of the over coating layer is different. Obviously, when the over coating layer on the higher area part of the surface is totally consumed, these are residual over coating layer on the lower area part of the surface. Thus, over polishing in the lower area part is prevented by residual over coating layer. Before total over coating layer is polished, the polished account of the surface is higher in the high area part and is lower in the lower area part. Thus, uniformity of the surface is enhanced. Moreover, enhancement of uniformity is direct proportional to product of selectivity and depth of over coating layer.
摘要翻译：公开了一种通过过涂层改善化学机械抛光不均匀性的方法。本发明的要点在于，在通过化学机械抛光工艺对表面进行平面化之前，在表面上形成过涂覆层。注意，涂层的抛光速率必须小于抛光速率比被称为选择性的表面的抛光速率。由于表面的形貌不均匀，外涂层的形貌也不均匀，在外涂层不同部位的抛光概率不同。显然，当表面的较高区域部分上的过涂层完全消耗时，这些是在表面的下部区域上的残留涂层。因此，通过残留的覆盖层来防止在下部区域部分的过度抛光。在完全涂覆层被抛光之前，表面的抛光量在高面积部分较高，下部区域较低。因此，表面的均匀性增强。此外，均匀性的增强与涂层的选择性和深度的乘积成正比。

8. 发明申请

US20050032328A1 Chemical mechanical polishing in forming semiconductor device 有权
标题翻译：化学机械抛光成型半导体器件
公开(公告)号：US20050032328A1
公开(公告)日：2005-02-10
申请号：US10939716
申请日：2004-09-13
申请人： Ming-Sheng Yang , Juan-Yuan Wu , Water Lur
发明人： Ming-Sheng Yang , Juan-Yuan Wu , Water Lur
IPC分类号： H01L21/762 , H01L21/00 , H01L21/302 , H01L21/461
CPC分类号： H01L21/76229
摘要： A method of chemical-mechanical polishing for forming a shallow trench isolation is disclosed. A substrate having a number of active regions, including a number of relatively large active regions and a number of relative small active regions, is provided. The method comprises the following steps. A silicon nitride layer on the substrate is formed. A number of shallow trenches are formed between the active regions one or more of which may constitute an alignment mark. An oxide layer is formed over the substrate, so that the shallow trenches are filled with the oxide layer. A partial reverse active mask is formed on the oxide layer. The partial reverse active mask exposes a portion of the oxide layer over the large active area and over the alignment mark. The oxide layer of each large active region and the alignment mark is removed. The partial reverse active mask is removed. The oxide layer is planarized.
摘要翻译：公开了用于形成浅沟槽隔离的化学机械抛光的方法。提供了具有多个有效区域的基板，包括多个相对较大的有源区域和多个相对小的有源区域。该方法包括以下步骤。形成衬底上的氮化硅层。在有源区域之间形成多个浅沟槽，其中一个或多个可以构成对准标记。在衬底上形成氧化物层，使得浅沟槽被氧化物层填充。在氧化物层上形成部分反向有源掩模。部分反向有源掩模将氧化物层的一部分暴露在大的有效区域上方和对准标记之上。去除每个大活性区域的氧化物层和对准标记。去除部分反向主动掩模。氧化层平坦化。

9. 发明申请

US20070076339A1 AIR GAP FOR TUNGSTEN/ALUMINUM PLUG APPLICATIONS 审中-公开
标题翻译：用于TUNGSTEN /铝插头应用的空气隙
公开(公告)号：US20070076339A1
公开(公告)日：2007-04-05
申请号：US11561790
申请日：2006-11-20
申请人： Water Lur , David Lee , Kuang-Chih Wang , Ming-Sheng Yang
发明人： Water Lur , David Lee , Kuang-Chih Wang , Ming-Sheng Yang
IPC分类号： H02H9/00
CPC分类号： H01L21/7682 , H01L21/76807
摘要： An air gap structure substantially reduces undesired capacitance between adjacent interconnects, metal lines or other features in an integrated circuit device. The air gap extends above, and may also additionally extend below, the interconnects desired to be isolated thus minimizing fringing fields between the lines. The integrated air gap structure can be utilized in conjunction with a tungsten plug process. Also, multiple levels of the integrated air gap structure can be fabricated to accommodate multiple metal levels while always ensuring that physical dielectric layer support is provided to the device structure underlying the interconnects.
摘要翻译：气隙结构基本上减少了集成电路器件中相邻互连，金属线或其他特征之间的不需要的电容。空气间隙在期望被隔离的互连之上延伸并且还可以另外延伸，从而最小化线之间的边缘场。集成气隙结构可以与钨丝塞过程一起使用。此外，可以制造多个级别的集成气隙结构以适应多个金属水平，同时始终确保将物理介电层支撑件提供给互连下面的器件结构。

10. 发明授权

US07138329B2 Air gap for tungsten/aluminum plug applications 有权
标题翻译：钨/铝插头应用的气隙
公开(公告)号：US07138329B2
公开(公告)日：2006-11-21
申请号：US10295080
申请日：2002-11-15
申请人： Water Lur , David Lee , Kuang-Chih Wang , Ming-Sheng Yang
发明人： Water Lur , David Lee , Kuang-Chih Wang , Ming-Sheng Yang
IPC分类号： H01L21/4763 , H01L21/76 , H01L21/331 , H01L21/8222
CPC分类号： H01L21/7682 , H01L21/76807 , H01L21/76813 , H01L21/76843
摘要： An air gap structure and formation method for substantially reducing the undesired capacitance between adjacent interconnects, metal lines or other features in an integrated circuit device is disclosed. The air gap extends above, and may also additionally extend below, the interconnects desired to be isolated thus minimizing fringing fields between the lines. The integrated air gap structure and formation method can be utilized in conjunction with a tungsten plug process. Also, multiple levels of the integrated air gap structure can be fabricated to accommodate multiple metal levels while always ensuring that physical dielectric layer support is provided to the device structure underlying the interconnects.
摘要翻译：公开了一种气隙结构和形成方法，用于显着减少集成电路器件中的相邻互连，金属线或其他特征之间的不需要的电容。空气间隙在期望被隔离的互连之上延伸并且还可以另外延伸，从而最小化线之间的边缘场。集成的气隙结构和形成方法可以与钨丝塞过程结合使用。此外，可以制造多个级别的集成气隙结构以适应多个金属水平，同时始终确保将物理介电层支撑件提供给互连下面的器件结构。

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