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1. 发明申请

US20050001306A1 Stacked type semiconductor device 失效
标题翻译：堆叠型半导体器件
公开(公告)号：US20050001306A1
公开(公告)日：2005-01-06
申请号：US10902291
申请日：2004-07-30
申请人： Mie Matsuo , Kenichi Imamiya
发明人： Mie Matsuo , Kenichi Imamiya
IPC分类号： G11C16/02 , H01L23/48 , H01L23/544 , H01L25/065 , H01L25/07 , H01L25/18 , H01L23/02
CPC分类号： H01L25/0657 , H01L23/544 , H01L2223/5444 , H01L2224/16145 , H01L2225/06517 , H01L2225/06541 , H01L2225/06572 , H01L2225/06596
摘要： Disclosed is a stacked type semiconductor device having a plurality of semiconductor integrated circuit chips stacked, each of the semiconductor integrated circuit chips comprising a holding circuit holding identification information about the chip, electrically written in the chip, an identification information setting circuit setting the identification information about the chip, in the holding circuit after the plurality of semiconductor integrated circuit chips have been stacked, and at least one setting terminal used to set the identification information about the chip, in the holding circuit, wherein the at least one setting terminal of any semiconductor integrated circuit chip is connected to the at least one corresponding setting terminal of any other semiconductor integrated circuit chip.
摘要翻译：公开了一种具有多个半导体集成电路芯片堆叠的叠层型半导体器件，每个半导体集成电路芯片包括保持电路，该保持电路保持电子写入芯片中的关于芯片的识别信息，设置识别信息的识别信息设置电路关于芯片，在多个半导体集成电路芯片已被堆叠之后的保持电路中，以及至少一个设置终端，用于在保持电路中设置关于芯片的识别信息，其中至少一个设置终端半导体集成电路芯片连接到任何其它半导体集成电路芯片的至少一个相应的设置端子。

2. 发明授权

US06791175B2 Stacked type semiconductor device 有权
标题翻译：堆叠型半导体器件
公开(公告)号：US06791175B2
公开(公告)日：2004-09-14
申请号：US10255960
申请日：2002-09-27
申请人： Mie Matsuo , Kenichi Imamiya
发明人： Mie Matsuo , Kenichi Imamiya
IPC分类号： H01L2302
CPC分类号： H01L25/0657 , H01L23/544 , H01L2223/5444 , H01L2224/16145 , H01L2225/06517 , H01L2225/06541 , H01L2225/06572 , H01L2225/06596
摘要： Disclosed is a stacked type semiconductor device having a plurality of semiconductor integrated circuit chips stacked, each of the semiconductor integrated circuit chips comprising a holding circuit holding identification information about the chip, electrically written in the chip, an identification information setting circuit setting the identification information about the chip, in the holding circuit after the plurality of semiconductor integrated circuit chips have been stacked, and at least one setting terminal used to set the identification information about the chip, in the holding circuit, wherein the at least one setting terminal of any semiconductor integrated circuit chip is connected to the at least one corresponding setting terminal of any other semiconductor integrated circuit chip.
摘要翻译：公开了一种具有多个半导体集成电路芯片堆叠的叠层型半导体器件，每个半导体集成电路芯片包括保持电路，该保持电路保持电子写入芯片中的关于芯片的识别信息，设置识别信息的识别信息设置电路关于芯片，在多个半导体集成电路芯片已被堆叠之后的保持电路中，以及至少一个设置终端，用于在保持电路中设置关于芯片的识别信息，其中至少一个设置终端半导体集成电路芯片连接到任何其它半导体集成电路芯片的至少一个相应的设置端子。

3. 发明授权

US06991964B2 Stacked type semiconductor device 失效
公开(公告)号：US06991964B2
公开(公告)日：2006-01-31
申请号：US10902291
申请日：2004-07-30
申请人： Mie Matsuo , Kenichi Imamiya
发明人： Mie Matsuo , Kenichi Imamiya
IPC分类号： H01L21/50
CPC分类号： H01L25/0657 , H01L23/544 , H01L2223/5444 , H01L2224/16145 , H01L2225/06517 , H01L2225/06541 , H01L2225/06572 , H01L2225/06596
摘要： Disclosed is a stacked type semiconductor device having a plurality of semiconductor integrated circuit chips stacked, each of the semiconductor integrated circuit chips comprising a holding circuit holding identification information about the chip, electrically written in the chip, an identification information setting circuit setting the identification information about the chip, in the holding circuit after the plurality of semiconductor integrated circuit chips have been stacked, and at least one setting terminal used to set the identification information about the chip, in the holding circuit, wherein the at least one setting terminal of any semiconductor integrated circuit chip is connected to the at least one corresponding setting terminal of any other semiconductor integrated circuit chip.

4. 发明授权

US08580652B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08580652B2
公开(公告)日：2013-11-12
申请号：US12875628
申请日：2010-09-03
申请人： Atsuko Kawasaki , Kenichiro Hagiwara , Ikuko Inoue , Kazutaka Akiyama , Itsuko Sakai , Mie Matsuo , Masahiro Sekiguchi , Yoshiteru Koseki , Hiroki Neko , Koushi Tozuka , Kazuhiko Nakadate , Takuto Inoue
发明人： Atsuko Kawasaki , Kenichiro Hagiwara , Ikuko Inoue , Kazutaka Akiyama , Itsuko Sakai , Mie Matsuo , Masahiro Sekiguchi , Yoshiteru Koseki , Hiroki Neko , Koushi Tozuka , Kazuhiko Nakadate , Takuto Inoue
IPC分类号： H01L29/78
CPC分类号： H01L27/14683 , H01L21/76898 , H01L23/481 , H01L23/522 , H01L24/13 , H01L24/32 , H01L27/14618 , H01L2224/13111 , H01L2224/16 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/12043 , H01L2924/3025 , H01L2924/00
摘要： According to one embodiment, a manufacturing method of a semiconductor device is disclosed. The semiconductor device includes a semiconductor substrate having first and second main surfaces, and a through hole passing through between the first and second main surfaces, a pad on the first main surface, a through electrode in the through hole, and a connection structure including a connection portion to directly connect the pad and the through electrode, and another connection portion to indirectly connect the pad and the through electrode. The method includes forming an isolation region in the first main surface, the isolation region being in a region where the through electrode is to be formed and being in a region other than the region where the through hole is to be formed, forming the pad, and forming the through hole by processing the substrate to expose a part of the pad.
摘要翻译：根据一个实施例，公开了一种半导体器件的制造方法。半导体器件包括具有第一和第二主表面的半导体衬底，以及穿过第一和第二主表面之间的通孔，第一主表面上的焊盘，通孔中的通孔，以及包括连接部分，以直接连接焊盘和通孔，以及另一个连接部分，以间接连接焊盘和通孔。该方法包括在第一主表面中形成隔离区，隔离区位于要形成通孔的区域中，并且位于除了形成通孔的区域之外的区域中，形成垫，以及通过处理所述衬底形成所述通孔以暴露所述衬垫的一部分。

5. 发明授权

US08098312B2 Back-illuminated type solid-state image pickup apparatus with peripheral circuit unit 有权
标题翻译：具有外围电路单元的背照式固态摄像装置
公开(公告)号：US08098312B2
公开(公告)日：2012-01-17
申请号：US12404675
申请日：2009-03-16
申请人： Mie Matsuo , Sachiyo Ito
发明人： Mie Matsuo , Sachiyo Ito
IPC分类号： H04N3/14 , H04N5/225
CPC分类号： H01L27/14636 , H01L27/14618 , H01L27/14627 , H01L27/1464 , H01L27/14643 , H01L2924/0002 , H04N5/2257 , H04N5/374 , H01L2924/00
摘要： A solid-state image pickup apparatus includes an image pickup pixel unit in which a plurality of pixels each including a photoelectric conversion element and a field-effect transistor are arranged on a semiconductor substrate so that a light-receiving surface is disposed at a first surface side of the semiconductor substrate; a peripheral circuit unit provided at a periphery of the image pickup pixel unit of the semiconductor substrate; and a multilayered wiring layer in which a plurality of wiring layers for driving the field-effect transistor of the image pickup pixel unit are laminated at a second surface side of the semiconductor substrate, wherein a wiring in each of the wiring layers constituting the multilayered wiring layer is disposed so that a coverage of the wiring located at least in the image pickup pixel unit of the semiconductor substrate reaches 100%, viewed from the second surface side.
摘要翻译：固态图像拾取装置包括：图像拾取像素单元，其中包括光电转换元件和场效应晶体管的多个像素布置在半导体衬底上，使得光接收表面设置在第一表面侧; 设置在半导体衬底的摄像像素单元的周围的外围电路单元; 以及多层布线层，其中用于驱动图像拾取像素单元的场效应晶体管的多个布线层层叠在半导体基板的第二表面侧，其中构成多层布线的每个布线层中的布线从第二表面侧观察，使至少位于半导体衬底的摄像像素单元中的配线的覆盖范围达到100％。

6. 发明授权

US07859073B2 Back-illuminated type solid-state image pickup device and camera module using the same 有权
标题翻译：背照式固态摄像装置及使用其的相机模块
公开(公告)号：US07859073B2
公开(公告)日：2010-12-28
申请号：US12166810
申请日：2008-07-02
申请人： Mie Matsuo , Yusuke Kohyama
发明人： Mie Matsuo , Yusuke Kohyama
IPC分类号： H01L31/0203
CPC分类号： H01L27/14618 , H01L24/24 , H01L27/1464 , H01L2224/13 , H01L2224/48091 , H01L2224/48465 , H01L2924/12043 , H04N5/2257 , H01L2924/00014 , H01L2924/00
摘要： The present invention provides a solid-state image pickup device including an image pickup pixel section which is provided on a semiconductor substrate and in which a plurality of pixels each having a photoelectric conversion element and a field-effect transistor are arranged, and a peripheral circuit section for the image pickup pixel section. An interconnect layer driving the field-effect transistor in the image pickup pixel section is formed on a first surface side of the semiconductor substrate. A light receiving surface of the photoelectric conversion element is located on a second surface side of the semiconductor substrate. The solid-state image pickup device includes a first terminal exposed from the second surface side of the semiconductor substrate, and a second terminal electrically connected to the first terminal and connectable to an external device on the first surface side of the semiconductor substrate.
摘要翻译：本发明提供了一种固态摄像装置，包括：设置在半导体衬底上的摄像像素部分，其中配置有多个具有光电转换元件和场效应晶体管的像素;以及外围电路图像拾取像素部分。驱动图像拾取像素部中的场效应晶体管的互连层形成在半导体衬底的第一表面侧上。光电转换元件的光接收表面位于半导体衬底的第二表面侧。固态摄像装置包括从半导体衬底的第二表面侧露出的第一端子和与第一端子电连接并可连接到半导体衬底的第一表面侧上的外部器件的第二端子。

7. 发明授权

US07507634B2 Method for fabricating a localize SOI in bulk silicon substrate including changing first trenches formed in the substrate into unclosed empty space by applying heat treatment 有权
标题翻译：用于制造体硅衬底中的定位SOI的方法，包括通过施加热处理将衬底中形成的第一沟槽改变为未封闭的空间
公开(公告)号：US07507634B2
公开(公告)日：2009-03-24
申请号：US11812490
申请日：2007-06-19
申请人： Tsutomu Sato , Mie Matsuo , Ichiro Mizushima , Yoshitaka Tsunashima , Shinichi Takagi
发明人： Tsutomu Sato , Mie Matsuo , Ichiro Mizushima , Yoshitaka Tsunashima , Shinichi Takagi
IPC分类号： H01L21/764 , H01L27/12
CPC分类号： H01L27/10805 , B82Y20/00 , G02B6/122 , G02B6/1225 , G02B2006/12097 , H01L21/3247 , H01L21/7624 , H01L21/76283 , H01L21/76289 , H01L21/764 , H01L21/84 , H01L27/10894 , H01L27/10897 , H01L27/12 , H01L27/1203 , H01L29/0657 , H01L29/7842 , H01L29/78603 , H01L29/78639
摘要： To change a plurality of trenches to one flat empty space by two-dimensionally forming the trenches on the surface of a semiconductor substrate and then applying heat treatment to the semiconductor substrate.
摘要翻译：通过在半导体衬底的表面上二维地形成沟槽，然后对半导体衬底进行热处理，将多个沟槽改变为一个平坦的空间。

8. 发明授权

US07235456B2 Method of making empty space in silicon 有权
标题翻译：在硅中制造空白空间的方法
公开(公告)号：US07235456B2
公开(公告)日：2007-06-26
申请号：US11340594
申请日：2006-01-27
申请人： Tsutomu Sato , Mie Matsuo , Ichiro Mizushima , Yoshitaka Tsunashima , Shinichi Takagi
发明人： Tsutomu Sato , Mie Matsuo , Ichiro Mizushima , Yoshitaka Tsunashima , Shinichi Takagi
IPC分类号： H01L21/764 , H01L27/12
CPC分类号： H01L27/10805 , B82Y20/00 , G02B6/122 , G02B6/1225 , G02B2006/12097 , H01L21/3247 , H01L21/7624 , H01L21/76283 , H01L21/76289 , H01L21/764 , H01L21/84 , H01L27/10894 , H01L27/10897 , H01L27/12 , H01L27/1203 , H01L29/0657 , H01L29/7842 , H01L29/78603 , H01L29/78639
摘要： To change a plurality of trenches to one flat empty space by two-dimensionally forming the trenches on the surface of a semiconductor substrate and then applying heat treatment to the semiconductor substrate.
摘要翻译：通过在半导体衬底的表面上二维地形成沟槽，然后对半导体衬底进行热处理，将多个沟槽改变为一个平坦的空间。

9. 发明授权

US07095112B2 Semiconductor device, semiconductor package member, and semiconductor device manufacturing method 失效
标题翻译：半导体器件，半导体封装构件和半导体器件制造方法
公开(公告)号：US07095112B2
公开(公告)日：2006-08-22
申请号：US10664150
申请日：2003-09-17
申请人： Mitsuyoshi Endo , Mie Matsuo , Chiaki Takubo
发明人： Mitsuyoshi Endo , Mie Matsuo , Chiaki Takubo
IPC分类号： H01L23/48 , H05K7/02 , H01L27/02
CPC分类号： H01L23/66 , H01L23/50 , H01L24/45 , H01L24/48 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/16238 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/83102 , H01L2224/92125 , H01L2924/00014 , H01L2924/01079 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19011 , H01L2924/19041 , H01L2924/19105 , H01L2924/30107 , H01L2924/3011 , H01L2924/3025 , H01L2924/00 , H01L2924/00012 , H01L2224/05644 , H01L2224/45015 , H01L2924/207
摘要： Provided a semiconductor device including: a wiring board; a semiconductor chip having a pad electrically connected to a wiring on the wiring board; a second semiconductor chip provided on the wiring board at a position facing a side of the semiconductor chip, having passive elements integrated therein, and having pads for external connection to which both ends of the passive elements are connected respectively and at least one of which is electrically connected to the wiring on the wiring board electrically connected to the pad of the semiconductor chip.
摘要翻译：提供一种半导体器件，包括：布线板; 半导体芯片，其具有电连接到所述布线板上的布线的焊盘; 第二半导体芯片，其设置在面对半导体芯片的一侧的位置处的布线板上，其中集成有无源元件，并且具有用于外部连接的焊盘，无源元件的两端分别连接到该衬垫，并且其中至少一个是电连接到电连接到半导体芯片的焊盘的布线板上的布线。

10. 发明申请

US20060102290A1 Wafer support plate, holding method of thin wafer, and manufacturing method of semiconductor device 审中-公开
标题翻译：晶片支撑板，薄晶片保持方法及半导体器件的制造方法
公开(公告)号：US20060102290A1
公开(公告)日：2006-05-18
申请号：US11221763
申请日：2005-09-09
申请人： Susumu Harada , Chiaki Takubo , Kenji Takahashi , Hideo Aoki , Hideo Numata , Hisashi Kaneko , Hirokazu Ezawa , Mie Matsuo , Hiroshi Ikenoue , Ichiro Omura
发明人： Susumu Harada , Chiaki Takubo , Kenji Takahashi , Hideo Aoki , Hideo Numata , Hisashi Kaneko , Hirokazu Ezawa , Mie Matsuo , Hiroshi Ikenoue , Ichiro Omura
IPC分类号： B32B37/00
CPC分类号： H01L21/6835 , H01L21/76898
摘要： A wafer supporting plate is formed of a glass or a resin which can permeate ultraviolet rays and has a nearly disk shape. An outer diameter of the wafer supporting plate is larger than that of the semiconductor wafer which is supported. In the wafer supporting plate, a plurality of openings are formed to correspond to plural through holes of the semiconductor wafer. The opening has an open area larger than an open area of the through hole, that is, has a larger diameter.
摘要翻译：晶片支撑板由可以渗透紫外线并具有近似圆盘形状的玻璃或树脂形成。晶片支撑板的外径大于被支撑的半导体晶片的外径。在晶片支撑板中，形成多个开口以对应于半导体晶片的多个通孔。开口具有比通孔的开口面积大的开口面积，即具有较大的直径。

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