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1. 发明授权

US07507634B2 Method for fabricating a localize SOI in bulk silicon substrate including changing first trenches formed in the substrate into unclosed empty space by applying heat treatment 有权
标题翻译：用于制造体硅衬底中的定位SOI的方法，包括通过施加热处理将衬底中形成的第一沟槽改变为未封闭的空间
公开(公告)号：US07507634B2
公开(公告)日：2009-03-24
申请号：US11812490
申请日：2007-06-19
申请人： Tsutomu Sato , Mie Matsuo , Ichiro Mizushima , Yoshitaka Tsunashima , Shinichi Takagi
发明人： Tsutomu Sato , Mie Matsuo , Ichiro Mizushima , Yoshitaka Tsunashima , Shinichi Takagi
IPC分类号： H01L21/764 , H01L27/12
CPC分类号： H01L27/10805 , B82Y20/00 , G02B6/122 , G02B6/1225 , G02B2006/12097 , H01L21/3247 , H01L21/7624 , H01L21/76283 , H01L21/76289 , H01L21/764 , H01L21/84 , H01L27/10894 , H01L27/10897 , H01L27/12 , H01L27/1203 , H01L29/0657 , H01L29/7842 , H01L29/78603 , H01L29/78639
摘要： To change a plurality of trenches to one flat empty space by two-dimensionally forming the trenches on the surface of a semiconductor substrate and then applying heat treatment to the semiconductor substrate.
摘要翻译：通过在半导体衬底的表面上二维地形成沟槽，然后对半导体衬底进行热处理，将多个沟槽改变为一个平坦的空间。

2. 发明授权

US07235456B2 Method of making empty space in silicon 有权
标题翻译：在硅中制造空白空间的方法
公开(公告)号：US07235456B2
公开(公告)日：2007-06-26
申请号：US11340594
申请日：2006-01-27
申请人： Tsutomu Sato , Mie Matsuo , Ichiro Mizushima , Yoshitaka Tsunashima , Shinichi Takagi
发明人： Tsutomu Sato , Mie Matsuo , Ichiro Mizushima , Yoshitaka Tsunashima , Shinichi Takagi
IPC分类号： H01L21/764 , H01L27/12
CPC分类号： H01L27/10805 , B82Y20/00 , G02B6/122 , G02B6/1225 , G02B2006/12097 , H01L21/3247 , H01L21/7624 , H01L21/76283 , H01L21/76289 , H01L21/764 , H01L21/84 , H01L27/10894 , H01L27/10897 , H01L27/12 , H01L27/1203 , H01L29/0657 , H01L29/7842 , H01L29/78603 , H01L29/78639
摘要： To change a plurality of trenches to one flat empty space by two-dimensionally forming the trenches on the surface of a semiconductor substrate and then applying heat treatment to the semiconductor substrate.
摘要翻译：通过在半导体衬底的表面上二维地形成沟槽，然后对半导体衬底进行热处理，将多个沟槽改变为一个平坦的空间。

3. 发明授权

US07019364B1 Semiconductor substrate having pillars within a closed empty space 有权
标题翻译：半导体衬底在封闭空间内具有支柱
公开(公告)号：US07019364B1
公开(公告)日：2006-03-28
申请号：US09650748
申请日：2000-08-30
申请人： Tsutomu Sato , Mie Matsuo , Ichiro Mizushima , Yoshitaka Tsunashima , Shinichi Takagi
发明人： Tsutomu Sato , Mie Matsuo , Ichiro Mizushima , Yoshitaka Tsunashima , Shinichi Takagi
IPC分类号： H01L27/12
CPC分类号： H01L27/10805 , B82Y20/00 , G02B6/122 , G02B6/1225 , G02B2006/12097 , H01L21/3247 , H01L21/7624 , H01L21/76283 , H01L21/76289 , H01L21/764 , H01L21/84 , H01L27/10894 , H01L27/10897 , H01L27/12 , H01L27/1203 , H01L29/0657 , H01L29/7842 , H01L29/78603 , H01L29/78639
摘要： To change a plurality of trenches to one flat empty space by two-dimensionally forming the trenches on the surface of a semiconductor substrate and then applying heat treatment to the semiconductor substrate.
摘要翻译：通过在半导体衬底的表面上二维地形成沟槽，然后对半导体衬底进行热处理，将多个沟槽改变为一个平坦的空间。

4. 发明申请

US20080003771A1 Semiconductor substrate and its fabrication method 有权
标题翻译：半导体衬底及其制造方法
公开(公告)号：US20080003771A1
公开(公告)日：2008-01-03
申请号：US11812490
申请日：2007-06-19
申请人： Tsutomu Sato , Mie Matsuo , Ichiro Mizushima , Yoshitaka Tsunashima , Shinichi Takagi
发明人： Tsutomu Sato , Mie Matsuo , Ichiro Mizushima , Yoshitaka Tsunashima , Shinichi Takagi
IPC分类号： H01L21/764
CPC分类号： H01L27/10805 , B82Y20/00 , G02B6/122 , G02B6/1225 , G02B2006/12097 , H01L21/3247 , H01L21/7624 , H01L21/76283 , H01L21/76289 , H01L21/764 , H01L21/84 , H01L27/10894 , H01L27/10897 , H01L27/12 , H01L27/1203 , H01L29/0657 , H01L29/7842 , H01L29/78603 , H01L29/78639
摘要： To change a plurality of trenches to one flat empty space by two-dimensionally forming the trenches on the surface of a semiconductor substrate and then applying heat treatment to the semiconductor substrate.
摘要翻译：通过在半导体衬底的表面上二维地形成沟槽，然后对半导体衬底进行热处理，将多个沟槽改变为一个平坦的空间。

5. 发明申请

US20060131651A1 Semiconductor substrate and its fabrication method 有权
标题翻译：半导体衬底及其制造方法
公开(公告)号：US20060131651A1
公开(公告)日：2006-06-22
申请号：US11340594
申请日：2006-01-27
申请人： Tsutomu Sato , Mie Matsuo , Ichiro Mizushima , Yoshitaka Tsunashima , Shinichi Takagi
发明人： Tsutomu Sato , Mie Matsuo , Ichiro Mizushima , Yoshitaka Tsunashima , Shinichi Takagi
IPC分类号： H01L27/12
CPC分类号： H01L27/10805 , B82Y20/00 , G02B6/122 , G02B6/1225 , G02B2006/12097 , H01L21/3247 , H01L21/7624 , H01L21/76283 , H01L21/76289 , H01L21/764 , H01L21/84 , H01L27/10894 , H01L27/10897 , H01L27/12 , H01L27/1203 , H01L29/0657 , H01L29/7842 , H01L29/78603 , H01L29/78639
摘要： To change a plurality of trenches to one flat empty space by two-dimensionally forming the trenches on the surface of a semiconductor substrate and then applying heat treatment to the semiconductor substrate.
摘要翻译：通过在半导体衬底的表面上二维地形成沟槽，然后对半导体衬底进行热处理，将多个沟槽改变为一个平坦的空间。

6. 发明授权

US06893928B2 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06893928B2
公开(公告)日：2005-05-17
申请号：US10390046
申请日：2003-03-18
申请人： Tsutomu Sato , Ichiro Mizushima , Yoshitaka Tsunashima , Toshihiko Iinuma , Kiyotaka Miyano
发明人： Tsutomu Sato , Ichiro Mizushima , Yoshitaka Tsunashima , Toshihiko Iinuma , Kiyotaka Miyano
IPC分类号： H01L29/78 , H01L21/324 , H01L21/336 , H01L21/762 , H01L29/06 , H01L29/786
CPC分类号： H01L29/66583 , H01L21/324 , H01L21/76229 , H01L21/76232 , H01L29/0649 , H01L29/0653 , H01L29/0657 , H01L29/42356 , H01L29/66651 , H01L29/78 , H01L29/7831 , H01L29/78639
摘要： To provide a cavity in the portion of the silicon substrate which lies beneath the channel region of the MOS transistor.
摘要翻译：在硅衬底的位于MOS晶体管的沟道区之下的部分提供空腔。

7. 发明授权

US06552380B1 Semiconductor device and manufacturing method thereof 失效
公开(公告)号：US06552380B1
公开(公告)日：2003-04-22
申请号：US09531537
申请日：2000-03-20
申请人： Tsutomu Sato , Ichiro Mizushima , Yoshitaka Tsunashima
发明人： Tsutomu Sato , Ichiro Mizushima , Yoshitaka Tsunashima
IPC分类号： H01L31119
CPC分类号： H01L21/30604 , H01L27/10861 , H01L28/60 , H01L29/66181
摘要： A deep trench is formed in a silicon substrate. The inner surface of the trench is next coated with a thin polycrystalline silicon film (liner film) so as not to close the trench. A silicon germanium film (node electrode) is then formed on the thin polycrystalline silicon film so as not to close the trench. Next, a heat treatment is performed on the silicon germanium film thereby to flow only the silicon germanium so that the trench is filled.

8. 发明授权

US6100132A Method of deforming a trench by a thermal treatment 失效
标题翻译：通过热处理使沟槽变形的方法
公开(公告)号：US6100132A
公开(公告)日：2000-08-08
申请号：US106082
申请日：1998-06-29
申请人： Tsutomu Sato , Ichiro Mizushima , Yoshitaka Tsunashima , Junichiro Iba
发明人： Tsutomu Sato , Ichiro Mizushima , Yoshitaka Tsunashima , Junichiro Iba
IPC分类号： H01L21/02 , H01L21/8242
CPC分类号： H01L27/1087 , H01L28/84 , Y10S438/909
摘要： A semiconductor device includes a semiconductor substrate having a trench on a surface thereof and an embedding member embedding the interior of the trench therewith. While the section of the trench when cut by a first plane perpendicular to the direction of the depth of the trench is defined as a first section and the section of the trench when cut by a second plane perpendicular to the direction of the depth of the trench and closer to the bottom of the trench than the first plane is defined as a second section, the area of the first section is smaller than that of the second section and a minimum radius of curvature of the first section is smaller than a minimum radius of curvature of the second section. As a result, it is possible to lessen the concentration of the electric field into the bottom of the trench.
摘要翻译：半导体器件包括在其表面上具有沟槽的半导体衬底和嵌入沟槽内部的嵌入构件。虽然当垂直于沟槽深度方向的第一平面切割沟槽的部分被定义为第一部分，并且当垂直于沟槽深度方向的第二平面切割沟槽的部分时并且比所述第一平面更靠近所述沟槽的底部被限定为第二部分，所述第一部分的面积小于所述第二部分的面积，并且所述第一部分的最小曲率半径小于所述第一部分的最小半径第二部分的曲率。结果，可以减小进入沟槽底部的电场的浓度。

9. 发明授权

US06600189B1 Semiconductor device and semiconductor device manufacturing method 失效
标题翻译：半导体器件和半导体器件制造方法
公开(公告)号：US06600189B1
公开(公告)日：2003-07-29
申请号：US09598379
申请日：2000-06-21
申请人： Tsutomu Sato , Ichiro Mizushima , Yoshitaka Tsunashima , Junichiro Iba
发明人： Tsutomu Sato , Ichiro Mizushima , Yoshitaka Tsunashima , Junichiro Iba
IPC分类号： H01L27108
CPC分类号： H01L27/1087 , H01L28/84 , Y10S438/909
摘要： A semiconductor device includes a semiconductor substrate having a trench on a surface thereof and an embedding member embedding the interior of the trench therewith. While the section of the trench when cut by a first plane perpendicular to the direction of the depth of the trench is defined as a first section and the section of the trench when cut by a second plane perpendicular to the direction of the depth of the trench and closer to the bottom of the trench than the first plane is defined as a second section, the area of the first section is smaller than that of the second section and a minimum radius of curvature of the first section is smaller than a minimum radius of curvature of the second section. As a result, it is possible to lessen the concentration of the electric field into the bottom of the trench.
摘要翻译：半导体器件包括在其表面上具有沟槽的半导体衬底和嵌入沟槽内部的嵌入构件。虽然当垂直于沟槽深度方向的第一平面切割沟槽的部分被定义为第一部分，并且当垂直于沟槽深度方向的第二平面切割沟槽的部分时并且比所述第一平面更靠近所述沟槽的底部被限定为第二部分，所述第一部分的面积小于所述第二部分的面积，并且所述第一部分的最小曲率半径小于所述第一部分的最小半径第二部分的曲率。结果，可以减小进入沟槽底部的电场的浓度。

10. 发明授权

US06570217B1 Semiconductor device and method of manufacturing the same 失效
公开(公告)号：US06570217B1
公开(公告)日：2003-05-27
申请号：US09296669
申请日：1999-04-22
申请人： Tsutomu Sato , Ichiro Mizushima , Yoshitaka Tsunashima , Toshihiko Iinuma , Kiyotaka Miyano
发明人： Tsutomu Sato , Ichiro Mizushima , Yoshitaka Tsunashima , Toshihiko Iinuma , Kiyotaka Miyano
IPC分类号： H01L2926
CPC分类号： H01L29/66583 , H01L21/324 , H01L21/76229 , H01L21/76232 , H01L29/0649 , H01L29/0653 , H01L29/0657 , H01L29/42356 , H01L29/66651 , H01L29/78 , H01L29/7831 , H01L29/78639
摘要： To provide a cavity in the portion of the silicon substrate which lies beneath the channel region of the MOS transistor.

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