专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07528062B2 Integrated matching network and method for manufacturing integrated matching networks 有权
标题翻译：综合匹配网络和制造综合匹配网络的方法
公开(公告)号：US07528062B2
公开(公告)日：2009-05-05
申请号：US11586807
申请日：2006-10-25
申请人： Melvy F. Miller , Juergen A. Foerstner
发明人： Melvy F. Miller , Juergen A. Foerstner
IPC分类号： H01L21/44 , H01L23/52
CPC分类号： H01L23/66 , H01L25/0655 , H01L2223/6655 , H01L2224/16227 , H01L2224/16235 , H01L2224/32245 , H01L2224/73253 , H01L2924/0002 , H01L2924/15192 , H01L2924/19104 , H01L2924/3011 , H01L2924/00
摘要： An integrated matching network and method for manufacturing an integrated matching network are provided. The method includes forming (405) a first die on a substrate, forming (410) a second die on the substrate, and forming (415) a metallization layer on the first and second dies. The second die has a capacitance, the metallization layer has an inductance, and the capacitance and inductance together provide a shunt impedance from the first die to the substrate. The integrated matching network includes a first die having a PA (101), a second die having a capacitor (102), and a metal interconnect (108) coupled to the PA and the first capacitor. The metal interconnect (108) has an inductance. The capacitor (102) and metal interconnect (108) form a shunt impedance.
摘要翻译：提供了一种用于制造集成匹配网络的集成匹配网络和方法。该方法包括在衬底上形成（405）第一管芯，在衬底上形成（410）第二管芯，以及在第一和第二管芯上形成（415）金属化层。第二管芯具有电容，金属化层具有电感，并且电容和电感一起提供从第一管芯到衬底的分流阻抗。集成匹配网络包括具有PA（101）的第一管芯，具有电容器（102）的第二管芯和耦合到PA和第一电容器的金属互连（108）。金属互连（108）具有电感。电容器（102）和金属互连（108）形成分流阻抗。

2. 发明申请

US20080099800A1 Integrated matching network and method for manufacturing integrated matching networks 有权
标题翻译：综合匹配网络和制造综合匹配网络的方法
公开(公告)号：US20080099800A1
公开(公告)日：2008-05-01
申请号：US11586807
申请日：2006-10-25
申请人： Melvy F. Miller , Juergen A. Foerstner
发明人： Melvy F. Miller , Juergen A. Foerstner
IPC分类号： H01L29/80 , H01L23/48
CPC分类号： H01L23/66 , H01L25/0655 , H01L2223/6655 , H01L2224/16227 , H01L2224/16235 , H01L2224/32245 , H01L2224/73253 , H01L2924/0002 , H01L2924/15192 , H01L2924/19104 , H01L2924/3011 , H01L2924/00
摘要： An integrated matching network and method for manufacturing an integrated matching network are provided. The method includes forming (405) a first die on a substrate, forming (410) a second die on the substrate, and forming (415) a metallization layer on the first and second dies. The second die has a capacitance, the metallization layer has an inductance, and the capacitance and inductance together provide a shunt impedance from the first die to the substrate. The integrated matching network includes a first die having a PA (101), a second die having a capacitor (102), and a metal interconnect (108) coupled to the PA and the first capacitor. The metal interconnect (108) has an inductance. The capacitor (102) and metal interconnect (108) form a shunt impedance.
摘要翻译：提供了一种用于制造集成匹配网络的集成匹配网络和方法。该方法包括在衬底上形成（405）第一管芯，在衬底上形成（410）第二管芯，以及在第一和第二管芯上形成（415）金属化层。第二管芯具有电容，金属化层具有电感，并且电容和电感一起提供从第一管芯到衬底的分流阻抗。集成匹配网络包括具有PA（101）的第一管芯，具有电容器（102）的第二管芯和耦合到PA和第一电容器的金属互连（108）。金属互连（108）具有电感。电容器（102）和金属互连（108）形成分流阻抗。

3. 发明授权

US07667334B2 Integrated matching networks and RF devices that include an integrated matching network 有权
标题翻译：集成匹配网络和RF设备，包括集成匹配网络
公开(公告)号：US07667334B2
公开(公告)日：2010-02-23
申请号：US12390549
申请日：2009-02-23
申请人： Melvy F. Miller , Juergen A. Foerstner
发明人： Melvy F. Miller , Juergen A. Foerstner
IPC分类号： H01L29/40 , H01L21/44
CPC分类号： H01L23/66 , H01L25/0655 , H01L2223/6655 , H01L2224/16227 , H01L2224/16235 , H01L2224/32245 , H01L2224/73253 , H01L2924/0002 , H01L2924/15192 , H01L2924/19104 , H01L2924/3011 , H01L2924/00
摘要： An integrated matching network includes a first die on a substrate, a second die on the substrate, and a metallization layer on the first and second dies. The second die has a capacitance, the metallization layer has an inductance, and the capacitance and inductance together provide a shunt impedance from the first die to the substrate. The integrated matching network includes a first die having a power amplifier, a second die having a capacitor, and a metal interconnect coupled to the power amplifier and the first capacitor. The metal interconnect has an inductance. The capacitor and metal interconnect form a shunt impedance.
摘要翻译：集成匹配网络包括衬底上的第一裸片，衬底上的第二裸片，以及第一和第二裸片上的金属化层。第二管芯具有电容，金属化层具有电感，并且电容和电感一起提供从第一管芯到衬底的分流阻抗。集成匹配网络包括具有功率放大器的第一管芯，具有电容器的第二管芯和耦合到功率放大器和第一电容器的金属互连。金属互连具有电感。电容器和金属互连形成分流阻抗。

4. 发明申请

US20090152698A1 INTEGRATED MATCHING NETWORKS AND RF DEVICES THAT INCLUDE AN INTEGRATED MATCHING NETWORK 有权
标题翻译：集成匹配网络和包含一体化匹配网络的射频设备
公开(公告)号：US20090152698A1
公开(公告)日：2009-06-18
申请号：US12390549
申请日：2009-02-23
申请人： Melvy F. Miller , Juergen A. Foerstner
发明人： Melvy F. Miller , Juergen A. Foerstner
IPC分类号： H01L23/00
CPC分类号： H01L23/66 , H01L25/0655 , H01L2223/6655 , H01L2224/16227 , H01L2224/16235 , H01L2224/32245 , H01L2224/73253 , H01L2924/0002 , H01L2924/15192 , H01L2924/19104 , H01L2924/3011 , H01L2924/00
摘要： An integrated matching network includes a first die on a substrate, a second die on the substrate, and a metallization layer on the first and second dies. The second die has a capacitance, the metallization layer has an inductance, and the capacitance and inductance together provide a shunt impedance from the first die to the substrate. The integrated matching network includes a first die having a power amplifier, a second die having a capacitor, and a metal interconnect coupled to the power amplifier and the first capacitor. The metal interconnect has an inductance. The capacitor and metal interconnect form a shunt impedance.
摘要翻译：集成匹配网络包括衬底上的第一裸片，衬底上的第二裸片，以及第一和第二裸片上的金属化层。第二管芯具有电容，金属化层具有电感，并且电容和电感一起提供从第一管芯到衬底的分流阻抗。集成匹配网络包括具有功率放大器的第一管芯，具有电容器的第二管芯和耦合到功率放大器和第一电容器的金属互连。金属互连具有电感。电容器和金属互连形成分流阻抗。

5. 发明申请

US20100214716A1 MEMS CAPACITIVE DEVICE AND METHOD OF FORMING SAME 有权
标题翻译： MEMS电容器及其形成方法
公开(公告)号：US20100214716A1
公开(公告)日：2010-08-26
申请号：US12391083
申请日：2009-02-23
申请人： Lianjun Liu , Melvy F. Miller
发明人： Lianjun Liu , Melvy F. Miller
IPC分类号： H01G5/16 , H01L21/20 , H01L21/02
CPC分类号： H01G5/011 , B81B3/0072 , B81B2201/0221 , H01G5/18 , H01L28/40 , H01L41/0973 , Y10T29/435
摘要： A MEMS capacitive device (90) includes a fixed capacitor plate (104) formed on a surface (102) of a substrate (100). A movable capacitor plate (114) is suspended above the fixed capacitor plate (104) by compliant members (116) anchored to the surface (102). A movable element (120) is positioned in spaced apart relationship from the movable capacitor plate (104) and has an actuator (130) formed thereon. Actuation of the actuator (130) causes abutment of a portion of the movable element (120) against a contact surface (136) of the movable plate (114). The abutment moves the movable plate (114) toward the fixed plate (104) to alter a capacitance (112) between the plates (104, 114). Another substrate (118) may be coupled to the substrate (100) such that a surface (126) of the substrate (118) faces the surface (102) of the substrate (100). The movable element (120) may be formed on the surface (126).
摘要翻译： MEMS电容器件（90）包括形成在衬底（100）的表面（102）上的固定电容器板（104）。可移动电容器板（114）通过锚固到表面（102）的柔性构件（116）悬置在固定电容器板（104）的上方。可移动元件（120）与可移动电容器板（104）间隔开并且具有形成在其上的致动器（130）。致动器（130）的致动导致可移动元件（120）的一部分抵靠可动板（114）的接触表面（136）。抵靠将可移动板（114）移向固定板（104）以改变板（104,114）之间的电容（112）。衬底（118）可以耦合到衬底（100），使得衬底（118）的表面（126）面向衬底（100）的表面（102）。可移动元件（120）可以形成在表面（126）上。

6. 发明授权

US07306986B2 Method of making a semiconductor device, and semiconductor device made thereby 有权
标题翻译：制造半导体器件的方法和由此制成的半导体器件
公开(公告)号：US07306986B2
公开(公告)日：2007-12-11
申请号：US11150499
申请日：2005-06-09
申请人： Thomas P. Remmel , Sriram Kalpat , Melvy F. Miller , Peter Zurcher
发明人： Thomas P. Remmel , Sriram Kalpat , Melvy F. Miller , Peter Zurcher
IPC分类号： H01L21/8242
CPC分类号： H01L27/0682 , H01L23/5223 , H01L23/5228 , H01L28/20 , H01L28/40 , H01L2924/0002 , H01L2924/00
摘要： A method of making a semiconductor device includes the steps of: providing a semiconductor substrate (110, 510, 1010, 1610) having a patterned interconnect layer (120, 520, 1020, 1620) formed thereon; depositing a first dielectric material (130, 530, 1030, 1630) over the interconnect layer; depositing a first electrode material (140, 540, 1040, 1640) over the first dielectric material; depositing a second dielectric material (150, 550, 1050, 1650) over the first electrode material; depositing a second electrode material (160, 560, 1060, 1660) over the second dielectric material; patterning the second electrode material to form a top electrode (211, 611, 1111, 1611) of a first capacitor (210, 710, 1310, 1615); and patterning the first electrode material to form atop electrode (221, 721, 1221, 1621) of a second capacitor (220, 720, 1320, 1625), to form an electrode (212, 712, 1212, 1612) of the first capacitor, and to define a resistor (230, 730, 1330).
摘要翻译：制造半导体器件的方法包括以下步骤：提供具有形成在其上的图案化互连层（120,520,1020,1620）的半导体衬底（110,510,1010,1610）在所述互连层上沉积第一介电材料（130,530,1030,1630）; 在所述第一电介质材料上沉积第一电极材料（140,540,1040,1640）; 在所述第一电极材料上沉积第二介电材料（150,550,1050,1650）; 在所述第二电介质材料上沉积第二电极材料（160,560,1060,1660）; 图案化第二电极材料以形成第一电容器（210,710,1310,1615）的顶部电极（211,611,1111,1611）; 以及图案化所述第一电极材料以形成第二电容器（220,720,1320,1625）的顶部电极（221,721,1221,1621），以形成所述第一电容器的电极（212,712,1212,1612）并且限定电阻器（230,730,1330）。

7. 发明授权

US06498550B1 Filtering device and method 失效
标题翻译：过滤装置和方法
公开(公告)号：US06498550B1
公开(公告)日：2002-12-24
申请号：US09561559
申请日：2000-04-28
申请人： Melvy F. Miller , Jeffrey A. Dykstra
发明人： Melvy F. Miller , Jeffrey A. Dykstra
IPC分类号： H01P1207
CPC分类号： H01P1/2088 , H01P5/107
摘要： A cavity filter (15) includes a dielectric block (25) disposed adjacent to a conductive layer (23) for producing a resonant frequency of the cavity filter. An electromagnetic signal (VA) propagates within the dielectric block for a predetermined distance to a surface (58) of the conductive layer, where the predetermined distance is one-fourth of a wavelength of the electromagnetic signal at the resonant frequency.
摘要翻译：空腔滤波器（15）包括邻近导电层（23）设置的用于产生空腔滤波器的谐振频率的介质块（25）。电磁信号（VA）在介电块内传播预定距离到导电层的表面（58），其中预定距离是谐振频率处电磁信号波长的四分之一。

8. 发明授权

US07663196B2 Integrated passive device and method of fabrication 有权
标题翻译：集成无源器件及其制造方法
公开(公告)号：US07663196B2
公开(公告)日：2010-02-16
申请号：US11673015
申请日：2007-02-09
申请人： Lianjun Liu , Melvy F. Miller
发明人： Lianjun Liu , Melvy F. Miller
IPC分类号： H01L27/14 , H01L29/82 , H01L29/84 , H01L29/00
CPC分类号： B81C1/00253 , H01L28/10 , H01L28/60
摘要： A device 20 includes substrates 22 and 24 coupled to form a volume 32 between the substrates. A surface 28 of the substrate 22 faces a surface 30 of the substrate 24. A metal-insulator-metal capacitor 34 is formed on one of the surfaces 28 and 30. A conductive element 58 spans between a top electrode 56 of the capacitor 34 and the other surface 28 and 30. Vias 64 and 66 extend through the substrate 22 and are electrically interconnected with the conductive element 58 and a bottom electrode 52 of the capacitor 34. Another device 72 includes an underpass transmission line 92 formed on a surface 80 of a substrate 74 within a volume 84 formed between the substrate 74 and another substrate 76. The line 92 underlies an integrated device 96 formed on a surface 78 of the substrate 74.
摘要翻译：装置20包括联接以在基板之间形成体积32的基板22和24。基板22的表面28面向基板24的表面30.金属 - 绝缘体 - 金属电容器34形成在一个表面28和30上。导电元件58跨越电容器34的顶部电极56和另一个表面28和30.通道64和66延伸穿过基板22，并与导电元件58和电容器34的底部电极52电互连。另一个装置72包括形成在表面80上的地下通道传输线92 形成在衬底74和另一衬底76之间的体积84内的衬底74.线92位于形成在衬底74的表面78上的集成器件96的下面。

9. 发明授权

US07567782B2 Re-configurable impedance matching and harmonic filter system 有权
标题翻译：可重配置阻抗匹配和谐波滤波系统
公开(公告)号：US07567782B2
公开(公告)日：2009-07-28
申请号：US11494821
申请日：2006-07-28
申请人： Lianjun Liu , Melvy F. Miller
发明人： Lianjun Liu , Melvy F. Miller
IPC分类号： H04B1/04
CPC分类号： H04B1/0458 , H04B1/0067
摘要： Methods and apparatus are provided to enable a transceiver (200) or transmitter including a single PA line-up (210) to transmit signals having frequencies in two or more different frequency bands, and/or having two or more different modulation types, and/or having two or more different RF power levels. The single PA line-up includes at least one variable matching circuit (216) and a variable harmonic filter (240) to tune match and tune filter communication signals prior to transmission. The variable matching circuit and the variable harmonic filter each include at least one variable capacitive element (2160 and 2400) that switches ON/OFF depending on whether a low frequency signal or a high frequency signal is being transmitted. Each variable capacitive element includes separate direct current and radio frequency terminals to enable the single PA line-up to change signal modulation and/or RF power levels in addition to frequencies.
摘要翻译：提供了方法和装置，以使包括单个PA阵列（210）的收发机（200）或发射机能够发送具有两个或多个不同频带中的频率和/或具有两个或多个不同调制类型的频率，和/ 或具有两个或更多个不同的RF功率电平。单个PA阵列包括至少一个可变匹配电路（216）和可变谐波滤波器（240），以在传输之前调谐匹配和调谐滤波器通信信号。可变匹配电路和可变谐波滤波器各自包括至少一个可变电容元件（2160和2400），其根据是否正在发送低频信号或高频信号来接通/断开。每个可变电容元件包括单独的直流电和射频终端，以使得单个PA阵列除频率之外还能改变信号调制和/或RF功率电平。

10. 发明授权

US07439606B2 Method for manufacturing a passive integrated matching network for power amplifiers 有权
标题翻译：制造功率放大器无源集成匹配网络的方法
公开(公告)号：US07439606B2
公开(公告)日：2008-10-21
申请号：US11830577
申请日：2007-07-30
申请人： Lianjun Liu , Qiang Li , Melvy F. Miller , Sergio P. Pacheco
发明人： Lianjun Liu , Qiang Li , Melvy F. Miller , Sergio P. Pacheco
IPC分类号： H01L29/00
CPC分类号： H01L25/16 , H01L23/642 , H01L23/645 , H01L23/66 , H01L24/48 , H01L24/49 , H01L25/18 , H01L28/10 , H01L28/40 , H01L2223/6655 , H01L2224/48091 , H01L2224/48137 , H01L2224/48195 , H01L2224/48472 , H01L2224/49175 , H01L2924/00014 , H01L2924/01013 , H01L2924/01014 , H01L2924/01023 , H01L2924/01029 , H01L2924/01031 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/10329 , H01L2924/15787 , H01L2924/19041 , H01L2924/19042 , H01L2924/19104 , H01L2924/19105 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111 , H03H7/38 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要： An impedance matching network is integrated on a first die and coupled to a second die, with the first and second dies mounted on a conductive back plate. The impedance matching network comprises a first inductor bridging between the first and second dies, a second inductor coupled to the first inductor and disposed on the first die, and a metal-insulator-metal (MIM) capacitor disposed on the first die. The MIM capacitor has a first metal layer coupled to the second inductor, and a second metal layer grounded to the conductive back plate. A method for manufacturing the integrated impedance matching network comprises the steps of forming an inductor on a die, forming a capacitor on the die, coupling the capacitor to the inductor, coupling the die bottom surface and the capacitor to a conductive plate, and coupling the inductor to another inductor that bridges between the die and another die.
摘要翻译：阻抗匹配网络集成在第一裸片上并耦合到第二裸片，第一和第二裸片安装在导电背板上。阻抗匹配网络包括桥接在第一和第二管芯之间的第一电感器，耦合到第一电感器并且设置在第一管芯上的第二电感器和设置在第一管芯上的金属 - 绝缘体 - 金属（MIM）电容器。 MIM电容器具有耦合到第二电感器的第一金属层和接地到导电背板的第二金属层。一种用于制造集成阻抗匹配网络的方法包括以下步骤：在管芯上形成电感器，在管芯上形成电容器，将电容器耦合到电感器，将管芯底表面和电容器耦合到导电板上，电感器到另一个电感器，其在管芯和另一个管芯之间桥接。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式