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1. 发明授权

US08924629B1 Mapping table for improving write operation efficiency 有权
标题翻译：映射表，提高写操作效率
公开(公告)号：US08924629B1
公开(公告)日：2014-12-30
申请号：US13155189
申请日：2011-06-07
申请人： Matthew Call , Robert L. Horn , Mei-Man L. Syu , Lan D. Phan , John A. Morrison , Ho-Fan Kang
发明人： Matthew Call , Robert L. Horn , Mei-Man L. Syu , Lan D. Phan , John A. Morrison , Ho-Fan Kang
IPC分类号： G06F13/00
CPC分类号： G06F12/0246 , G06F2212/1044 , G06F2212/7201 , G06F2212/7202 , G06F2212/7205
摘要： A non-volatile storage system is disclosed which provides a mapping table which includes a granularity which does not correspond to the page size of a non-volatile storage array. A reduced mapping table granularity enables more than one mapping entry to exist in a single page on the solid-state array. A write command which does not exceed a mapping table entry can invalidate only a portion of the written page, and can be combined with a second write command to write a new page of the solid-state array.
摘要翻译：公开了一种非易失性存储系统，其提供包括不对应于非易失性存储阵列的页面大小的粒度的映射表。缩小的映射表粒度使得多个映射条目存在于固态数组的单个页面中。不超过映射表项的写入命令可以使仅写入页面的一部分无效，并且可以与第二写入命令组合以写入固态阵列的新页面。

2. 发明授权

US08700951B1 System and method for improving a data redundancy scheme in a solid state subsystem with additional metadata 有权
标题翻译：用于通过附加元数据改进固态子系统中的数据冗余方案的系统和方法
公开(公告)号：US08700951B1
公开(公告)日：2014-04-15
申请号：US13044400
申请日：2011-03-09
申请人： Matthew Call , John A. Morrison , Lan D. Phan , Mei-Man L. Syu
发明人： Matthew Call , John A. Morrison , Lan D. Phan , Mei-Man L. Syu
IPC分类号： G06F11/08
CPC分类号： G06F11/108 , G06F11/0727 , G06F11/0751 , G06F11/1441 , G06F2211/104
摘要： In one embodiment of the invention, a flash-based/solid-state storage system with an implemented data redundancy scheme such as RAID is configured to hold parity data in a volatile memory such as RAM and write such parity data to the non-volatile flash media when a full stripe of data has been written to the media. Other embodiments in certain situations force an early write of the parity for a partial stripe that has not been fully written to the non-volatile media. Those situations may include a data access error on data in a partial stripe and a detected power loss event with a partial stripe present. Embodiments are directed to writing additional data with the parity data for the partial stripe and then later using the additional data in data recovery. This approach allows the controller to easily detect the presence of a partial stripe and handle such a stripe accordingly.
摘要翻译：在本发明的一个实施例中，具有诸如RAID的实现的数据冗余方案的基于闪存的/固态存储系统被配置为将奇偶校验数据保存在诸如RAM的易失性存储器中，并将这种奇偶校验数据写入非易失性闪存当已将完整的数据条带写入媒体时，媒体。在某些情况下的其他实施例迫使尚未完全写入非易失性介质的部分条纹的奇偶校验的早期写入。这些情况可能包括部分条带中数据的数据访问错误和带有部分条带的检测到的功率损失事件。实施例涉及用部分条带的奇偶校验数据写入附加数据，然后再用数据恢复中的附加数据。这种方法允许控制器容易地检测部分条纹的存在并相应地处理这样的条带。

3. 发明授权

US09207990B2 Method and system for migrating critical resources within computer systems 有权
标题翻译：在计算机系统中迁移关键资源的方法和系统
公开(公告)号：US09207990B2
公开(公告)日：2015-12-08
申请号：US11863842
申请日：2007-09-28
申请人： Chris M. Giles , Russ W. Herrell , John A. Morrison , John R. Planow , Joseph F. Orth , Gerald J. Kaufman, Jr. , Andrew R. Wheeler , Daniel Zilavy
发明人： Chris M. Giles , Russ W. Herrell , John A. Morrison , John R. Planow , Joseph F. Orth , Gerald J. Kaufman, Jr. , Andrew R. Wheeler , Daniel Zilavy
IPC分类号： G06F9/46 , G06F9/50 , G06F9/48 , G06F9/32 , G06F11/07
CPC分类号： G06F9/5077 , G06F9/327 , G06F9/4812 , G06F9/5061 , G06F11/0772
摘要： A method and system for migrating at least one critical resource during a migration of an operative portion of a computer system are disclosed. In at least some embodiments, the method includes (a) sending first information constituting a substantial copy of a first of the at least one critical resource via at least one intermediary between a source component and a destination component. The method further includes (b) transitioning a status of the destination component from being incapable of receiving requests to being capable of receiving requests, and (c) re-programming an abstraction block to include modified addresses so that at least one incoming request signal is forwarded to the destination component rather than to the source component.
摘要翻译：公开了一种用于在计算机系统的可操作部分的迁移期间迁移至少一个关键资源的方法和系统。在至少一些实施例中，该方法包括（a）经由源组件和目的地组件之间的至少一个中介发送构成至少一个关键资源中的第一个的基本副本的第一信息。该方法还包括（b）将目的地组件的状态从不能接收请求转变为能够接收请求，以及（c）重新编程抽象块以包括修改的地址，使得至少一个传入请求信号是转发到目标组件而不是源组件。

4. 发明授权

US08612973B2 Method and system for handling interrupts within computer system during hardware resource migration 有权
标题翻译：硬件资源迁移期间处理计算机系统中断的方法和系统
公开(公告)号：US08612973B2
公开(公告)日：2013-12-17
申请号：US11861846
申请日：2007-09-26
申请人： Chris M. Giles , Russ W. Herrell , John A. Morrison , John R. Planow , Joseph F. Orth , Andrew R. Wheeler
发明人： Chris M. Giles , Russ W. Herrell , John A. Morrison , John R. Planow , Joseph F. Orth , Andrew R. Wheeler
IPC分类号： G06F9/455
CPC分类号： G06F13/24
摘要： A method and system for handling interrupts within a computer system during hardware resource migration are disclosed. In at least some embodiments, the method includes (a) programming an address conversion component so that incoming interrupt signals are directed to a control component rather than to a source processing resource, and (b) accumulating the incoming interrupt signals at the control component. Additionally the method also includes, subsequent to the migration of the partition from the source processing resource to a destination processing resource, (c) sending the accumulated incoming interrupt signals to the destination processing resource, and (d) reprogramming the address conversion component so that further incoming interrupt signals are directed to the destination processing resource.
摘要翻译：公开了一种在硬件资源迁移期间处理计算机系统中的中断的方法和系统。在至少一些实施例中，该方法包括（a）编程地址转换组件，使得输入中断信号被引导到控制组件而不是源处理资源，以及（b）在控制组件处累积输入中断信号。此外，该方法还包括在分区从源处理资源迁移到目的地处理资源之后，（c）将累积的进入中断信号发送到目的地处理资源，以及（d）重新编程地址转换组件，使得进一步的输入中断信号被引导到目的地处理资源。

5. 发明授权

US08056084B2 Method and system for dynamically reallocating a resource among operating systems without rebooting of the computer system 有权
标题翻译：在不重新启动计算机系统的情况下，在操作系统之间动态重新分配资源的方法和系统
公开(公告)号：US08056084B2
公开(公告)日：2011-11-08
申请号：US11626957
申请日：2007-01-25
申请人： Nathan Jared Hughes , Stephen Patrick Hack , Michael S. Allison , John A. Morrison
发明人： Nathan Jared Hughes , Stephen Patrick Hack , Michael S. Allison , John A. Morrison
IPC分类号： G06F9/46
CPC分类号： G06F9/5055
摘要： A method of allocating a resource in a computer system having a plurality of operating systems, and related system, are disclosed. In at least one embodiment, the method includes providing an advanced configuration and power interface (ACPI) operating to facilitate interactions between at least one of the plurality of the operating systems and one or more of the resource, a hardware device, and firmware, and determining whether the resource is allocated to a first of the plurality of operating systems. The method further includes ejecting the resource from the first operating system, and allocating the resource to a second of the plurality of operating systems.
摘要翻译：公开了一种在具有多个操作系统和相关系统的计算机系统中分配资源的方法。在至少一个实施例中，该方法包括提供高级配置和功率接口（ACPI），其操作以促进多个操作系统中的至少一个与资源，硬件设备和固件中的一个或多个的交互，以及确定所述资源是否被分配给所述多个操作系统中的第一个。该方法还包括从第一操作系统弹出资源，并将资源分配给多个操作系统中的第二个。

6. 发明申请

US20100250877A1 Method and system for moving active virtual partitions between computers 有权
标题翻译：在计算机之间移动主动虚拟分区的方法和系统
公开(公告)号：US20100250877A1
公开(公告)日：2010-09-30
申请号：US12383766
申请日：2009-03-27
申请人： Blaine D. Gaither , John A. Morrison
发明人： Blaine D. Gaither , John A. Morrison
IPC分类号： G06F12/16 , G06F12/00 , G06F12/08 , G06F15/173 , G06F9/455
CPC分类号： G06F9/4856 , G06F9/45558 , G06F2009/4557
摘要： Embodiments of the present invention are directed to enhancing VPAR monitors to allow an active VPAR to be moved from one machine to another, as well as to enhancing virtual-machine monitors to move active VPARs from one machine to another. Because traditional VPAR monitors lack access to many computational resources and to executing-operating-system state, VPAR movement is carried out primarily by specialized routines executing within active VPARs, unlike the movement of guest operating systems between machines carried out by virtual-machine-monitor routines.
摘要翻译：本发明的实施例涉及增强VPAR监视器以允许主动VPAR从一个机器移动到另一个机器，以及增强虚拟机监视器以将活动VPAR从一个机器移动到另一个机器。由于传统的VPAR监视器无法访问许多计算资源和执行操作系统状态，VPAR运动主要是通过在主动VPAR内执行的专门程序进行的，这与虚拟机监视器执行的机器之间的客户操作系统的移动不同例程。

7. 发明授权

US07606995B2 Allocating resources to partitions in a partitionable computer 失效
标题翻译：将资源分配到可分区计算机中的分区
公开(公告)号：US07606995B2
公开(公告)日：2009-10-20
申请号：US10898590
申请日：2004-07-23
申请人： Russ Herrell , Gerald J. Kaufman, Jr. , John A. Morrison
发明人： Russ Herrell , Gerald J. Kaufman, Jr. , John A. Morrison
IPC分类号： G06F15/00
CPC分类号： G06F9/5077
摘要： Techniques are provided for allocating a plurality of resources on a chip to a plurality of partitions in a partitionable computer system. In one embodiment, a resource allocated to a first partition generates a physical address in an address space allocated to the first partition. A partition identification value identifies the first partition. The first partition identification value is stored in the first physical address to produce a partition-identifying address, which may be transmitted to a system fabric. In another embodiment, a transaction is received which includes a source terminus identifier identifying a source device which transmitted the transaction. It is determined, based on the source terminus identifier, whether the source device is allocated to the same partition as any of the plurality of resources. If the source device is so allocated, the transaction is transmitted to a resource that is allocated to the same partition as the source device.
摘要翻译：提供了用于在芯片上分配多个资源到可分区计算机系统中的多个分区的技术。在一个实施例中，分配给第一分区的资源在分配给第一分区的地址空间中生成物理地址。分区标识值标识第一个分区。第一分区识别值被存储在第一物理地址中以产生可以被发送到系统结构的分区识别地址。在另一个实施例中，接收到交易，其包括标识发送交易的源设备的源终端标识符。基于源终端标识符确定源设备是否被分配给与多个资源中的任一个相同的分区。如果源设备如此分配，则将事务发送到分配给与源设备相同的分区的资源。

8. 发明授权

US07568090B2 Speedy boot for computer systems 有权
标题翻译：快速启动计算机系统
公开(公告)号：US07568090B2
公开(公告)日：2009-07-28
申请号：US11159757
申请日：2005-06-23
申请人： John A. Morrison , Michael S. Allison , Stephen P. Hack
发明人： John A. Morrison , Michael S. Allison , Stephen P. Hack
IPC分类号： G06F15/177 , G06F9/24
CPC分类号： G06F9/4401
摘要： Implementations of speedy boot for computer systems are disclosed. In an exemplary embodiment, a method of speedy boot for a computer system may include invoking a platform management interrupt (PMI) to soft reset a processor without resetting hardware for the processor. The method may also include bypassing at least some initialization procedures and tests to speed recovery of the computer system to a usable state. The method may also include resetting operating system interfaces and loading the operating system.
摘要翻译：公开了用于计算机系统的快速启动的实现。在示例性实施例中，用于计算机系统的快速启动的方法可以包括调用平台管理中断（PMI）来软件复位处理器，而不会为处理器重置硬件。该方法还可以包括绕过至少一些初始化过程和测试以将计算机系统的恢复加速到可用状态。该方法还可以包括重置操作系统接口和加载操作系统。

9. 发明授权

US07200845B2 System and method for high availability firmware load 失效
标题翻译：用于高可用性固件加载的系统和方法
公开(公告)号：US07200845B2
公开(公告)日：2007-04-03
申请号：US09998629
申请日：2001-12-03
申请人： John A. Morrison , Michael S. Allison , Stephen J. Silva
发明人： John A. Morrison , Michael S. Allison , Stephen J. Silva
IPC分类号： G06F9/44 , G06F13/10 , G06F11/00 , G06F15/177
CPC分类号： G06F8/65 , G06F9/4401
摘要： A system and method updating firmware of cells in cellular, high availability, computing systems. One or more cells having missing, obsolete, corrupt, or otherwise errored firmware when compared to other cells in the partition are identified as mismatched cells. An update cell having desired firmware transmits an update message to each mismatched cell via a manageability system slow speed interconnect. In response to the update message, each mismatched cell enables a high speed interconnect over which they can receive the desired firmware. The update cell transmits the update firmware to each mismatched cell via the high speed interconnect.
摘要翻译：一种更新蜂窝，高可用性，计算系统中的小区固件的系统和方法。与分区中的其他单元相比，一个或多个具有丢失，过时，损坏或其他错误的固件的单元被识别为不匹配的单元。具有所需固件的更新单元经由可管理系统的低速互连向每个不匹配的小区发送更新消息。响应于更新消息，每个不匹配的单元使得能够接收所需固件的高速互连。更新单元通过高速互连将更新固件发送到每个不匹配的单元。

10. 发明授权

US06625679B1 Apparatus and method for converting interrupt transactions to interrupt signals to distribute interrupts to IA-32 processors 失效
标题翻译：将中断事务转换为中断信号以将中断分配给IA-32处理器的装置和方法
公开(公告)号：US06625679B1
公开(公告)日：2003-09-23
申请号：US09294927
申请日：1999-04-19
申请人： John A. Morrison , Michael S. Allison , Leo J. Embry
发明人： John A. Morrison , Michael S. Allison , Leo J. Embry
IPC分类号： G06F1324
CPC分类号： G06F13/4022
摘要： An apparatus and method for distributing interrupts to Intel® Architecture (IA)-32 processors includes a system bus having a number of nodes. Each node includes a bridge that couples the system bus to a processor bus. The processor bus may include multiple IA-32 processors. The system bus may include any number of nodes. Interrupt transactions appearing on the system bus are converted by the bridge to interrupt signals. The bridge asserts the interrupt signals at one of two pins on a target IA-32 processor. One pin may be programmed to receive non-maskable interrupts and the other pin may be programmed to receive external interrupts. The bridge incorporates a priority and threshold mechanism. The bridge includes a buffer to store pending interrupt signals. The apparatus and method may be used in a mixed IA-32 and IA-64 computer architecture that uses IA-64 components to receive interrupts and uses the bridge to convert the transactions on an IA-64 bus into interrupt signal assertions to an IA-32 processor.
摘要翻译：用于向Intel（R）架构（IA）-32处理器分配中断的装置和方法包括具有多个节点的系统总线。每个节点包括将系统总线耦合到处理器总线的桥。处理器总线可以包括多个IA-32处理器。系统总线可以包括任何数量的节点。系统总线上出现的中断事务由桥转换为中断信号。桥接器将目标IA-32处理器的两个引脚之一置为中断信号。一个引脚可能被编程为接收不可屏蔽的中断，另一个引脚可能被编程为接收外部中断。桥梁结合了优先级和阈值机制。该桥包括一个用于存储未决中断信号的缓冲器。该装置和方法可以在使用IA-64组件接收中断的混合IA-32和IA-64计算机体系结构中使用，并使用该桥将IA-64总线上的事务转换为IA- 32处理器。

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