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    • 3. 发明申请
    • SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SAME, AND DISPLAY DEVICE
    • 半导体器件,其制造方法和显示器件
    • US20130026574A1
    • 2013-01-31
    • US13639122
    • 2011-01-25
    • Kenji NakanishiMasao MoriguchiAtsuyuki Hoshino
    • Kenji NakanishiMasao MoriguchiAtsuyuki Hoshino
    • H01L29/78H01L21/28
    • H01L29/78618G02F1/1362H01L29/66765H01L29/78669H01L29/78678
    • In an inverted staggered type TFT (100), contact layers (150a and 150b) that electrically connect a channel layer (140) to source and drain electrodes (160a and 160b), respectively, include n+ amorphous silicon layers (151a and 151b), n+ microcrystalline silicon layers (152a and 152b), and n+ microcrystalline silicon layers (153a and 153b). The n+ microcrystalline silicon layers (152a and 152b) have a lower crystallization rate than the n+ microcrystalline silicon layers (153a and 153b) and are formed between the n+ amorphous silicon layers (151a and 151b) and the n+ microcrystalline silicon layers (153a and 153b). In this case, since the film thickness of incubation layers formed on surfaces of the n+ amorphous silicon layers (151a and 151b) decreases, the resistance value of the contact layers (150a and 150b) decreases. By this, the contact resistance of the TFT (100) decreases and the mobility can be increased.
    • 在倒置交错型TFT(100)中,分别将沟道层(140)与源极和漏极电极(160a和160b)电连接的接触层(150a和150b)包括n +非晶硅层(151a和151b) n +微晶硅层(152a和152b)和n +微晶硅层(153a和153b)。 n +微晶硅层(152a和152b)具有比n +微晶硅层(153a和153b)更低的结晶速率,并且形成在n +非晶硅层(151a和151b)与n +微晶硅层(153a和153b)之间 )。 在这种情况下,由于形成在n +非晶硅层(151a,151b)的表面上的温育层的膜厚减小,所以接触层(150a,150b)的电阻值降低。 由此,TFT(100)的接触电阻降低,并且可以提高迁移率。