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1. 发明授权

US5208831A Network interface system 失效
标题翻译：网络接口系统
公开(公告)号：US5208831A
公开(公告)日：1993-05-04
申请号：US829534
申请日：1992-02-03
申请人： Masaji Ueno , Akihito Nishikawa , Shinichi Iida , Hajime Shiraishi
发明人： Masaji Ueno , Akihito Nishikawa , Shinichi Iida , Hajime Shiraishi
IPC分类号： H04L12/433
CPC分类号： H04L12/433
摘要： It is an object of this invention to provide a novel network interface system which is able to connect automatically to the respective network stations having different data transfer speeds, in order to avoid the above problems. According to this invention, there is provided a detector and a selector in the communication interface to automatically select the appropriate data transfer speed. In the above structure, the speed of communication data transferred by a network is one of two detected by the detector which is able to detect a transfer speed and provide outputs at a first level signal when the transfer speed is at one level and outputs a second level signal when it is at a second level. The selecting means selects the frequency to connect a network station in response to the signal output from the detector. As a result, users need not select the module by themselves, the system automatically select the module.
摘要翻译：本发明的目的是提供一种能够自动连接到具有不同数据传输速度的各个网络站的新型网络接口系统，以避免上述问题。根据本发明，在通信接口中提供了一个检测器和选择器，用于自动选择适当的数据传输速度。在上述结构中，由网络传送的通信数据的速度是检测器检测到的两种速度之一，当传输速度处于一个级别时，能够检测传送速度并提供第一级信号的输出，并输出第二级当它处于第二级时的电平信号。选择装置响应于从检测器输出的信号选择连接网络站的频率。因此，用户不需要自己选择模块，系统自动选择模块。

2. 发明授权

US08390803B2 Calibration device and optical characteristic measuring system using the same 有权
标题翻译：校准装置和使用其的光学特性测量系统
公开(公告)号：US08390803B2
公开(公告)日：2013-03-05
申请号：US12953056
申请日：2010-11-23
申请人： Shinichi Iida , Wataru Yamaguchi
发明人： Shinichi Iida , Wataru Yamaguchi
IPC分类号： G01J1/10 , G01J3/42
CPC分类号： G01J1/12 , G01J1/04 , G01J3/02 , G01J3/0254 , G01J3/0272
摘要： A calibration device 21 according to the present invention is a member used for white calibration of an optical characteristic measuring apparatus 1 for measuring an optical characteristic of a specimen arranged to close a measuring opening and is used together with a spacer 24. Accordingly, such a calibration device 21 can perform more accurate white calibration by preventing formation of an interference pattern by the spacer 24.
摘要翻译：根据本发明的校准装置21是用于测量布置成关闭测量开口的试样的光学特性的光学特性测量装置1的白色校准的部件，并与间隔件24一起使用。因此，校准装置21可以通过防止间隔物24形成干涉图案来执行更准确的白色校准。

3. 发明申请

US20080276213A1 Method of shield line placement for semiconductor integrated circuit, design apparatus for semiconductor integrated circuit, and design program for semiconductor integrated circuit 有权
标题翻译：半导体集成电路屏蔽线放置方法，半导体集成电路设计装置及半导体集成电路设计程序
公开(公告)号：US20080276213A1
公开(公告)日：2008-11-06
申请号：US12216377
申请日：2008-07-02
申请人： Katsushi Aoki , Takahiro Toda , Junya Yamasaki , Shinichi Iida , Hiroki Murakami
发明人： Katsushi Aoki , Takahiro Toda , Junya Yamasaki , Shinichi Iida , Hiroki Murakami
IPC分类号： G06F17/50
CPC分类号： G06F17/5077 , H01L23/5225 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor integrated circuit design apparatus includes: an association information creating unit which creates association information for associating wiring information of a signal line with wiring information of a shield line placed for the signal line; an association information storage unit which stores the thus created association information; and a shield wiring unit which, when the placement of the signal line is changed, changes in interlinking fashion with the changed placement the placement of the shield line that is associated with the signal line by the association information.
摘要翻译：一种半导体集成电路设计装置，包括：关联信息创建单元，其创建用于将信号线的布线信息与放置在信号线上的屏蔽线的布线信息相关联的关联信息; 存储由此创建的关联信息的关联信息存储单元; 以及屏蔽布线单元，当信号线的布置改变时，通过关联信息，与信号线相关联的屏蔽线的布置与改变的布置相互连接地改变。

4. 发明授权

US08166443B2 Method of shield line placement for semiconductor integrated circuit, design apparatus for semiconductor integrated circuit, and design program for semiconductor integrated circuit 有权
标题翻译：半导体集成电路屏蔽线放置方法，半导体集成电路设计装置及半导体集成电路设计程序
公开(公告)号：US08166443B2
公开(公告)日：2012-04-24
申请号：US12216377
申请日：2008-07-02
申请人： Katsushi Aoki , Takahiro Toda , Junya Yamasaki , Shinichi Iida , Hiroki Murakami
发明人： Katsushi Aoki , Takahiro Toda , Junya Yamasaki , Shinichi Iida , Hiroki Murakami
IPC分类号： G06F17/50
CPC分类号： G06F17/5077 , H01L23/5225 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor integrated circuit design apparatus includes: an association information creating unit which creates association information for associating wiring information of a signal line with wiring information of a shield line placed for the signal line; an association information storage unit which stores the thus created association information; and a shield wiring unit which, when the placement of the signal line is changed, changes in interlinking fashion with the changed placement the placement of the shield line that is associated with the signal line by the association information.
摘要翻译：一种半导体集成电路设计装置，包括：关联信息创建单元，其创建用于将信号线的布线信息与放置在信号线上的屏蔽线的布线信息相关联的关联信息; 存储由此创建的关联信息的关联信息存储单元; 以及屏蔽布线单元，当信号线的布置改变时，通过关联信息，与信号线相关联的屏蔽线的布置与改变的布置相互连接地改变。

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