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1. 发明申请

US20120228673A1 FIELD-EFFECT TRANSISTOR, SEMICONDUCTOR WAFER, METHOD FOR PRODUCING FIELD-EFFECT TRANSISTOR AND METHOD FOR PRODUCING SEMICONDUCTOR WAFER 失效
标题翻译：场效应晶体管，半导体晶体管，生产场效应晶体管的方法和生产半导体晶体管的方法
公开(公告)号：US20120228673A1
公开(公告)日：2012-09-13
申请号：US13413216
申请日：2012-03-06
申请人： Masahiko HATA , Hisashi Yamada , Noboru Fukuhara , Shinichi Takagi , Mitsuru Takenaka , Masafumi Yokoyama , Tetsuji Yasuda , Yuji Urabe , Noriyuki Miyata , Taro Itatani , Hiroyuki Ishii
发明人： Masahiko HATA , Hisashi Yamada , Noboru Fukuhara , Shinichi Takagi , Mitsuru Takenaka , Masafumi Yokoyama , Tetsuji Yasuda , Yuji Urabe , Noriyuki Miyata , Taro Itatani , Hiroyuki Ishii
IPC分类号： H01L29/78 , H01L21/336 , H01L21/20
CPC分类号： H01L29/7786 , H01L21/26553 , H01L29/4966 , H01L29/517 , H01L29/66318 , H01L29/66522
摘要： Provided is a field-effect transistor including a gate insulating layer, a first semiconductor crystal layer in contact with the gate insulating layer, and a second semiconductor crystal layer lattice-matching or pseudo lattice-matching the first semiconductor crystal layer. Here, the gate insulating layer, the first semiconductor crystal layer, and the second semiconductor crystal layer are arranged in the order of the gate insulating layer, the first semiconductor crystal layer, and the second semiconductor crystal layer, the first semiconductor crystal layer is made of Inx1Ga1-x1Asy1P1-y1 (0
摘要翻译：提供了一种场效应晶体管，其包括栅极绝缘层，与栅极绝缘层接触的第一半导体晶体层和第二半导体晶体层与第一半导体晶体层的晶格匹配或伪晶格匹配。这里，栅绝缘层，第一半导体晶体层和第二半导体晶体层按栅极绝缘层，第一半导体晶体层和第二半导体晶体层的顺序排列，第一半导体晶体层被制成的In x Ga 1-x As y 1 P 1-y 1（0

2. 发明授权

US08779471B2 Field-effect transistor, semiconductor wafer, method for producing field-effect transistor and method for producing semiconductor wafer 失效
标题翻译：场效应晶体管，半导体晶片，场效应晶体管的制造方法及半导体晶片的制造方法
公开(公告)号：US08779471B2
公开(公告)日：2014-07-15
申请号：US13413216
申请日：2012-03-06
申请人： Masahiko Hata , Hisashi Yamada , Noboru Fukuhara , Shinichi Takagi , Mitsuru Takenaka , Masafumi Yokoyama , Tetsuji Yasuda , Yuji Urabe , Noriyuki Miyata , Taro Itatani , Hiroyuki Ishii
发明人： Masahiko Hata , Hisashi Yamada , Noboru Fukuhara , Shinichi Takagi , Mitsuru Takenaka , Masafumi Yokoyama , Tetsuji Yasuda , Yuji Urabe , Noriyuki Miyata , Taro Itatani , Hiroyuki Ishii
IPC分类号： H01L29/66
CPC分类号： H01L29/7786 , H01L21/26553 , H01L29/4966 , H01L29/517 , H01L29/66318 , H01L29/66522
摘要： Provided is a field-effect transistor including a gate insulating layer, a first semiconductor crystal layer in contact with the gate insulating layer, and a second semiconductor crystal layer lattice-matching or pseudo lattice-matching the first semiconductor crystal layer. Here, the gate insulating layer, the first semiconductor crystal layer, and the second semiconductor crystal layer are arranged in the order of the gate insulating layer, the first semiconductor crystal layer, and the second semiconductor crystal layer, the first semiconductor crystal layer is made of Inx1Ga1-x1Asy1P1-y1 (0
摘要翻译：提供了一种场效应晶体管，其包括栅极绝缘层，与栅极绝缘层接触的第一半导体晶体层和第二半导体晶体层与第一半导体晶体层的晶格匹配或伪晶格匹配。这里，栅绝缘层，第一半导体晶体层和第二半导体晶体层按栅极绝缘层，第一半导体晶体层和第二半导体晶体层的顺序排列，第一半导体晶体层被制成的In x Ga 1-x As y 1 P 1-y 1（0

3. 发明申请

US20110233689A1 SEMICONDUCTOR DEVICE, PROCESS FOR PRODUCING SEMICONDUCTOR DEVICE, SEMICONDUCTOR SUBSTRATE, AND PROCESS FOR PRODUCING SEMICONDUCTOR SUBSTRATE 审中-公开
标题翻译：半导体器件，用于制造半导体器件的工艺，半导体衬底和用于生产半导体衬底的工艺
公开(公告)号：US20110233689A1
公开(公告)日：2011-09-29
申请号：US13133092
申请日：2009-11-27
申请人： Masahiko Hata , Noboru Fukuhara , Hisashi Yamada , Shinichi Takagi , Masakazu Sugiyama , Mitsuru Takenaka , Tetsuji Yasuda , Noriyuki Miyata , Taro Itatani , Hiroyuki Ishii , Akihiro Ohtake , Jun Nara
发明人： Masahiko Hata , Noboru Fukuhara , Hisashi Yamada , Shinichi Takagi , Masakazu Sugiyama , Mitsuru Takenaka , Tetsuji Yasuda , Noriyuki Miyata , Taro Itatani , Hiroyuki Ishii , Akihiro Ohtake , Jun Nara
IPC分类号： H01L29/78 , H01L29/04 , H01L21/336 , H01L29/20 , H01L21/20
CPC分类号： H01L29/045 , H01L29/20 , H01L29/7833 , H01L29/78681
摘要： There is provided a semiconductor device that includes a III-V Group compound semiconductor having a zinc-blende-type crystal structure, an insulating material being in contact with the (111) plane of the III-V Group compound semiconductor, a plane of the III-V Group compound semiconductor equivalent to the (111) plane, or a plane that has an off angle with respect to the (111) plane or the plane equivalent to the (111) plane, and an MIS-type electrode being in contact with the insulating material and including a metal conductive material.
摘要翻译：提供了一种半导体器件，其包括具有锌闪光体型晶体结构的III-V族化合物半导体，与III-V族化合物半导体的（111）面接触的绝缘材料，相当于（111）面的III-V族化合物半导体，或相对于（111）面或与（111）面相当的面的偏角的平面，和与MIS接触的MIS型电极具有绝缘材料并且包括金属导电材料。

4. 发明授权

US09112035B2 Semiconductor substrate, field-effect transistor, integrated circuit, and method for fabricating semiconductor substrate 有权
标题翻译：半导体衬底，场效晶体管，集成电路以及半导体衬底的制造方法
公开(公告)号：US09112035B2
公开(公告)日：2015-08-18
申请号：US13410872
申请日：2012-03-02
申请人： Hisashi Yamada , Masahiko Hata , Masafumi Yokoyama , Mitsuru Takenaka , Shinichi Takagi , Tetsuji Yasuda , Hideki Takagi , Yuji Urabe
发明人： Hisashi Yamada , Masahiko Hata , Masafumi Yokoyama , Mitsuru Takenaka , Shinichi Takagi , Tetsuji Yasuda , Hideki Takagi , Yuji Urabe
IPC分类号： H01L29/02 , H01L29/786 , H01L21/762 , H01L29/49 , H01L29/51 , H01L29/66
CPC分类号： H01L29/78681 , H01L21/76251 , H01L21/76256 , H01L29/4966 , H01L29/517 , H01L29/66742
摘要： A semiconductor substrate includes a substrate, an insulating layer, and a semiconductor layer. The insulating layer is over and in contact with the substrate. The insulating layer includes at least one of an amorphous metal oxide and an amorphous metal nitride. The semiconductor layer is over and in contact with the insulating layer. The semiconductor layer is formed by crystal growth.
摘要翻译：半导体衬底包括衬底，绝缘层和半导体层。绝缘层在衬底上并与衬底接触。绝缘层包括无定形金属氧化物和无定形金属氮化物中的至少一种。半导体层在绝缘层上方并与之接触。半导体层通过晶体生长形成。

5. 发明申请

US20110018033A1 SEMICONDUCTOR WAFER, SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE 有权
标题翻译：半导体晶体管，半导体器件及制造半导体器件的方法
公开(公告)号：US20110018033A1
公开(公告)日：2011-01-27
申请号：US12934233
申请日：2009-03-26
申请人： Mitsuru Takenaka , Shinichi Takagi , Masahiko Hata , Osamu Ichikawa
发明人： Mitsuru Takenaka , Shinichi Takagi , Masahiko Hata , Osamu Ichikawa
IPC分类号： H01L29/205 , H01L21/283 , H01L29/78 , H01L21/3205
CPC分类号： H01L29/7787 , H01L21/28264 , H01L29/205 , H01L29/517 , H01L29/66462 , H01L29/66522 , H01L29/78648 , H01L29/78681
摘要： It is an objective of the present invention to form a favorable interface between an oxide layer and a group 3-5 compound semiconductor using a practical and simple method.Provided is a semiconductor wafer comprising a first semiconductor layer that is a group 3-5 compound not containing arsenic and that lattice matches or pseudo-lattice matches with InP; and a second semiconductor layer that is formed to contact the first semiconductor layer, is a group 3-5 compound semiconductor layer that lattice matches or pseudo-lattice matches with InP, and can be selectively oxidized relative to the first semiconductor layer. Also provided is a semiconductor device comprising a first semiconductor layer that is a group 3-5 compound not containing arsenic and that lattice matches or pseudo-lattice matches with InP; an oxide layer formed by selectively oxidizing, relative to the first semiconductor layer, at least a portion of a second semiconductor layer that is a group 3-5 compound formed to contact the first semiconductor layer and that lattice matches or pseudo-lattice matches with InP; and a control electrode that adds an electric field to a channel formed in the first semiconductor layer.
摘要翻译：本发明的目的是使用实用和简单的方法在氧化物层和3-5族化合物半导体之间形成良好的界面。提供了包括第一半导体层的半导体晶片，其是不含砷的组3-5化合物，并且晶格匹配或伪晶格与InP匹配; 和形成为与第一半导体层接触的第二半导体层是与InP晶格匹配或伪晶格匹配的组3-5化合物半导体层，并且可相对于第一半导体层选择性地氧化。还提供了一种半导体器件，其包括第一半导体层，其是不含砷的组3-5化合物，并且晶格匹配或伪晶格与InP匹配; 通过相对于第一半导体层选择性地氧化形成为与第一半导体层接触的组3-5化合物的第二半导体层的至少一部分，并且晶格匹配或伪晶格匹配的InP形成的氧化物层 ; 以及将电场与形成在第一半导体层中的沟道相加的控制电极。

6. 发明授权

US08431459B2 Semiconductor wafer, semiconductor device, and method of manufacturing a semiconductor device 有权
标题翻译：半导体晶片，半导体器件以及半导体器件的制造方法
公开(公告)号：US08431459B2
公开(公告)日：2013-04-30
申请号：US12934233
申请日：2009-03-26
申请人： Mitsuru Takenaka , Shinichi Takagi , Masahiko Hata , Osamu Ichikawa
发明人： Mitsuru Takenaka , Shinichi Takagi , Masahiko Hata , Osamu Ichikawa
IPC分类号： H01L21/00
CPC分类号： H01L29/7787 , H01L21/28264 , H01L29/205 , H01L29/517 , H01L29/66462 , H01L29/66522 , H01L29/78648 , H01L29/78681
摘要： It is an objective of the present invention to form a favorable interface between an oxide layer and a group 3-5 compound semiconductor using a practical and simple method.Provided is a semiconductor wafer comprising a first semiconductor layer that is a group 3-5 compound not containing arsenic and that lattice matches or pseudo-lattice matches with InP; and a second semiconductor layer that is formed to contact the first semiconductor layer, is a group 3-5 compound semiconductor layer that lattice matches or pseudo-lattice matches with InP, and can be selectively oxidized relative to the first semiconductor layer. Also provided is a semiconductor device comprising a first semiconductor layer that is a group 3-5 compound not containing arsenic and that lattice matches or pseudo-lattice matches with InP; an oxide layer formed by selectively oxidizing, relative to the first semiconductor layer, at least a portion of a second semiconductor layer that is a group 3-5 compound formed to contact the first semiconductor layer and that lattice matches or pseudo-lattice matches with InP; and a control electrode that adds an electric field to a channel formed in the first semiconductor layer.
摘要翻译：本发明的目的是使用实用和简单的方法在氧化物层和3-5族化合物半导体之间形成良好的界面。提供了包括第一半导体层的半导体晶片，其是不含砷的组3-5化合物，并且晶格匹配或伪晶格与InP匹配; 和形成为与第一半导体层接触的第二半导体层是与InP晶格匹配或伪晶格匹配的组3-5化合物半导体层，并且可相对于第一半导体层选择性地氧化。还提供了一种半导体器件，其包括第一半导体层，其是不含砷的组3-5化合物，并且晶格匹配或伪晶格与InP匹配; 通过相对于第一半导体层选择性地氧化形成为与第一半导体层接触的组3-5化合物的第二半导体层的至少一部分，并且晶格匹配或伪晶格匹配的InP形成的氧化物层 ; 以及将电场与形成在第一半导体层中的沟道相加的控制电极。

7. 发明授权

US07659537B2 Field effect transistor 有权
标题翻译：场效应晶体管
公开(公告)号：US07659537B2
公开(公告)日：2010-02-09
申请号：US11336817
申请日：2006-01-23
申请人： Tsutomu Tezuka , Shinichi Takagi , Tomohisa Mizuno
发明人： Tsutomu Tezuka , Shinichi Takagi , Tomohisa Mizuno
IPC分类号： H01L31/00
CPC分类号： H01L21/2807 , H01L29/1054 , H01L29/4236 , H01L29/665 , H01L29/66613 , H01L29/7834
摘要： A field effect transistor comprises a source and a drain, and a channel layer of Si1-x-yGexCy crystal (1>x>0, 1>y≧0). Ge composition increases toward a drain end, in a vicinity of a source end of the channel layer.
摘要翻译：场效应晶体管包括源极和漏极，以及Si1-x-yGexCy晶体（1> x> 0,1> y> = 0）的沟道层。 Ge组分在沟道层的源极端附近向漏极端增加。

8. 发明授权

US07489042B2 Stem for optical element and optical semiconductor device using the same 有权
标题翻译：用于使用其的光学元件和光学半导体器件的杆
公开(公告)号：US07489042B2
公开(公告)日：2009-02-10
申请号：US11324804
申请日：2006-01-04
申请人： Isao Oshima , Shinichi Takagi
发明人： Isao Oshima , Shinichi Takagi
IPC分类号： H01L33/00
CPC分类号： H01S5/02276 , H01L33/483 , H01L2224/48091 , H01S5/02212 , H01S5/06226 , H01L2924/00014
摘要： A stem for an optical element includes a base-like portion located on a portion of a package side surface of an eyelet, higher than the package side surface. A block is located on a surface of the base-like portion of the eyelet. An optical element mounting surface of the block projects outward, overhanging a side face of the base-like portion, close to lead electrodes which are inserted through holes of the eyelet, respectively, and sealed with sealing glass. High-frequency line substrates are located on the optical element mounting surface of the block, and Au films of the high-frequency line substrate are electrically connected to respective lead electrodes.
摘要翻译：用于光学元件的杆包括位于孔眼的包装侧表面的高于包装侧表面的部分的基部状部分。块体位于孔眼的基部部分的表面上。块的光学元件安装面向外突出，突出于基部的侧面，靠近分别穿过孔眼的孔插入的引线电极，并用密封玻璃密封。高频线基板位于块的光学元件安装面上，高频线基板的Au膜与各引线电极电连接。

9. 发明申请

US20070120134A1 Stem for optical element and optical semiconductor device using the same 有权
标题翻译：用于使用其的光学元件和光学半导体器件的杆
公开(公告)号：US20070120134A1
公开(公告)日：2007-05-31
申请号：US11324804
申请日：2006-01-04
申请人： Isao Oshima , Shinichi Takagi
发明人： Isao Oshima , Shinichi Takagi
IPC分类号： H01L33/00
CPC分类号： H01S5/02276 , H01L33/483 , H01L2224/48091 , H01S5/02212 , H01S5/06226 , H01L2924/00014
摘要： A stem for an optical element includes a base-like portion located on a portion of a package side surface of an eyelet, higher than the package side surface. A block is located on a surface of the base-like portion of the eyelet. An optical element mounting surface of the block projects outward, overhanging a side face of the base-like portion, close to lead electrodes which are inserted through holes of the eyelet, respectively, and sealed with sealing glass. High-frequency line substrates are located on the optical element mounting surface of the block, and Au films of the high-frequency line substrate are electrically connected to respective lead electrodes.
摘要翻译：用于光学元件的杆包括位于孔眼的包装侧表面的高于包装侧表面的部分的基部状部分。块体位于孔眼的基部部分的表面上。块的光学元件安装面向外突出，突出于基部的侧面，靠近分别穿过孔眼的孔插入的引线电极，并用密封玻璃密封。高频线基板位于块的光学元件安装面上，高频线基板的Au膜与各引线电极电连接。

10. 发明申请

US20060256437A1 Wavelength filter and wavelength monitor device 失效
标题翻译：波长滤波器和波长监测器
公开(公告)号：US20060256437A1
公开(公告)日：2006-11-16
申请号：US10549325
申请日：2003-03-19
申请人： Masao Imaki , Yoshihito Hirano , Makoto Sato , Akihiro Adachi , Shinichi Takagi , Yasunori Nisimura
发明人： Masao Imaki , Yoshihito Hirano , Makoto Sato , Akihiro Adachi , Shinichi Takagi , Yasunori Nisimura
IPC分类号： G02B27/28
CPC分类号： G02B5/3083 , G01J9/02 , G01J2009/0257 , G02B7/008 , H01S5/02248 , H01S5/0687
摘要： A wavelength filter includes a solid material that is optically transparent and including a pair of planar surfaces substantially parallel to each other; and a supporting member that supports the solid material on a planar surface of the solid material other than the pair of planar surfaces, the supporting member having a rigidity higher than that of the solid material. The solid material is a birefringent material of which an optical axis makes a predetermined angle with respect to a normal to the pair of planar surfaces, and the wavelength filter selects light having a wavelength that is determined by an optical length between the pair of planar surfaces by resonating the light between the pair of planar surfaces.
摘要翻译：波长滤波器包括光学透明并且包括彼此大致平行的一对平面的固体材料; 以及支撑构件，其将所述固体材料支撑在除了所述一对平面之外的所述固体材料的平坦表面上，所述支撑构件的刚度高于所述固体材料的刚度。固体材料是双折射材料，其光轴相对于一对平面的法线形成预定角度，并且波长滤光器选择具有由一对平面之间的光学长度确定的波长的光通过使一对平面之间的光共振。

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