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1. 发明授权

US08420422B2 Pattern forming method, processing method, and processing apparatus 有权
标题翻译：图案形成方法，处理方法和处理装置
公开(公告)号：US08420422B2
公开(公告)日：2013-04-16
申请号：US13041917
申请日：2011-03-07
申请人： Masafumi Asano , Ryoichi Inanami , Masayuki Hatano
发明人： Masafumi Asano , Ryoichi Inanami , Masayuki Hatano
IPC分类号： H01L21/00
CPC分类号： H01L22/20 , B82Y10/00 , B82Y40/00 , G03F7/0002 , H01L22/12
摘要： According to the embodiments, a distribution of a recess portion shape is calculated based on a result obtained by measuring the recess portion shape of a first projection and recess pattern formed on a surface of a template. Next, a distribution of an application amount of a curing agent to a processing target layer is calculated based on the distribution of the recess portion shape, and the curing agent is applied to the processing target layer based on this distribution of the application amount of the curing agent. Next, a second projection and recess pattern is formed by transferring the first projection and recess pattern onto the curing agent by causing the curing agent to cure in a state where the first projection and recess pattern is in contact with the curing agent.
摘要翻译：根据实施例，基于通过测量形成在模板的表面上的第一突起和凹部图案的凹部形状获得的结果来计算凹部形状的分布。接下来，基于凹部形状的分布计算固化剂的涂布量到处理对象层的分布，并且基于该涂布量的分布将固化剂施加到处理对象层固化剂。接下来，通过使固化剂在第一突起和凹部图案与固化剂接触的状态下固化而将第一突起和凹陷图案转印到固化剂上形成第二突起和凹陷图案。

2. 发明授权

US07982155B2 System of testing semiconductor devices, a method for testing semiconductor devices, and a method for manufacturing semiconductor devices 有权
标题翻译：半导体器件的测试系统，半导体器件的测试方法以及半导体器件的制造方法
公开(公告)号：US07982155B2
公开(公告)日：2011-07-19
申请号：US12588685
申请日：2009-10-23
申请人： Masafumi Asano
发明人： Masafumi Asano
IPC分类号： B07C5/344
CPC分类号： G01R31/2894
摘要： A system of testing semiconductor devices includes a classification module configured to classify a plurality of lots into a plurality of groups; an apparatus assignment module configured to assign a plurality of testing apparatuses to each of the groups; and a test recipe creation module configured to create a test recipe to test defects in a second group other than a first group specified in the groups, the test recipe including a definition of testing positions in the second group defined by a rule different from the first group.
摘要翻译：一种测试半导体器件的系统包括分类模块，其被配置为将多个批次分类成多个组; 一种装置分配模块，被配置为将多个测试装置分配给每个组; 以及测试配方创建模块，被配置为创建测试配方以测试除组中指定的第一组之外的第二组中的缺陷，所述测试配方包括由与第一组不同的规则定义的第二组中的测试位置的定义组。

3. 发明授权

US07855047B2 Reticle set, method for designing a reticle set, exposure monitoring method, inspection method for reticle set and manufacturing method for a semiconductor device 有权
公开(公告)号：US07855047B2
公开(公告)日：2010-12-21
申请号：US12654292
申请日：2009-12-16
申请人： Masafumi Asano , Tadahito Fujisawa , Satoshi Tanaka
发明人： Masafumi Asano , Tadahito Fujisawa , Satoshi Tanaka
IPC分类号： H01L21/00 , G03F1/00 , G03C5/00
CPC分类号： G03F7/70466 , G03F1/44 , G03F1/70 , G03F7/70625
摘要： A reticle set, includes a first photomask having a circuit pattern provided with first and second openings provided adjacent to each other sandwiching a first opaque portion, and a monitor mark provided adjacent to the circuit pattern; and a second photomask having a trim pattern provided with a second opaque portion covering the first opaque portion in an area occupied by the circuit pattern and an extending portion connected to one end of the first opaque portion and extending outside the area when the second photomask is aligned with a pattern delineated on a substrate by the first photomask.

4. 发明申请

US20100068833A1 System of testing semiconductor devices, a method for testing semiconductor devices, and a method for manufacturing semiconductor devices 有权
标题翻译：半导体器件的测试系统，半导体器件的测试方法以及半导体器件的制造方法
公开(公告)号：US20100068833A1
公开(公告)日：2010-03-18
申请号：US12588685
申请日：2009-10-23
申请人： Masafumi Asano
发明人： Masafumi Asano
IPC分类号： H01L21/66
CPC分类号： G01R31/2894
摘要： A system of testing semiconductor devices includes a classification module configured to classify a plurality of lots into a plurality of groups; an apparatus assignment module configured to assign a plurality of testing apparatuses to each of the groups; and a test recipe creation module configured to create a test recipe to test defects in a second group other than a first group specified in the groups, the test recipe including a definition of testing positions in the second group defined by a rule different from the first group.
摘要翻译：一种测试半导体器件的系统包括分类模块，其被配置为将多个批次分类成多个组; 一种装置分配模块，被配置为将多个测试装置分配给每个组; 以及测试配方创建模块，被配置为创建测试配方以测试除组中指定的第一组之外的第二组中的缺陷，所述测试配方包括由与第一组不同的规则定义的第二组中的测试位置的定义组。

5. 发明申请

US20090246654A1 METHOD FOR EVALUATING LITHOGRAPHY APPARATUS AND METHOD FOR CONTROLLING LITHOGRAPHY APPARATUS 失效
标题翻译：评估光刻设备的方法和控制光刻设备的方法
公开(公告)号：US20090246654A1
公开(公告)日：2009-10-01
申请号：US12405710
申请日：2009-03-17
申请人： Masafumi Asano , Kenji Yoshida , Masahiro Kanno
发明人： Masafumi Asano , Kenji Yoshida , Masahiro Kanno
IPC分类号： G03F7/20
CPC分类号： G03F7/70641 , G03F7/70625
摘要： An evaluation method for lithography apparatus including a coating unit, an exposure unit, a heating unit and a development unit, the evaluation method including forming an evaluation resist pattern by using the lithography apparatus, the evaluation resist pattern including first and second evaluation patterns, the first and second evaluation patterns having different peripheral environments, measuring dimensions of the first and second evaluation patterns to obtain a dimensional difference between the first and second resist evaluation patterns, estimating an exposure dose of a resist when the resist is exposed by the exposure unit, the estimating the exposure dose being performed based on the dimensional difference between the first and second resist evaluation patterns, and estimating an effective heating temperature of the resist when the resist is heated by the heating unit, the estimating the effective heating temperature being performed based on the estimated exposure dose and the dimensional difference.
摘要翻译：一种包括涂布单元，曝光单元，加热单元和显影单元的光刻设备的评估方法，所述评估方法包括通过使用光刻设备形成评估抗蚀剂图案，所述评估抗蚀剂图案包括第一和第二评估图案，第一和第二评估图案具有不同的外围环境，测量第一和第二评估图案的尺寸以获得第一和第二抗蚀剂评估图案之间的尺寸差异，当抗蚀剂被曝光单元曝光时估计抗蚀剂的曝光剂量，基于第一和第二抗蚀剂评估图案之间的尺寸差来估计正在进行的曝光剂量，以及当加热单元加热抗蚀剂时估计抗蚀剂的有效加热温度，基于估计暴露剂量和t 他的尺寸差异。

6. 发明授权

US07175943B2 Reticle set, method for designing a reticle set, exposure monitoring method, inspection method for reticle set and manufacturing method for a semiconductor device 失效
公开(公告)号：US07175943B2
公开(公告)日：2007-02-13
申请号：US10725571
申请日：2003-12-03
申请人： Masafumi Asano , Tadahito Fujisawa , Satoshi Tanaka
发明人： Masafumi Asano , Tadahito Fujisawa , Satoshi Tanaka
IPC分类号： G01F9/00
CPC分类号： G03F7/70466 , G03F1/44 , G03F1/70 , G03F7/70625
摘要： A reticle set, includes a first photomask having a circuit pattern provided with first and second openings provided adjacent to each other sandwiching a first opaque portion, and a monitor mark provided adjacent to the circuit pattern; and a second photomask having a trim pattern provided with a second opaque portion covering the first opaque portion in an area occupied by the circuit pattern and an extending portion connected to one end of the first opaque portion and extending outside the area when the second photomask is aligned with a pattern delineated on a substrate by the first photomask.

7. 发明申请

US20060226053A1 System of testing semiconductor devices, a method for testing semiconductor devices, and a method for manufacturing semiconductor devices 失效
公开(公告)号：US20060226053A1
公开(公告)日：2006-10-12
申请号：US11373986
申请日：2006-03-14
申请人： Masafumi Asano
发明人： Masafumi Asano
IPC分类号： B07C5/344
CPC分类号： G01R31/2894
摘要： A system of testing semiconductor devices includes a classification module configured to classify a plurality of lots into a plurality of groups; an apparatus assignment module configured to assign a plurality of testing apparatuses to each of the groups; and a test recipe creation module configured to create a test recipe to test defects in a second group other than a first group specified in the groups, the test recipe including a definition of testing positions in the second group defined by a rule different from the first group.

8. 发明授权

US4239661A Surface-treating agent adapted for intermediate products of a semiconductor device 失效
标题翻译：适用于半导体器件的中间产品的表面处理剂
公开(公告)号：US4239661A
公开(公告)日：1980-12-16
申请号：US927139
申请日：1978-07-21
申请人： Hisashi Muraoka , Masafumi Asano , Taizo Ohashi , Yuzo Shimazaki
发明人： Hisashi Muraoka , Masafumi Asano , Taizo Ohashi , Yuzo Shimazaki
IPC分类号： C11D3/30 , C23G1/14 , H01L21/306 , C11D3/26 , C11D7/32
CPC分类号： H01L21/02052 , C11D3/30 , C23G1/14
摘要： A surface-treating agent formed of an aqueous solution containing 0.01 to 20% by weight of trialkyl(hydroxyalkyl) ammonium hydroxide. The treating agent is adapted to be used for the effective removal of organic and inorganic contaminants deposited on the surface of intermediate semiconductor products obtained in the respective steps of manufacturing a semiconductor device and the efficient etching of a metal layer used as wiring. Further, it can be used for the elimination of those portions of a positive working photoresist film coated on the surface of the intermediate semiconductor products which are and are not exposed to a light by controlling its concentration.
摘要翻译：由0.01〜20重量％的三烷基（羟烷基）氢氧化铵的水溶液形成的表面处理剂。处理剂适于用于有效去除沉积在制造半导体器件的各个步骤中获得的中间半导体产品的表面上的有机和无机污染物以及用作布线的金属层的有效蚀刻。此外，其可以用于通过控制其浓度来消除涂覆在中间半导体产品的表面上并且不暴露于光的正性光致抗蚀剂膜的那些部分。

9. 发明授权

US07970486B2 Method for controlling semiconductor manufacturing apparatus and control system of semiconductor manufacturing apparatus 有权
标题翻译：半导体制造装置的半导体制造装置及控制系统的控制方法
公开(公告)号：US07970486B2
公开(公告)日：2011-06-28
申请号：US11714231
申请日：2007-03-06
申请人： Hiroshi Matsushita , Junji Sugamoto , Masafumi Asano
发明人： Hiroshi Matsushita , Junji Sugamoto , Masafumi Asano
IPC分类号： G06F19/00
CPC分类号： G05B19/41875 , G05B2219/32194 , G05B2219/45031 , Y02P90/18 , Y02P90/22
摘要： A method for controlling a semiconductor manufacturing apparatus for processing wafers divided for each lot, has acquiring quality control value data group containing quality control value data of wafers in a plurality of lots previously processed, and an equipment engineering system parameter group containing equipment engineering system parameters corresponding to the wafers; creating a prediction formula of quality control value data, acquiring a first equipment engineering system parameters; inputting the first equipment engineering system parameters to the prediction formula, and performing calculation to predict first quality control value data of the wafers in the first lot; determining processing of the wafers corresponding to the first quality control value data; acquiring measured first quality control value data of the wafers in the first lot; replacing the quality control value data corresponding to the wafers in the first processed lot; updating the prediction formula.
摘要翻译：一种用于控制用于处理每批批次的晶片的半导体制造装置的方法，具有包含先前处理的多个批次中的晶片的质量控制值数据的采集质量控制值数据组，以及包含设备工程系统参数的设备工程系统参数组对应于晶片; 创建质量控制值数据预测公式，获取第一设备工程系统参数; 将第一设备工程系统参数输入到预测公式中，并且执行计算以预测第一批中的晶片的第一质量控制值数据; 确定与第一质量控制值数据对应的晶片的处理; 获取第一批中的晶片的测量的第一质量控制值数据; 替换与第一处理批次中的晶片对应的质量控制值数据; 更新预测公式。

10. 发明授权

US07396621B2 Exposure control method and method of manufacturing a semiconductor device 失效
标题翻译：曝光控制方法及制造半导体器件的方法
公开(公告)号：US07396621B2
公开(公告)日：2008-07-08
申请号：US11819375
申请日：2007-06-27
申请人： Tadahito Fujisawa , Soichi Inoue , Satoshi Tanaka , Masafumi Asano
发明人： Tadahito Fujisawa , Soichi Inoue , Satoshi Tanaka , Masafumi Asano
IPC分类号： G03F7/16 , G03F7/20 , G03F7/38 , G03F1/14
CPC分类号： G03F1/44
摘要： A method of manufacturing a semiconductor device includes preparing a projection exposure apparatus and a photomask, the photomask having a transparent substrate and a light shield film arranged in patterns to be transferred to a resist film on a wafer. The patterns include a circuit mask pattern, and first and second mark mask patterns having dimensions which change in accordance with exposure of the resist film. The method further includes forming first and second exposure monitor marks by causing phasing differences of 180 degrees and zero degrees, respectively, of light passing through the corresponding first and second mark mask patterns; measuring the first and second exposure monitor marks; calculating first and second effective exposures based on measured dimensions of the first and second exposure monitor marks; comparing variations of the first and second effective exposures; and changing at least one of a deposit condition of a front-end film formed under the resist film or a resist film coating condition if a variation of the first effective exposure differs from a variation of the second effective exposure.
摘要翻译：制造半导体器件的方法包括制备投影曝光设备和光掩模，所述光掩模具有透明基板和以图案排列的光屏蔽膜，以转印到晶片上的抗蚀剂膜。图案包括电路掩模图案，以及具有根据抗蚀剂膜的曝光而变化的尺寸的第一和第二标记掩模图案。该方法还包括通过分别通过相应的第一和第二标记掩模图案的光180度和零度的相位差来形成第一和第二曝光监视标记; 测量第一和第二曝光监视标记; 基于第一和第二曝光监视标记的测量尺寸来计算第一和第二有效曝光; 比较第一和第二有效曝光的变化; 以及如果第一有效曝光的变化与第二有效曝光的变化不同，则改变形成在抗蚀剂膜下方的前端膜的沉积条件或抗蚀剂膜涂覆条件中的至少一个。

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