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1. 发明授权

US07903455B2 Magnetic memory device 有权
标题翻译：磁存储器件
公开(公告)号：US07903455B2
公开(公告)日：2011-03-08
申请号：US12328546
申请日：2008-12-04
申请人： Mai Nozawa , Masanori Furuta , Daisuke Kurose , Tsutomu Sugawara
发明人： Mai Nozawa , Masanori Furuta , Daisuke Kurose , Tsutomu Sugawara
IPC分类号： G11C11/00
CPC分类号： G11C8/06 , G11C11/1673
摘要： A magnetic memory device including a plurality of word lines, a plurality of bit lines which intersect the word lines and are put into groups, a plurality of memory cells which are arranged at intersections between the bit lines and the word lines, each memory cell including a magnetic element and a transistor which are connected in series, a first decoder which sequentially selects the word lines, a second decoder which sequentially drives the bit lines of each group, a weighting adder which performs weighting addition of currents flowing on bit lines in a selected group to generate an added current signal, a current/voltage converter which converts the added current signal into a voltage signal, and an analog-to-digital converter which digitizes the voltage signal.
摘要翻译：一种磁存储装置，包括多个字线，与字线相交并分组的多个位线，布置在位线和字线之间的交叉处的多个存储单元，每个存储单元包括串联连接的磁性元件和晶体管，顺序地选择字线的第一解码器，顺序地驱动每组的位线的第二解码器，对流过位线的电流进行加权相加的加权加法器选择组以产生相加的电流信号，将所加电流信号转换为电压信号的电流/电压转换器以及对电压信号进行数字化的模数转换器。

2. 发明申请

US20090219753A1 MAGNETIC MEMORY DEVICE 有权
标题翻译：磁记忆装置
公开(公告)号：US20090219753A1
公开(公告)日：2009-09-03
申请号：US12328546
申请日：2008-12-04
申请人： Mai Nozawa , Masanori Furuta , Daisuke Kurose , Tsutomu Sugawara
发明人： Mai Nozawa , Masanori Furuta , Daisuke Kurose , Tsutomu Sugawara
IPC分类号： G11C11/02
CPC分类号： G11C8/06 , G11C11/1673
摘要： A magnetic memory device including a plurality of word lines, a plurality of bit lines which intersect the word lines and are put into groups, a plurality of memory cells which are arranged at intersections between the bit lines and the word lines, each memory cell including a magnetic element and a transistor which are connected in series, a first decoder which sequentially selects the word lines, a second decoder which sequentially drives the bit lines of each group, a weighting adder which performs weighting addition of currents flowing on bit lines in a selected group to generate an added current signal, a current/voltage converter which converts the added current signal into a voltage signal, and an analog-to-digital converter which digitizes the voltage signal.
摘要翻译：一种磁存储装置，包括多个字线，与字线相交并分组的多个位线，布置在位线和字线之间的交点处的多个存储单元，每个存储单元包括串联连接的磁性元件和晶体管，顺序地选择字线的第一解码器，顺序地驱动每组的位线的第二解码器，对流过位线的电流进行加权相加的加权加法器选择组以产生相加的电流信号，将所加电流信号转换为电压信号的电流/电压转换器以及对电压信号进行数字化的模数转换器。

3. 发明授权

US07868810B2 Amplifier circuit and A/D converter 有权
标题翻译：放大器电路和A / D转换器
公开(公告)号：US07868810B2
公开(公告)日：2011-01-11
申请号：US12547973
申请日：2009-08-26
申请人： Mai Nozawa , Masanori Furuta
发明人： Mai Nozawa , Masanori Furuta
IPC分类号： H03M1/38
CPC分类号： H03F1/223 , H03F3/45183 , H03F3/45192 , H03F3/45475 , H03F3/45735 , H03F2200/249 , H03F2200/405 , H03F2200/414 , H03F2200/78 , H03F2203/45292 , H03F2203/45302 , H03F2203/45356 , H03F2203/45396 , H03F2203/45424 , H03F2203/45446 , H03F2203/45536 , H03F2203/45544 , H03F2203/45551 , H03F2203/45616 , H03F2203/45726 , H03F2203/45728 , H03M1/002 , H03M1/0682 , H03M1/164
摘要： An amplifier circuit includes a current source that is connected between a power supply voltage and an output node and that is turned on when a switching control signal takes a first value and is turned off when the switching control signal takes a second value; a grounded voltage control current source whose amount of current is controlled by an input voltage; a cascode transistor connected between the voltage control current source and the output node; a boost amplifier connected between a gate electrode and a source electrode of the cascode transistor; and a switch that is connected between an output node of the boost amplifier and a bias voltage and that is turned on for a predetermined period of time when a value of the switching control signal is switched from the second value to the first value, to forcefully rise the boost amplifier.
摘要翻译：放大器电路包括连接在电源电压和输出节点之间的电流源，并且当开关控制信号取第一值时导通，并且当开关控制信号取第二值时被关断; 接地电压控制电流源，其电流量由输入电压控制; 连接在电压控制电流源和输出节点之间的共源共栅晶体管; 连接在共栅二极管的栅电极和源电极之间的升压放大器; 以及开关，其连接在所述升压放大器的输出节点和偏置电压之间，并且当所述开关控制信号的值从所述第二值切换到所述第一值时，所述开关被接通预定时间段，以强制地升高放大器。

4. 发明授权

US08797205B2 A/D conversion device and radio device 有权
标题翻译： A / D转换装置和无线电装置
公开(公告)号：US08797205B2
公开(公告)日：2014-08-05
申请号：US13413793
申请日：2012-03-07
申请人： Masanori Furuta , Tetsuro Itakura
发明人： Masanori Furuta , Tetsuro Itakura
IPC分类号： H03M1/12
CPC分类号： H03M1/164 , H03M1/466
摘要： This A/D convertor includes: a first D/A conversion unit configured to sample an analog input signal, and to generate a first difference signal by performing successive comparison of the analog input signal based on a reference voltage; a precharge capacitor unit configured to hold the reference voltage; a first comparing unit configured to compare the first difference signal with a reference value to generate a first digital signal; and an amplifying unit configured to calculate by using the first difference signal and the reference voltage to generate a residual signal.
摘要翻译：该A / D转换器包括：第一D / A转换单元，被配置为对模拟输入信号进行采样，并且通过基于参考电压执行模拟输入信号的连续比较来产生第一差分信号; 配置为保持所述参考电压的预充电电容器单元; 第一比较单元，被配置为将所述第一差分信号与参考值进行比较，以产生第一数字信号; 以及放大单元，被配置为通过使用第一差分信号和参考电压来计算以产生残留信号。

5. 发明授权

US08660506B2 Residual signal generating circuit, successive approximation ad converter, pipelined ad converter, and radio receiver 失效
标题翻译：剩余信号发生电路，逐次逼近广告转换器，流水线广告转换器和无线电接收器
公开(公告)号：US08660506B2
公开(公告)日：2014-02-25
申请号：US13607365
申请日：2012-09-07
申请人： Masanori Furuta , Hirotomo Ishii
发明人： Masanori Furuta , Hirotomo Ishii
IPC分类号： G06F3/033 , H04K3/00
CPC分类号： H03M1/168 , H03M1/162 , H03M1/361 , H03M1/804
摘要： There is provided with a residual signal generating circuit in which the capacitive DA converter generates a first difference signal with respect to an input signal based on a criterion voltage, the criterion voltage being indicative of an input range of the input signal, the reference voltage generating circuit divides the criterion voltage to obtain at least one partial voltage signal, the residual signal generating section generates 2N−1 first residual signal according to a difference between the first difference signal and 2N−1−1 first reference signal, the 2N−1−1 first reference signal being 2N−1−1 partial voltage signal among said at least one partial voltage signal generated by the reference voltage generating circuit, the comparator compares the 2N−1 first residual signal with a fixed voltage to obtain 2N−1 first comparison signal each indicative of a logical value, and the decoder decodes the 2N−1 first comparison signal to obtain first data of N bits.
摘要翻译：设置有残留信号发生电路，其中电容DA转换器基于标准电压产生相对于输入信号的第一差分信号，标准电压指示输入信号的输入范围，产生参考电压电路划分标准电压以获得至少一个部分电压信号，残差信号产生部分根据第一差信号和2N-1-1第一参考信号之间的差产生2N-1个第一残差信号， 1个第一参考信号是由参考电压产生电路产生的所述至少一个部分电压信号中的2N-1-1个部分电压信号，比较器将2N-1个第一残差信号与固定电压进行比较，以获得2N-1个第一比较信号，每个指示逻辑值，并且解码器解码2N-1个第一比较信号以获得N位的第一数据。

6. 发明授权

US08659454B2 Time error estimating device, error correction device and A/D converter 失效
标题翻译：时间误差估计装置，纠错装置和A / D转换器
公开(公告)号：US08659454B2
公开(公告)日：2014-02-25
申请号：US13425332
申请日：2012-03-20
申请人： Tomohiko Sugimoto , Takafumi Yamaji , Junya Matsuno , Masanori Furuta
发明人： Tomohiko Sugimoto , Takafumi Yamaji , Junya Matsuno , Masanori Furuta
IPC分类号： H03M1/06
CPC分类号： H03M1/0836 , H03M1/1215
摘要： A time error estimating device for estimating a sampling time error of each of a plurality of sampling circuits when the sampling circuits generates a plurality of sampling output signals by performing sampling at timings shifted from one another has correlators each configured to obtain a correlation value representing a similarity between the sampling output signals, and a weight adder configured to estimate the sampling time error of the sampling circuits, based on a result obtained by adjusting a weight on the correlation value.
摘要翻译：一种时间误差估计装置，用于当采样电路通过在彼此偏移的定时进行采样产生多个采样输出信号时，估计多个采样电路中的每一个的采样时间误差，具有各自被配置为获得表示基于通过调整相关值的权重而获得的结果，采样输出信号之间的相似度和配置为估计采样电路的采样时间误差的加权加法器。

7. 发明授权

US08525715B2 A/D conversion apparatus and DC-DC conversion apparatus 失效
标题翻译： A / D转换装置和DC-DC转换装置
公开(公告)号：US08525715B2
公开(公告)日：2013-09-03
申请号：US13525956
申请日：2012-06-18
申请人： Taichi Ogawa , Masanori Furuta
发明人： Taichi Ogawa , Masanori Furuta
IPC分类号： H03M1/06
CPC分类号： H03M1/1019 , H02M3/1588 , H02M2001/0012 , H03M1/12 , Y02B70/1466
摘要： There is provided with an A/D conversion apparatus which the first terminal receives a reference voltage signal, the single-ended to differential converter conducts single-ended to differential conversion on the reference voltage signal to obtain a first differential signal, the A/D converter conducts A/D conversion on the first differential signal based on the reference voltage signal to obtain a first digital signal, the digital circuit detects a DC offset which is a difference between the first digital signal and a digital signal, the second terminal receives an input signal, the single-ended to differential converter conducts single-ended to differential conversion on the input signal to acquire a second differential signal, the A/D converter conducts A/D conversion on the second differential signal based on the reference voltage signal to acquire a second digital signal, and the digital circuit subtracts the DC offset from the second digital signal to obtain a third digital signal.
摘要翻译：设置有第一端子接收参考电压信号的A / D转换装置，单端到差分转换器对参考电压信号进行单端到差分转换，以获得第一差分信号，A / D 转换器基于参考电压信号对第一差分信号进行A / D转换以获得第一数字信号，数字电路检测作为第一数字信号和数字信号之间的差的DC偏移，第二终端接收输入信号，单端到差分转换器对输入信号进行单端到差分转换，以获取第二差分信号，A / D转换器根据参考电压信号对第二差分信号进行A / D转换，获取第二数字信号，并且数字电路从第二数字信号中减去DC偏移以获得第三数字信号。

8. 发明申请

US20110149640A1 MAGNETIC STORAGE DEVICE 失效
标题翻译：磁性存储器件
公开(公告)号：US20110149640A1
公开(公告)日：2011-06-23
申请号：US13039633
申请日：2011-03-03
申请人： Masanori Furuta , Daisuke Kurose , Tsutomu Sugawara
发明人： Masanori Furuta , Daisuke Kurose , Tsutomu Sugawara
IPC分类号： G11C11/00
CPC分类号： G11C7/14 , G11C7/02 , G11C7/067 , G11C11/1659 , G11C11/1673
摘要： A magnetic storage device includes a plurality of MRAM memory cells connected to a data transfer line, a clamp transistor connected between the data transfer line and a reading signal line and configured to fixedly hold the potential of the data transfer line, and a reading circuit which is connected to the reading signal line and which reads the storage information of the memory cell. The reading circuit includes a hold switch connected between the reading signal line and a reading node N and configured to hold the potential of the node N, a capacitor connected between the node N and a ground end, a precharging switch connected between the node N and a power source and configured to charge the capacitor, and an inverter to which the potential of the node N is input to generate a digital signal.
摘要翻译：磁存储装置包括连接到数据传输线的多个MRAM存储单元，连接在数据传送线和读取信号线之间并被配置为固定地保持数据传输线的电位的钳位晶体管，以及读取电路，连接到读取信号线并读出存储单元的存储信息。读取电路包括连接在读取信号线和读取节点N之间并被配置为保持节点N的电位的保持开关，连接在节点N和接地端之间的电容器，连接在节点N和节点N之间的预充电开关电源，并且被配置为对电容器充电;以及逆变器，输入节点N的电位以产生数字信号。

9. 发明申请

US20090184857A1 A/D CONVERTING APPARATUS 失效
标题翻译： A / D转换装置
公开(公告)号：US20090184857A1
公开(公告)日：2009-07-23
申请号：US12349180
申请日：2009-01-06
申请人： Masanori Furuta , Tomohiko Ito , Takafumi Yamaji , Tetsuro Itakura
发明人： Masanori Furuta , Tomohiko Ito , Takafumi Yamaji , Tetsuro Itakura
IPC分类号： H03M1/12
CPC分类号： H03M1/1215 , H03M1/162 , H03M1/164 , H03M1/468
摘要： An A/D converting apparatus includes a first A/D converter to sample an analog input signal having a D/A converter to generate a comparative signal for successive comparison with the analog input signal, a signal generator generate a differential signal between the analog input signal and the comparative signal, and a comparator to compare the comparative signal with a standard value to generate a first digital signal exhibiting high-order bit; an amplifier to amplify the differential signal to generate a residue signal; and a second A/D converter to sample the residue signal to generate a second digital signal exhibiting low-order bit.
摘要翻译： A / D转换装置包括：第一A / D转换器，对具有D / A转换器的模拟输入信号进行采样以产生用于与模拟输入信号连续比较的比较信号，信号发生器在模拟输入端之间产生差分信号信号和比较信号，以及比较器，用于将比较信号与标准值进行比较，以产生呈现高位的第一数字信号; 放大器，用于放大差分信号以产生残留信号; 以及第二A / D转换器，用于对残留信号进行采样以产生呈现低阶位的第二数字信号。

10. 发明申请

US20090079598A1 SAMPLE RATE CONVERTER 审中-公开
标题翻译：采样率转换器
公开(公告)号：US20090079598A1
公开(公告)日：2009-03-26
申请号：US12057647
申请日：2008-03-28
申请人： Masanori Furuta , Takafumi Yamaji , Takeshi Ueno
发明人： Masanori Furuta , Takafumi Yamaji , Takeshi Ueno
IPC分类号： H03M7/00
CPC分类号： H03H17/04 , H03H17/0416
摘要： The sample rate converter includes a synthesizing unit which synthesizes an input signal sampled with frequency fs with a feedback signal of the frequency fs, in a frequency band from 0 to fs/N (where N indicates a natural number), with a gain greater than at least 1, to generate a synthesized signal, a downsampler which downsamples the synthesized signal to obtain an output signal of sample rate fs/N, and an upsampler which upsamples the output signal to generate the feedback signal.
摘要翻译：采样率转换器包括合成单元，其将从频率fs采样的输入信号与频率fs的反馈信号在0至fs / N（其中N表示自然数）的频带中合成，增益大于至少1，以产生合成信号，下采样器，其对合成信号进行下采样以获得采样率fs / N的输出信号;以及上采样器，其对输出信号进行采样以产生反馈信号。

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