专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07903455B2 Magnetic memory device 有权
标题翻译：磁存储器件
公开(公告)号：US07903455B2
公开(公告)日：2011-03-08
申请号：US12328546
申请日：2008-12-04
申请人： Mai Nozawa , Masanori Furuta , Daisuke Kurose , Tsutomu Sugawara
发明人： Mai Nozawa , Masanori Furuta , Daisuke Kurose , Tsutomu Sugawara
IPC分类号： G11C11/00
CPC分类号： G11C8/06 , G11C11/1673
摘要： A magnetic memory device including a plurality of word lines, a plurality of bit lines which intersect the word lines and are put into groups, a plurality of memory cells which are arranged at intersections between the bit lines and the word lines, each memory cell including a magnetic element and a transistor which are connected in series, a first decoder which sequentially selects the word lines, a second decoder which sequentially drives the bit lines of each group, a weighting adder which performs weighting addition of currents flowing on bit lines in a selected group to generate an added current signal, a current/voltage converter which converts the added current signal into a voltage signal, and an analog-to-digital converter which digitizes the voltage signal.
摘要翻译：一种磁存储装置，包括多个字线，与字线相交并分组的多个位线，布置在位线和字线之间的交叉处的多个存储单元，每个存储单元包括串联连接的磁性元件和晶体管，顺序地选择字线的第一解码器，顺序地驱动每组的位线的第二解码器，对流过位线的电流进行加权相加的加权加法器选择组以产生相加的电流信号，将所加电流信号转换为电压信号的电流/电压转换器以及对电压信号进行数字化的模数转换器。

2. 发明申请

US20100156683A1 AMPLIFIER CIRCUIT AND A/D CONVERTER 有权
标题翻译：放大器电路和A / D转换器
公开(公告)号：US20100156683A1
公开(公告)日：2010-06-24
申请号：US12547973
申请日：2009-08-26
申请人： Mai NOZAWA , Masanori FURUTA
发明人： Mai NOZAWA , Masanori FURUTA
IPC分类号： H03F3/16 , H03M1/00 , H03M1/12
CPC分类号： H03F1/223 , H03F3/45183 , H03F3/45192 , H03F3/45475 , H03F3/45735 , H03F2200/249 , H03F2200/405 , H03F2200/414 , H03F2200/78 , H03F2203/45292 , H03F2203/45302 , H03F2203/45356 , H03F2203/45396 , H03F2203/45424 , H03F2203/45446 , H03F2203/45536 , H03F2203/45544 , H03F2203/45551 , H03F2203/45616 , H03F2203/45726 , H03F2203/45728 , H03M1/002 , H03M1/0682 , H03M1/164
摘要： An amplifier circuit includes a current source that is connected between a power supply voltage and an output node and that is turned on when a switching control signal takes a first value and is turned off when the switching control signal takes a second value; a grounded voltage control current source whose amount of current is controlled by an input voltage; a cascode transistor connected between the voltage control current source and the output node; a boost amplifier connected between a gate electrode and a source electrode of the cascode transistor; and a switch that is connected between an output node of the boost amplifier and a bias voltage and that is turned on for a predetermined period of time when a value of the switching control signal is switched from the second value to the first value, to forcefully rise the boost amplifier.
摘要翻译：放大器电路包括连接在电源电压和输出节点之间的电流源，并且当开关控制信号取第一值时导通，并且当开关控制信号取第二值时被关断; 接地电压控制电流源，其电流量由输入电压控制; 连接在电压控制电流源和输出节点之间的共源共栅晶体管; 连接在共栅二极管的栅电极和源电极之间的升压放大器; 以及开关，其连接在所述升压放大器的输出节点和偏置电压之间，并且当所述开关控制信号的值从所述第二值切换到所述第一值时，所述开关被接通预定时间段，以强制地升高放大器。

3. 发明授权

US07679428B2 Comparator and analog-to-digital converter using the same 失效
标题翻译：比较器和模数转换器使用相同
公开(公告)号：US07679428B2
公开(公告)日：2010-03-16
申请号：US12175209
申请日：2008-07-17
申请人： Mai Nozawa , Daisuke Kurose , Takeshi Ueno , Tetsuro Itakura
发明人： Mai Nozawa , Daisuke Kurose , Takeshi Ueno , Tetsuro Itakura
IPC分类号： H03K5/22
CPC分类号： H03K5/2481 , H03K5/249
摘要： A comparator includes a first inverter which is inserted between a power source terminal and one end of a first variable resistor, includes a first FinFET provided with a first gate terminal for receiving a positive phase output signal, and a second gate terminal for receiving a clock signal changing between a first level and a second level, inverts the positive phase output signal, and outputs a negative phase output signal, and a second inverter which is inserted between the power source terminal and one end of a second variable resistor, includes a second FinFET provided with a third gate terminal for receiving the negative phase output signal, a fourth gate terminal for receiving the clock signal, and the same polarity as the first FinFET, inverts the negative phase output signal, and outputs the positive phase output signal.
摘要翻译：比较器包括插入在电源端子和第一可变电阻器的一端之间的第一反相器，包括：第一FinFET，其具有用于接收正相输出信号的第一栅极端子和用于接收时钟的第二栅极端子信号在第一电平和第二电平之间变化，使正相输出信号反相，并输出负相输出信号，并且插入在电源端和第二可变电阻的一端之间的第二反相器包括第二 FinFET具有用于接收负相输出信号的第三栅极端子，用于接收时钟信号的第四栅极端子和与第一FinFET相同的极性，反相负相输出信号，并输出正相输出信号。

4. 发明申请

US20090296858A1 DEM SYSTEM, DELTA-SIGMA A/D CONVERTER, AND RECEIVER 审中-公开
标题翻译： DEM系统，DELTA-SIGMA A / D转换器和接收器
公开(公告)号：US20090296858A1
公开(公告)日：2009-12-03
申请号：US12205384
申请日：2008-09-05
申请人： Mai NOZAWA , Takeshi UENO , Masanori FURUTA
发明人： Mai NOZAWA , Takeshi UENO , Masanori FURUTA
IPC分类号： H04L27/22 , H03M1/12 , H03M7/00
CPC分类号： H04L25/49 , H03M1/0665 , H03M1/747 , H03M3/464 , H03M7/165
摘要： A DEM (dynamic element matching) system in which a digital signal is inputted, has a switching circuit which, being equipped with a plurality of switches, each of the plurality of switches is subjected to on/off control based on a switch control signal, receives a first thermometer code in which the total number of logic ones and logic zeros corresponding to the digital signal is “n” and outputs a second thermometer code in which the total number of logic ones and logic zeros is “n” (where “n” is an integer equal to or larger than 2), a latch circuit which latches the second thermometer code output from the switching circuit and outputs the second thermometer code, and a switch control signal generating circuit which generates the switch control signal using the digital signal or the second thermometer code output from the latch circuit and outputs the switch control signal.
摘要翻译：其中输入数字信号的DEM（动态元件匹配）系统具有开关电路，该切换电路配备有多个开关，基于开关控制信号对多个开关中的每一个进行接通/断开控制，接收第一温度计代码，其中对应于数字信号的逻辑1和逻辑零的总数为“n”，并输出第二温度计代码，其中逻辑1和逻辑零的总数为“n”（其中“n” “是等于或大于2的整数的整数），锁存电路，其锁存从开关电路输出的第二温度计代码并输出第二温度计代码;以及开关控制信号发生电路，其使用数字信号产生开关控制信号或从锁存电路输出的第二温度计代码，并输出开关控制信号。

5. 发明申请

US20090219753A1 MAGNETIC MEMORY DEVICE 有权
标题翻译：磁记忆装置
公开(公告)号：US20090219753A1
公开(公告)日：2009-09-03
申请号：US12328546
申请日：2008-12-04
申请人： Mai Nozawa , Masanori Furuta , Daisuke Kurose , Tsutomu Sugawara
发明人： Mai Nozawa , Masanori Furuta , Daisuke Kurose , Tsutomu Sugawara
IPC分类号： G11C11/02
CPC分类号： G11C8/06 , G11C11/1673
摘要： A magnetic memory device including a plurality of word lines, a plurality of bit lines which intersect the word lines and are put into groups, a plurality of memory cells which are arranged at intersections between the bit lines and the word lines, each memory cell including a magnetic element and a transistor which are connected in series, a first decoder which sequentially selects the word lines, a second decoder which sequentially drives the bit lines of each group, a weighting adder which performs weighting addition of currents flowing on bit lines in a selected group to generate an added current signal, a current/voltage converter which converts the added current signal into a voltage signal, and an analog-to-digital converter which digitizes the voltage signal.
摘要翻译：一种磁存储装置，包括多个字线，与字线相交并分组的多个位线，布置在位线和字线之间的交点处的多个存储单元，每个存储单元包括串联连接的磁性元件和晶体管，顺序地选择字线的第一解码器，顺序地驱动每组的位线的第二解码器，对流过位线的电流进行加权相加的加权加法器选择组以产生相加的电流信号，将所加电流信号转换为电压信号的电流/电压转换器以及对电压信号进行数字化的模数转换器。

6. 发明申请

US20090045995A1 COMPARATOR AND ANALOG-TO-DIGITAL CONVERTER USING THE SAME 失效
标题翻译：使用相同的比较器和模拟数字转换器
公开(公告)号：US20090045995A1
公开(公告)日：2009-02-19
申请号：US12175209
申请日：2008-07-17
申请人： Mai NOZAWA , Daisuke Kurose , Takeshi Ueno , Tetsuro Itakura
发明人： Mai NOZAWA , Daisuke Kurose , Takeshi Ueno , Tetsuro Itakura
IPC分类号： H03M1/34
CPC分类号： H03K5/2481 , H03K5/249
摘要： A comparator includes a first inverter which is inserted between a power source terminal and one end of a first variable resistor, includes a first FinFET provided with a first gate terminal for receiving a positive phase output signal, and a second gate terminal for receiving a clock signal changing between a first level and a second level, inverts the positive phase output signal, and outputs a negative phase output signal, and a second inverter which is inserted between the power source terminal and one end of a second variable resistor, includes a second FinFET provided with a third gate terminal for receiving the negative phase output signal, a fourth gate terminal for receiving the clock signal, and the same polarity as the first FinFET, inverts the negative phase output signal, and outputs the positive phase output signal.
摘要翻译：比较器包括插入在电源端子和第一可变电阻器的一端之间的第一反相器，包括：第一FinFET，其具有用于接收正相输出信号的第一栅极端子和用于接收时钟的第二栅极端子信号在第一电平和第二电平之间变化，使正相输出信号反相，并输出负相输出信号，并且插入在电源端和第二可变电阻的一端之间的第二反相器包括第二 FinFET具有用于接收负相输出信号的第三栅极端子，用于接收时钟信号的第四栅极端子和与第一FinFET相同的极性，反相负相输出信号，并输出正相输出信号。

7. 发明授权

US07868810B2 Amplifier circuit and A/D converter 有权
标题翻译：放大器电路和A / D转换器
公开(公告)号：US07868810B2
公开(公告)日：2011-01-11
申请号：US12547973
申请日：2009-08-26
申请人： Mai Nozawa , Masanori Furuta
发明人： Mai Nozawa , Masanori Furuta
IPC分类号： H03M1/38
CPC分类号： H03F1/223 , H03F3/45183 , H03F3/45192 , H03F3/45475 , H03F3/45735 , H03F2200/249 , H03F2200/405 , H03F2200/414 , H03F2200/78 , H03F2203/45292 , H03F2203/45302 , H03F2203/45356 , H03F2203/45396 , H03F2203/45424 , H03F2203/45446 , H03F2203/45536 , H03F2203/45544 , H03F2203/45551 , H03F2203/45616 , H03F2203/45726 , H03F2203/45728 , H03M1/002 , H03M1/0682 , H03M1/164
摘要： An amplifier circuit includes a current source that is connected between a power supply voltage and an output node and that is turned on when a switching control signal takes a first value and is turned off when the switching control signal takes a second value; a grounded voltage control current source whose amount of current is controlled by an input voltage; a cascode transistor connected between the voltage control current source and the output node; a boost amplifier connected between a gate electrode and a source electrode of the cascode transistor; and a switch that is connected between an output node of the boost amplifier and a bias voltage and that is turned on for a predetermined period of time when a value of the switching control signal is switched from the second value to the first value, to forcefully rise the boost amplifier.
摘要翻译：放大器电路包括连接在电源电压和输出节点之间的电流源，并且当开关控制信号取第一值时导通，并且当开关控制信号取第二值时被关断; 接地电压控制电流源，其电流量由输入电压控制; 连接在电压控制电流源和输出节点之间的共源共栅晶体管; 连接在共栅二极管的栅电极和源电极之间的升压放大器; 以及开关，其连接在所述升压放大器的输出节点和偏置电压之间，并且当所述开关控制信号的值从所述第二值切换到所述第一值时，所述开关被接通预定时间段，以强制地升高放大器。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式