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1. 发明申请

US20090184857A1 A/D CONVERTING APPARATUS 失效
标题翻译： A / D转换装置
公开(公告)号：US20090184857A1
公开(公告)日：2009-07-23
申请号：US12349180
申请日：2009-01-06
申请人： Masanori Furuta , Tomohiko Ito , Takafumi Yamaji , Tetsuro Itakura
发明人： Masanori Furuta , Tomohiko Ito , Takafumi Yamaji , Tetsuro Itakura
IPC分类号： H03M1/12
CPC分类号： H03M1/1215 , H03M1/162 , H03M1/164 , H03M1/468
摘要： An A/D converting apparatus includes a first A/D converter to sample an analog input signal having a D/A converter to generate a comparative signal for successive comparison with the analog input signal, a signal generator generate a differential signal between the analog input signal and the comparative signal, and a comparator to compare the comparative signal with a standard value to generate a first digital signal exhibiting high-order bit; an amplifier to amplify the differential signal to generate a residue signal; and a second A/D converter to sample the residue signal to generate a second digital signal exhibiting low-order bit.
摘要翻译： A / D转换装置包括：第一A / D转换器，对具有D / A转换器的模拟输入信号进行采样以产生用于与模拟输入信号连续比较的比较信号，信号发生器在模拟输入端之间产生差分信号信号和比较信号，以及比较器，用于将比较信号与标准值进行比较，以产生呈现高位的第一数字信号; 放大器，用于放大差分信号以产生残留信号; 以及第二A / D转换器，用于对残留信号进行采样以产生呈现低阶位的第二数字信号。

2. 发明授权

US07884749B2 A/D converting apparatus 失效
标题翻译： A / D转换装置
公开(公告)号：US07884749B2
公开(公告)日：2011-02-08
申请号：US12349180
申请日：2009-01-06
申请人： Masanori Furuta , Tomohiko Ito , Takafumi Yamaji , Tetsuro Itakura
发明人： Masanori Furuta , Tomohiko Ito , Takafumi Yamaji , Tetsuro Itakura
IPC分类号： H03M1/38
CPC分类号： H03M1/1215 , H03M1/162 , H03M1/164 , H03M1/468
摘要： An A/D converting apparatus includes a first A/D converter to sample an analog input signal having a D/A converter to generate a comparative signal for successive comparison with the analog input signal, a signal generator generate a differential signal between the analog input signal and the comparative signal, and a comparator to compare the comparative signal with a standard value to generate a first digital signal exhibiting high-order bit; an amplifier to amplify the differential signal to generate a residue signal; and a second A/D converter to sample the residue signal to generate a second digital signal exhibiting low-order bit.
摘要翻译： A / D转换装置包括：第一A / D转换器，对具有D / A转换器的模拟输入信号进行采样以产生用于与模拟输入信号连续比较的比较信号，信号发生器在模拟输入端之间产生差分信号信号和比较信号，以及比较器，用于将比较信号与标准值进行比较，以产生呈现高位的第一数字信号; 放大器，用于放大差分信号以产生残余信号; 以及第二A / D转换器，用于对残留信号进行采样以产生呈现低阶位的第二数字信号。

3. 发明授权

US08040271B2 A/D conversion apparatus, A/D conversion method, and communication apparatus 有权
标题翻译： A / D转换装置，A / D转换方法和通信装置
公开(公告)号：US08040271B2
公开(公告)日：2011-10-18
申请号：US12553315
申请日：2009-09-03
申请人： Masanori Furuta , Tomohiko Ito , Tetsuro Itakura
发明人： Masanori Furuta , Tomohiko Ito , Tetsuro Itakura
IPC分类号： H03M1/38
CPC分类号： H04L27/06 , H03M1/0682 , H03M1/468 , H03M1/804
摘要： An A/D conversion apparatus includes: a first and a second D/A converter to sample an analog signal and successively compare the analog signal and a reference signal to generate a first and a second comparison signal respectively; a first comparator to compare the first comparison signal generated by the first D/A converter with a benchmark signal; a second comparator to compare the second comparison signal generated by the second D/A converter with the benchmark signal; and a converter to convert the analog signal to a digital signal according to results of the comparisons by the first and second comparators.
摘要翻译： A / D转换装置包括：第一和第二D / A转换器，对模拟信号进行采样，并连续地比较模拟信号和参考信号，分别产生第一和第二比较信号; 第一比较器，用于将由第一D / A转换器产生的第一比较信号与基准信号进行比较; 第二比较器，用于将由第二D / A转换器产生的第二比较信号与基准信号进行比较; 以及根据第一和第二比较器的比较结果将模拟信号转换为数字信号的转换器。

4. 发明申请

US20100142653A1 A/D CONVERSION APPARATUS, A/D CONVERSION METHOD, AND COMMUNICATION APPARATUS 有权
标题翻译： A / D转换装置，A / D转换方法和通信装置
公开(公告)号：US20100142653A1
公开(公告)日：2010-06-10
申请号：US12553315
申请日：2009-09-03
申请人： Masanori Furuta , Tomohiko Ito , Tetsuro Itakura
发明人： Masanori Furuta , Tomohiko Ito , Tetsuro Itakura
IPC分类号： H03M1/34 , H04L27/06
CPC分类号： H04L27/06 , H03M1/0682 , H03M1/468 , H03M1/804
摘要： An A/D conversion apparatus includes: a first and a second D/A converter to sample an analog signal and successively compare the analog signal and a reference signal to generate a first and a second comparison signal respectively; a first comparator to compare the first comparison signal generated by the first D/A converter with a benchmark signal; a second comparator to compare the second comparison signal generated by the second D/A converter with the benchmark signal; and a converter to convert the analog signal to a digital signal according to results of the comparisons by the first and second comparators.
摘要翻译： A / D转换装置包括：第一和第二D / A转换器，对模拟信号进行采样，并连续地比较模拟信号和参考信号，分别产生第一和第二比较信号; 第一比较器，用于将由第一D / A转换器产生的第一比较信号与基准信号进行比较; 第二比较器，用于将由第二D / A转换器产生的第二比较信号与基准信号进行比较; 以及根据第一和第二比较器的比较结果将模拟信号转换为数字信号的转换器。

5. 发明授权

US07414468B2 Amplifier, filter using the same, and radio communication device 失效
标题翻译：放大器，使用相同的滤波器和无线电通信设备
公开(公告)号：US07414468B2
公开(公告)日：2008-08-19
申请号：US11928766
申请日：2007-10-30
申请人： Takafumi Yamaji , Rui Ito , Tetsuro Itakura
发明人： Takafumi Yamaji , Rui Ito , Tetsuro Itakura
IPC分类号： H03F3/45
CPC分类号： H03F3/193 , H03F3/45085 , H03F3/45183 , H03F2203/45352
摘要： An amplifier includes an amplification unit which amplify a first difference between first and second input signals, a second difference between second and third input signals and a third difference between third and first input signals by a differential mode gain, and amplify an average of the first, second and third input signal by a common mode gain, for outputting a first output signal corresponding to a sum of the amplified first difference and the amplified average, a second output signal corresponding to a sum of the amplified second difference and the amplified average, and a third output signal corresponding to a sum of the amplified third difference and amplified average; first, second; and a reduction circuit which reduces the common mode gain less than the differential mode gain.
摘要翻译：放大器包括放大单元，其放大第一和第二输入信号之间的第一差值，第二和第三输入信号之间的第二差值以及第三和第一输入信号之间的差分模式增益的第三差值，并放大第一和第二输入信号的平均值通过共模增益输出第二和第三输入信号，用于输出对应于放大的第一差值和放大的平均值的和的第一输出信号，对应于放大的第二差值和放大的平均值之和的第二输出信号，以及对应于放大的第三差和放大的平均值之和的第三输出信号; 第一秒; 以及减小电路，其减小小于差分模式增益的共模增益。

6. 发明申请

US20080064359A1 AMPLIFIER, FILTER USING THE SAME, AND RADIO COMMUNICATION DEVICE 失效
标题翻译：放大器，使用其的滤波器和无线电通信设备
公开(公告)号：US20080064359A1
公开(公告)日：2008-03-13
申请号：US11928766
申请日：2007-10-30
申请人： Takafumi Yamaji , Rui Ito , Tetsuro Itakura
发明人： Takafumi Yamaji , Rui Ito , Tetsuro Itakura
IPC分类号： H04Q7/20 , H03F3/45 , H03K9/00 , H04B1/02 , H04B1/10 , H04L27/00
CPC分类号： H03F3/193 , H03F3/45085 , H03F3/45183 , H03F2203/45352
摘要： An amplifier includes an amplification unit which amplify a first difference between first and second input signals, a second difference between second and third input signals and a third difference between third and first input signals by a differential mode gain, and amplify an average of the first, second and third input signal by a common mode gain, for outputting a first output signal corresponding to a sum of the amplified first difference and the amplified average, a second output signal corresponding to a sum of the amplified second difference and the amplified average, and a third output signal corresponding to a sum of the amplified third difference and amplified average; first, second; and a reduction circuit which reduces the common mode gain less than the differential mode gain.
摘要翻译：放大器包括放大单元，其放大第一和第二输入信号之间的第一差值，第二和第三输入信号之间的第二差值以及第三和第一输入信号之间的差分模式增益的第三差值，并放大第一和第二输入信号的平均值通过共模增益输出第二和第三输入信号，用于输出对应于放大的第一差和放大的平均的和的第一输出信号，对应于放大的第二差和放大的平均之和的第二输出信号，以及对应于放大的第三差和放大的平均值之和的第三输出信号; 第一秒; 以及减小电路，其减小小于差分模式增益的共模增益。

7. 发明授权

US07236118B2 Multiple input analog-to-digital conversion apparatus and radio receiver using the same 有权
公开(公告)号：US07236118B2
公开(公告)日：2007-06-26
申请号：US11409569
申请日：2006-04-24
申请人： Daisuke Kurose , Takafumi Yamaji , Tetsuro Itakura
发明人： Daisuke Kurose , Takafumi Yamaji , Tetsuro Itakura
IPC分类号： H03M1/38
CPC分类号： H03M1/123 , H03M1/0695 , H03M1/1205 , H03M1/44
摘要： A multiple input AD conversion apparatus includes a first unit AD converter including a plurality of first conversion stages connected in cascade to convert a first analog input signal to a first digital output signal, a second unit AD converter including a plurality of second conversion stages connected in cascade to convert a second analog input signal to a second digital output signal, and an operational amplifier shared between the first conversion stage and the second conversion stage in a time sharing.

8. 发明授权

US07250895B2 Multiple input analog-to-digital conversion apparatus and radio receiver using the same 有权
标题翻译：多输入模数转换装置和使用其的无线电接收机
公开(公告)号：US07250895B2
公开(公告)日：2007-07-31
申请号：US11409603
申请日：2006-04-24
申请人： Daisuke Kurose , Takafumi Yamaji , Tetsuro Itakura
发明人： Daisuke Kurose , Takafumi Yamaji , Tetsuro Itakura
IPC分类号： H03M1/12
CPC分类号： H03M1/123 , H03M1/0695 , H03M1/1205 , H03M1/44
摘要： A multiple input AD conversion apparatus includes a first unit AD converter including a plurality of first conversion stages connected in cascade to convert a first analog input signal to a first digital output signal, a second unit AD converter including a plurality of second conversion stages connected in cascade to convert a second analog input signal to a second digital output signal, and an operational amplifier shared between the first conversion stage and the second conversion stage in a time sharing.
摘要翻译：多输入AD转换装置包括：第一单元AD转换器，包括级联连接的多个第一转换级，以将第一模拟输入信号转换为第一数字输出信号;第二单元AD转换器，包括多个第二转换级，级联以将第二模拟输入信号转换为第二数字输出信号，以及在时间共享中在第一转换级与第二转换级之间共享的运算放大器。

9. 发明申请

US20070011482A1 Clock generator, radio receiver using the same, function system, and sensing system 审中-公开
标题翻译：时钟发生器，使用相同的无线电接收器，功能系统和传感系统
公开(公告)号：US20070011482A1
公开(公告)日：2007-01-11
申请号：US11438589
申请日：2006-05-22
申请人： Akihide Sai , Takeshi Ueno , Takafumi Yamaji , Tetsuro Itakura
发明人： Akihide Sai , Takeshi Ueno , Takafumi Yamaji , Tetsuro Itakura
IPC分类号： G06F1/00
CPC分类号： H03L7/23 , H03L7/18
摘要： A clock generator having phase locked loops to receive reference signals from a shared reference signal source and generate clock signals differing in frequency, respectively, includes a phase comparator which generates a voltage signal in response to a phase difference between a phase of the reference signal and a phase of a feedback signal, a VCO controlled by a voltage signal from the phase comparator, and a frequency divider group connected in cascade in a feedback loop between an output of the VCO and an input of a feedback signal, and takes out a clock signals from each output of the frequency divider group.
摘要翻译：具有锁相环的时钟发生器分别接收来自共享参考信号源的参考信号并且分别产生频率不同的时钟信号，该相位比较器响应于参考信号的相位和相位差之间的相位差产生电压信号反馈信号的相位，由来自相位比较器的电压信号控制的VCO和在VCO的输出与反馈信号的输入之间的反馈回路中级联连接的分频器组，并且取出时钟来自分频器组的每个输出的信号。

10. 发明授权

US07088278B2 Multiple input analog-to-digital conversion apparatus and radio receiver using the same 有权
标题翻译：多输入模数转换装置和使用其的无线电接收机
公开(公告)号：US07088278B2
公开(公告)日：2006-08-08
申请号：US11088077
申请日：2005-03-23
申请人： Daisuke Kurose , Takafumi Yamaji , Tetsuro Itakura
发明人： Daisuke Kurose , Takafumi Yamaji , Tetsuro Itakura
IPC分类号： H03M1/12
CPC分类号： H03M1/123 , H03M1/0695 , H03M1/1205 , H03M1/44
摘要： A multiple input AD conversion apparatus includes a first unit AD converter including a plurality of first conversion stages connected in cascade to convert a first analog input signal to a first digital output signal, a second unit AD converter including a plurality of second conversion stages connected in cascade to convert a second analog input signal to a second digital output signal, and an operational amplifier shared between the first conversion stage and the second conversion stage in a time sharing.
摘要翻译：多输入AD转换装置包括：第一单元AD转换器，包括级联连接的多个第一转换级，以将第一模拟输入信号转换为第一数字输出信号;第二单元AD转换器，包括多个第二转换级，级联以将第二模拟输入信号转换为第二数字输出信号，以及在时间共享中在第一转换级与第二转换级之间共享的运算放大器。

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