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1. 发明专利

JPS6170877A Solid-state image pickup element 失效
标题翻译：固态图像拾取元件
公开(公告)号：JPS6170877A
公开(公告)日：1986-04-11
申请号：JP19298384
申请日：1984-09-14
申请人： Mitsubishi Electric Corp
发明人： TSUBOUCHI NATSUO , IWADE SHUHEI
IPC分类号： H01L27/14 , H01L27/146 , H04N5/335 , H04N5/357 , H04N5/374
摘要： PURPOSE: To improve effectively the S/N of a solid-state image pickup element by employing a light detection diode, MOS transistor and bipolar transistor as a comprising factor and reading a change in the capacity of the light detection diode as a signal current.
CONSTITUTION: A photodetector 11 is made of silicon p-n joint, and a positive bias voltage is dropped by the light irradiation. The voltage drop is approximately in proportion to the light incident intensity. The voltage is impressed to a vertical scan input terminal 41 and a horizontal scan input terminal 51 to read out an image. A positive voltage for turning on a horizontal MOS transistor 21 and that for turning on a pnp transistor 31 are impressed to a vertical scan input terminal 41 and a horizontal scan input terminal 51, respectively. The condition where the photodetector 11 is discharging due to the light irradiation means a zero voltage, and a charged current flows from the horizontal scan input terminal 51. Said current is amplified by the pnp transistor 31, and outputted to a signal output terminal 71. Plural these basic cells are combined to constitute a two-dimensional solid-state image pickup element.
COPYRIGHT: (C)1986,JPO&Japio
摘要翻译：目的：通过采用光检测二极管，MOS晶体管和双极晶体管作为包含因素并读取光检测二极管的电容变化作为信号电流，有效地提高固态摄像元件的S / N。构成：光检测器11由硅p-n接头制成，并且通过光照射下降正偏压。电压降大致与光入射强度成比例。电压被施加到垂直扫描输入端子41和水平扫描输入端子51以读出图像。用于接通水平MOS晶体管21的正电压和用于导通pnp晶体管31的正电压分别施加到垂直扫描输入端41和水平扫描输入端51。光检测器11由于光照射而放电的状态为零电压，并且从水平扫描输入端51流过充电电流。所述电流由pnp晶体管31放大，并输出到信号输出端71。多个这些基本单元被组合以构成二维固态图像拾取元件。

2. 发明专利

JPS6045056A PHOTO DETECTOR 失效
公开(公告)号：JPS6045056A
公开(公告)日：1985-03-11
申请号：JP15353683
申请日：1983-08-22
申请人： MITSUBISHI ELECTRIC CORP
发明人： TSUBOUCHI NATSUO , YUYA NAOKI
IPC分类号： H01L27/146 , H01L27/144
摘要： PURPOSE:To enable to generate high photocurrent with faint light and a small photo receiving area by optical exposure of part of the first impurity region. CONSTITUTION:The light L of the invisible region generates holes and electrons in silicon. The electrons generated in a photo irradiated region 16 by irradiation of the optically exposed region 16 of the first impurity region 12 with the light L are collected to the plus charged second impurity region 13, and the holes flow to a semiconductor substrate 11. The holes flowing into this substrate 11 are amplified, and the inflow of electrons generates from the substrate 11 to the impurity region 12 and is further collected to the impurity region 13. The charges of the region 13 are rapidly discharged, and the discharged charges are charged from the third impurity region 14 by application of readout pulses on a gate electrode 15 at the time of readout of this photo charge. Then, this charged charge is observed as the photo signal.

3. 发明专利

JPS58142579A MOS TRANSISTOR 失效
公开(公告)号：JPS58142579A
公开(公告)日：1983-08-24
申请号：JP2640282
申请日：1982-02-18
申请人： MITSUBISHI ELECTRIC CORP
发明人： TSUBOUCHI NATSUO , HINE SHIROU
IPC分类号： H01L29/78 , H01L21/768 , H01L23/522 , H01L29/417
摘要： PURPOSE:To reduce a parasitic capacitance for semiconductor substrate in the source region and drain region by employing the structure where an inter-layer insulating film is provided between the source electrode wiring and drain electrode wiring. CONSTITUTION:An inter-layer insulating film 6b is provided between a source electrode wiring 8a and drain electrode wiring 8b. According to this structure, the wirings 8a and 8b can be stacked and therefore there is no need of keeping distance for insulation between the wirings 8a and 8b. Accordingly, the gate lengths L of the n type source region 2a, n type drain region 2b and the gate electrode 4 can be minimized. Thereby, when this n type MOS FET is used for read transistor of dinamic RAM, a parasitic capacitance for the p type Si substrate 1 of the regions 2a, 2b which will cause a soft error can be reduced. Moreover, a transconductance can also be increased.

4. 发明专利

JPS5825258A COMPLEMENTARY MOS IC 失效
公开(公告)号：JPS5825258A
公开(公告)日：1983-02-15
申请号：JP12490381
申请日：1981-08-07
申请人： MITSUBISHI ELECTRIC CORP
发明人： TSUBOUCHI NATSUO , NAGAO SHIGEO
IPC分类号： H01L21/8238 , H01L27/092 , H01L29/78
摘要： PURPOSE:To prevent spiking of wiring metal into a semiconductor substrate by enlarging the joining depth of the part of junction of one diffused layer with the metal without increasing the number of masks in CMOSIC having a minute structure with multi-layer metal wirings. CONSTITUTION:P- and n-channel MOSFETs are made in a P type Si substrate 1. Next, a window is opened selectively in shallow n layers 3 of the source and drain of the n-channel MOS, and a deep junction having the depth of about 1mum is made locally by the injection of phosphorus and heat treatment. Then, gate electrodes 6 are provided on a gate insulation film, insulation coating is applied thereto, and the first wiring layers 7 of Al or AlSi are provided thereon and covered with Si3N48. Connection holes are made in the film 8 by CF4 plasma, windows are opened in SiO2 5 by C2F8 plasma, and the second metal wirings 9 are given to a p layers 4. According to this constitution, the p layers 4 wherein B is diffused have deeper junctions than the n layers even in the case of minute CMOS. In addition, Al, wiring material, is a p type impurity, and therefore, the problem of spiking is not so serious as in an n type impurity.

5. 发明专利

JPS57134972A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS57134972A
公开(公告)日：1982-08-20
申请号：JP2115481
申请日：1981-02-13
申请人： MITSUBISHI ELECTRIC CORP
发明人： SATOU SHINICHI , TSUBOUCHI NATSUO , KINOSHITA SHIGEJI , OOHAYASHI YOSHIKAZU , DENDA MASAHIKO
IPC分类号： H01L29/78
摘要： PURPOSE:To suppress the short-channel effect of an MOS transistor and enable high-speed operation, by contriving a cross section of source-drain diffusion layer. CONSTITUTION:An MOS transistor provides source and drain diffusion layers 2a, 2b, a gate electrode 3, and a gate oxide film 4 on a semiconductor substrate 1. A source and a drain are diffused doubly in it. A cross section of diffusions 2a', 2b' in contact with a channel region is formed to deepen gradually and continuously from the channel region 5. And a channel length (b) between the deeper diffusions and a channel length (c) between the shallower diffusions in contact with the channel region 5 are obtained. Their relationship is b>c. This establishes the channel lengths (b) and (c) independently. The stabilization of threshold voltage and high-speedness can be achieved simultaneously.

6. 发明专利

JPS57125824A Schottky photodetector 失效
标题翻译：肖特光电
公开(公告)号：JPS57125824A
公开(公告)日：1982-08-05
申请号：JP1333181
申请日：1981-01-29
申请人： Mitsubishi Electric Corp
发明人： DENDA MASAHIKO , KIMATA MASAAKI , HIRATA KATSUHIRO , TSUBOUCHI NATSUO , UEMATSU SHIGEYUKI
IPC分类号： G01J1/02 , H01L31/108
CPC分类号： H01L31/108
摘要： PURPOSE:To improve the detection sensitivity, by providing a metal-side lead so that this lead is connected to a metal-side electrode of the Schottky junction due to the junction between a metal or a metallic silicide and silicon only in the peripheral part of the Schottky junction. CONSTITUTION:A metal or a metallic silicide is vapor-deposited on a silicon substrate 1 to form a metal-side electrode 2 of the Schottky junction. A metal-side lead 7 consisting of an aluminum layer is formed so that this lead 7 is connected to the metal-side electrode 2 only in the peripheral part of this electrode 2, and an insulating layer 8 consisting of a silicon nitride film is provided on the electrode 2. When infrared-rays are irradiated from under the silicon substrate 1, they permeate the substrate 1 and reach the Schottky junction. Though positive holes which are formed in the metal-side electrode 2 and are diffused to reach the junction traverse the barrier and are injected to the silicon substrate 1, the diffusion length is shortened because the metal-side lead 7 is connected to the metal-side electrode 2 of the Schottky junction only in the peripherl part of the Schottky junction, and thus, the loss due to recombination is reduced, and a photocurrent is flowed efficiently, and the detection sensitivity is improved.
摘要翻译：目的：为了提高检测灵敏度，通过提供金属侧引线，使得该引线由于金属或金属硅化物与硅之间的接合而连接到肖特基结的金属侧电极，仅在外围部分肖特基结。构成：将金属或金属硅化物气相沉积在硅衬底1上以形成肖特基结的金属侧电极2。形成由铝层构成的金属侧引线7，使得该引线7仅在该电极2的周边部分与金属侧电极2连接，由氮化硅膜构成的绝缘层8 在从硅衬底1下面照射红外线时，它们渗透衬底1并到达肖特基结。虽然在金属侧电极2中形成并扩散到达结的空穴穿过势垒并被注入到硅衬底1中，但是由于金属侧引线7连接到金属侧电极2，所以扩散长度被缩短，肖特基结的侧面电极2仅在肖特基结的外围部分，因此，由于复合导致的损耗降低，并且光电流被有效地流动，并且提高了检测灵敏度。

7. 发明专利

JPS5732651A Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：JPS5732651A
公开(公告)日：1982-02-22
申请号：JP10854680
申请日：1980-08-04
申请人： Mitsubishi Electric Corp
发明人： KINOSHITA SHIGEJI , DENDA MASAHIKO , OOHAYASHI YOSHIKAZU , TSUBOUCHI NATSUO , SATOU SHINICHI
IPC分类号： H01L29/78 , H01L21/76 , H01L21/761 , H01L21/8234 , H01L27/06
CPC分类号： H01L21/761
摘要： PURPOSE:To form the semiconductor device having high reliability, which causes no malfunction due to a small number of carriers, by forming a semiconductor layer with the low concentration of impurities on a semiconductor substrate with the high concentration of impurities and shaping a region with the high concentration of impurities reaching the substrate. CONSTITUTION:The P type Si epitaxial layer 2 with approximately 10OMEGAcm is grown on the P type Si substrate 1 with approximately 0.05OMEGAcm resistivity by 5mum, the regions 3 with the high concentration of impurities reaching the substrate are formed selectively through ion injection or oxidation diffusion and the separated insular regions are shaped, and a circuit element is molded to the region. Accordingly, malfunction due to a small number of carriers generated in the substrate through alpha-rays or impact ionization can be prevented because the diffusion in the lateral direction of a small number of carriers is suppressed by the region with the high concentration of impurities.
摘要翻译：目的：为了形成具有高可靠性的半导体器件，通过在半导体衬底上形成杂质浓度低的半导体层，通过在半导体衬底上形成杂质浓度低的半导体层，由于少量的载流子而不产生故障，高浓度杂质到达底物。构成：具有约10OMEGAcm的P型Si外延层2在P型Si衬底1上以约0.05MΩ·cm的电阻率生长5μm，通过离子注入或氧化扩散选择性地形成具有高浓度杂质的区域3 并且分离的岛状区域成形，并且电路元件被模制到该区域。因此，可以防止由于通过α射线或冲击电离在基板中产生的少量载流子导致的故障，因为通过具有高浓度杂质的区域抑制少量载流子在横向上的扩散。

8. 发明专利

JPS56162827A VAPOR PHASE GROWING APPARATUS 失效
公开(公告)号：JPS56162827A
公开(公告)日：1981-12-15
申请号：JP6751280
申请日：1980-05-19
申请人： MITSUBISHI ELECTRIC CORP
发明人： TSUBOUCHI NATSUO , WAKAMIYA WATARU , KINOSHITA SHIGEJI , HARADA HIROJI , NOMOTO SUMIO
IPC分类号： C23C16/44 , H01L21/205 , H01L21/31
摘要： PURPOSE:To prevent the occurrence of unnecessary product due to the reaction with outer atmospheric air by providing a vacuum evacuating pipe which covers the outer periphery of the gas supplying pipe of a vapor growing apparatus to shield the gas supplying pipe from the outer atmospheric air. CONSTITUTION:A vaccum evacuating pipe 12 is so provided as to cover the outer periphery of the gas supplying pipe 4 of a vapor growing apparatus which has gas supply sources 5, 6, a reaction pipe 1 and a gas supplying pipe 4 to evacuate through a valve 3d, and the pipe 4 is shielded from the atmospheric air. Thus, when the pipe 4 is leaked, the substance in the outer atmospheric air is prevented from being reacted with the reaction gas, thereby eliminating unnecessary product.

9. 发明专利

JPS56158467A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS56158467A
公开(公告)日：1981-12-07
申请号：JP6431080
申请日：1980-05-12
申请人： MITSUBISHI ELECTRIC CORP
发明人： TSUBOUCHI NATSUO , ABE HARUHIKO , HARADA HIROJI
IPC分类号： H01L27/00 , H01L21/60 , H01L21/822 , H01L23/556 , H01L27/04 , H01L27/10
摘要： PURPOSE:To prevent the generation of a soft error caused by alpha rays by a method wherein the first element having a contact region inside a bonding pad and the second element having a contact region on the circumferential section are faced each other and their contact regions are connected and coupled. CONSTITUTION:A contact region 4 consisting of copper plating is provided on the inside of the bonding pad 2 on the first element 1. After a contact region 7 has been provided on the circumferential section of the second element 6, a connecting material 8 consisting of a solder ball is formed on the contact region 7. Then, the first and the second elements are faced each other, are arranged in such manner that the contact region 4 and the connecting material 8 are coincided, a heat treatment is performed and then a welding and a coupling works are performed. After the composite element has been fusion welded on a supporting base 5, the element is connected to a package using a wire 3. Through these procedures, the circuit on the elements can be shielded using the substrate sections of both elements and the generation of the soft error caused by the alpha rays of an MOS dynamic memory can be prevented.

10. 发明专利

JPS5679450A ELECTRODE AND WIRING OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS5679450A
公开(公告)日：1981-06-30
申请号：JP15650679
申请日：1979-11-30
申请人： MITSUBISHI ELECTRIC CORP
发明人： TSUBOUCHI NATSUO , ABE HARUHIKO , NAGATOMO MASAO , HARADA HIROJI , MIHASHI JIYUNICHI
IPC分类号： H01L29/78 , H01L21/3205 , H01L23/482 , H01L23/52 , H01L29/45
摘要： PURPOSE:To lower the resistivity of an electrode and a wiring by sandwitching a high-melting point metal layer made of Mo, W or the like with two layers of polycrystalline Si while Ti layer is interposed therebetween for better adhesivity when the electrode or the wiring of a semiconductor device is formed. CONSTITUTION:When an electrode or a wiring is formed on a ground substrate 1, initially a polycrystalline Si layer 2 is entirely grown in the gaseous phase and then, a Ti layer 3 is applied thereon. Then, a Mo layer 4 and again a Ti layer 5 are formed on the layer 3 and then a polycrystalline Si layer 6 is grown in the gaseous phase on the top-most layer. Thereafter, with a resist as mask, the layers are treated in a gas plasma of CF4 by photolithography to remove unnecessary parts selectively. In this manner, the resistivity of the electrode wiring can be lowered employing the doping of impurities and a well self-matching polycrystalline Si. Or it may be accepted to wrap the polycrystaline Si with these high-melting point metals.

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