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1. 发明申请

WO2010005695A1 PROGRAMMABLE CYCLE STATE MACHINE INTERFACE 审中-公开
标题翻译：可编程循环状态机界面
公开(公告)号：WO2010005695A1
公开(公告)日：2010-01-14
申请号：PCT/US2009/047335
申请日：2009-06-15
申请人： MICROCHIP TECHNOLOGY INCORPORATED , SAMUEL, Roshan
发明人： SAMUEL, Roshan
IPC分类号： G06F13/12 , G09G3/20 , G09G5/395 , G09G5/00 , G06F3/147
CPC分类号： G06F13/122
摘要： A programmable cycle state machine interface to a microcontroller comprising a programmable cycle state machine, a first and second data bus, a first and second control output, and a control input for programming the cycle of the state machine. The programmable nature of the state machine allows for design and implementation changes without the need to redesign customized state machine logic on the microcontroller.
摘要翻译：包括可编程周期状态机，第一和第二数据总线，第一和第二控制输出的微控制器的可编程循环状态机接口以及用于对状态机的循环进行编程的控制输入。状态机的可编程性能允许设计和实现变化，而无需在微控制器上重新设计定制的状态机逻辑。

2. 发明申请

WO2016209866A1 INDEPENDENT UART BRK DETECTION 审中-公开
标题翻译：独立的UART BRK检测
公开(公告)号：WO2016209866A1
公开(公告)日：2016-12-29
申请号：PCT/US2016/038623
申请日：2016-06-22
申请人： MICROCHIP TECHNOLOGY INCORPORATED
发明人： SAMUEL, Roshan
IPC分类号： G06F13/42
CPC分类号： H04L7/0012 , G06F13/4295 , H04L7/005 , H04L41/0681 , H04L43/16 , H04L69/28
摘要： A universal asynchronous receiver/transmitter (UART) module is disclosed. The UART module may include a receiver unit being clocked by a programmable receiver clock configured to sample an incoming data signal and comprising a counter clocked by said receiver clock, wherein the counter is reset to start counting with every falling edge of the data signal and to trigger a BRK detection signal if the counter reaches a programmable threshold value.
摘要翻译：公开了一种通用异步收发器（UART）模块。 UART模块可以包括由可编程接收器时钟计时的接收器单元，该可编程接收机时钟被配置为对输入数据信号进行采样并且包括由所述接收器时钟计时的计数器，其中计数器被复位以开始计数，并且数据信号的每个下降沿开始计数，如果计数器达到可编程阈值，则触发BRK检测信号。

3. 发明申请

WO2014160375A1 BOOT SEQUENCING FOR MULTI BOOT DEVICES 审中-公开
标题翻译：多引擎设备的引导排序
公开(公告)号：WO2014160375A1
公开(公告)日：2014-10-02
申请号：PCT/US2014/026424
申请日：2014-03-13
申请人： MICROCHIP TECHNOLOGY INCORPORATED
发明人： SAMUEL, Roshan , PESAVENTO, Rodney , WOJEWODA, Igor
IPC分类号： G06F9/44
CPC分类号： G06F9/441 , G06F9/4408
摘要： A multi-boot device capable of booting from a plurality of boot devices, each storing a boot image. The multi-boot device determines which boot device to load based on sequence numbers assigned to each of the boot devices. Some embodiments will make this determination using only hardware operations. The multi-boot device compares the sequence numbers of the available boot devices in order to determine the boot image to be loaded. The address of the selected boot image is then mapped to the device's default boot vector. The remaining images are likewise mapped to a secondary boot memory. The device then boots from the default boot vector. The user can change the boot device to be loaded by modifying one or more of the boot sequence numbers. The boot images can be updated without resetting the device by switching execution to and from boot images in the secondary boot memory.
摘要翻译：一种能够从多个引导设备引导的多引导设备，每个引导设备存储引导映像。多引导设备基于分配给每个引导设备的序列号确定要加载的引导设备。一些实施例将仅使用硬件操作进行该确定。多引导设备比较可用引导设备的序列号，以确定要加载的引导映像。然后将所选引导映像的地址映射到设备的默认引导向量。其余图像同样映射到辅助引导存储器。然后，设备将从默认启动向量启动。用户可以通过修改一个或多个引导序列号来更改要加载的引导设备。可以更新引导映像，而不需要通过切换第二引导存储器中的引导映像的执行来重置设备。

4. 发明申请

WO2014149583A1 MINIMIZING SWITCHOVER TIME DURING OPERATING SYSTEM KERNEL UPDATE IN A HOT SWAPPABLE PROGRAM MEMORY 审中-公开
标题翻译：操作系统中最小化切换时间KERNEL更新在热插拔程序存储器
公开(公告)号：WO2014149583A1
公开(公告)日：2014-09-25
申请号：PCT/US2014/019737
申请日：2014-03-01
申请人： MICROCHIP TECHNOLOGY INCORPORATED
发明人： SIMMONS, Michael , WOJEWODA, Igor , SAMUEL, Roshan
IPC分类号： G06F9/445 , G06F9/44
CPC分类号： G06F1/24 , G06F8/656 , G06F9/4401 , G06F9/4406 , G06F9/4411 , G06F9/44505
摘要： A method for hot swapping an operating system kernel in a system, wherein the system comprises a central processing unit, one or more system components and a program memory including an old kernel and a new kernel, the method comprising: - configuring, by the old kernel, the system to boot from the new kernel by branching into a suitable entry point in the new kernel; - identifying, by the new kernel, one or more system components which require a reinitialization or reset; - further executing the new kernel in order to reinitialize or reset the one or more system components.
摘要翻译：一种用于热交换系统中的操作系统内核的方法，其中所述系统包括中央处理单元，一个或多个系统组件以及包括旧内核和新内核的程序存储器，所述方法包括： - 由旧的内核，系统通过分支到新内核中的合适入口点从新内核引导; - 由新内核识别需要重新初始化或重置的一个或多个系统组件; - 进一步执行新内核以重新初始化或重置一个或多个系统组件。

5. 发明申请

WO2010144539A1 PROGRAMMABLE CRC UNIT 审中-公开
标题翻译：可编程CRC单元
公开(公告)号：WO2010144539A1
公开(公告)日：2010-12-16
申请号：PCT/US2010/037913
申请日：2010-06-09
申请人： MICROCHIP TECHNOLOGY INCORPORATED , BOMMENA, Sudhir , WOJEWODA, Igor , YUENYONGSGOOL, Yong , DUBEY, Vijay , SAMUEL, Roshan , IVEY, Jonathan, Brant
发明人： BOMMENA, Sudhir , WOJEWODA, Igor , YUENYONGSGOOL, Yong , DUBEY, Vijay , SAMUEL, Roshan , IVEY, Jonathan, Brant
IPC分类号： H03M13/09
CPC分类号： H03M13/09 , H03M13/6516 , H03M13/6569
摘要： A cyclic redundancy check (CRC) unit has a programmable CRC engine, a variable buffer memory operable to store k words wherein each word comprises n-bits, wherein k and n can be varied, and shift logic operable to shift data from said FIFO memory into said programmable CRC engine.
摘要翻译：循环冗余校验（CRC）单元具有可编程CRC引擎，可操作地存储k个字的可变缓冲存储器，其中每个字包括n位，其中k和n可以改变，并且移位逻辑可操作以从所述FIFO存储器进入可编程CRC引擎。

6. 发明申请

WO2010056507A1 MICROCONTROLLER WITH INTEGRATED GRAPHICAL PROCESSING UNIT 审中-公开
标题翻译：具有集成图形处理单元的微控制器
公开(公告)号：WO2010056507A1
公开(公告)日：2010-05-20
申请号：PCT/US2009/062157
申请日：2009-10-27
申请人： MICROCHIP TECHNOLOGY INCORPORATED , SAMUEL, Roshan , JULICHER, Joseph
发明人： SAMUEL, Roshan , JULICHER, Joseph
IPC分类号： G06F15/78 , G09G3/36 , G09G5/36
CPC分类号： G06F15/7842 , G06F3/14 , G09G3/3622 , G09G5/363
摘要： A microcontroller with an integrated special instruction processing unit and a programmable cycle state machine. The special instruction processing unit allows offloading of intensive processing of output data and the programmable cycle state machine minimizes the amount of customized, off chip circuitry necessary to connect the microcontroller to an external display.
摘要翻译：具有集成特殊指令处理单元和可编程循环状态机的微控制器。特殊指令处理单元允许卸载输出数据的密集处理，并且可编程循环状态机使得将微控制器连接到外部显示器所需的定制的关断电路的量最小化。

7. 发明申请

WO2022081687A1 SYSTEM WITH INCREASING PROTECTED STORAGE AREA AND ERASE PROTECTION 审中-公开
公开(公告)号：WO2022081687A1
公开(公告)日：2022-04-21
申请号：PCT/US2021/054754
申请日：2021-10-13
申请人： MICROCHIP TECHNOLOGY INCORPORATED
发明人： SAMUEL, Roshan , PFEIFER, Erick , DAY, John , UJVARI, Daniel
IPC分类号： G06F12/02 , G06F12/14 , G06F21/62 , G06F21/56 , G06F21/80
摘要： An apparatus may include a processor. The apparatus may include a memory communicatively coupled to the processor. The apparatus may include a memory control circuit (MCC). The MCC may be configured to define a protected portion of the memory, wherein the protected portion of the memory is configured for read-only access by the processor, increase a size of the protected portion of the memory, and, after the increase in size of the protected portion of the memory, prevent decreases of the size of the protected portion of the memory.

8. 发明申请

WO2016209861A1 UART WITH LINE ACTIVITY DETECTOR 审中-公开
标题翻译： UART与线路活动检测器
公开(公告)号：WO2016209861A1
公开(公告)日：2016-12-29
申请号：PCT/US2016/038614
申请日：2016-06-22
申请人： MICROCHIP TECHNOLOGY INCORPORATED
发明人： SAMUEL, Roshan
IPC分类号： G06F13/42
CPC分类号： H04L27/2647 , G06F13/4295 , H04B1/16 , H04L25/069
摘要： A universal asynchronous receiver/transmitter (UART) module is disclosed. The UART module may include an edge detector coupled with a data line of the UART module, wherein the edge detector resets a counter on a rising and a falling edge.
摘要翻译：公开了一种通用异步收发器（UART）模块。 UART模块可以包括与UART模块的数据线相连的边缘检测器，其中边沿检测器在上升沿和下降沿复位计数器。

9. 发明申请

WO2016205776A1 UART WITH AUTOMATED PROTOCOLS 审中-公开
标题翻译： UART与自动协议
公开(公告)号：WO2016205776A1
公开(公告)日：2016-12-22
申请号：PCT/US2016/038312
申请日：2016-06-20
申请人： MICROCHIP TECHNOLOGY INCORPORATED
发明人： SAMUEL, Roshan , ABEROUETTE, Janmichael , BROWN, Ward R. , DESAI, Chintan , IVEY, Brant , DOCHIA, Razvan
IPC分类号： G06F13/42
CPC分类号： G06F13/426 , G06F13/385 , G06F13/4295
摘要： A universal asynchronous receiver/transmitter (UART) interface is disclosed. The UART interface may include a configurable asynchronous receiver and transmitter unit; and a configurable state machine, wherein the state machine allows configuration of the receiver and transmitter unit to support various baud rates and provide for start bit and stop bit configuration, wherein the state machine is further configurable to automatically support a plurality of communication protocols.
摘要翻译：公开了一种通用异步收发器（UART）接口。 UART接口可以包括可配置的异步接收器和发射器单元; 以及可配置状态机，其中所述状态机允许所述接收器和发射器单元的配置以支持各种波特率并提供起始位和停止位配置，其中所述状态机还可配置为自动支持多个通信协议。

10. 发明公开

EP2972820A1 MINIMIZING SWITCHOVER TIME DURING OPERATING SYSTEM KERNEL UPDATE IN A HOT SWAPPABLE PROGRAM MEMORY 有权
标题翻译：尽量减少开关时间内操作系统CORE LAST在程序存储器具有热交换功能
公开(公告)号：EP2972820A1
公开(公告)日：2016-01-20
申请号：EP14712849.0
申请日：2014-03-01
申请人： Microchip Technology Incorporated
发明人： SIMMONS, Michael , WOJEWODA, Igor , SAMUEL, Roshan
IPC分类号： G06F9/445 , G06F9/44
CPC分类号： G06F1/24 , G06F8/656 , G06F9/4401 , G06F9/4406 , G06F9/4411 , G06F9/44505
摘要： A method for hot swapping program code includes defining a predetermined range of new code from which to execute; identifying from the new code one or more system components which require a reinitialization or reset; reinitializing or resetting the one or more system components; and executing the new code.

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