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    • 3. 发明申请
    • MAINTAINING INPUT AND/OR OUTPUT CONFIGURATION AND DATA STATE DURING AND WHEN COMING OUT OF A LOW POWER MODE
    • 维持输入和/或输出配置和数据状态在低功耗模式下
    • WO2008073883A2
    • 2008-06-19
    • PCT/US2007/086963
    • 2007-12-10
    • MICROCHIP TECHNOLOGY INCORPORATEDSIMMONS, MichaelWOJEWODA, Igor
    • SIMMONS, MichaelWOJEWODA, Igor
    • H03K19/00
    • G06F1/3203G06F1/24
    • A semiconductor integrated circuit device upon exiting from a low power mode, wakes up and re-initializes logic circuits so as to restore previous logic states of internal registers without disturbing input-output (I/O) configuration control and data states present at the time the low power mode was entered. Thus not distributing the operation of other devices connected to the semiconductor integrated circuit device previously in the low power mode. Once all internal logic and registers of the semiconductor integrated circuit device have been re-initialized, a "low power state wake-up and restore" signal may issue. This signal indicates that the I/O configuration control and data states stored in the I/O keeper cell at the time the integrated circuit device entered into the low power mode have been reinstated and control may be returned to the logic circuits and/or internal registers of the semiconductor integrated circuit device.
    • 半导体集成电路器件在从低功率模式退出时,唤醒并重新初始化逻辑电路,以便恢复内部寄存器的先前逻辑状态,而不会干扰当前存在的输入输出(I / O)配置控制和数据状态 输入低功耗模式。 因此,在低功率模式下,不能分配连接到半导体集成电路器件的其它器件的操作。 一旦半导体集成电路器件的所有内部逻辑和寄存器被重新初始化,就可能发出“低功率状态唤醒和恢复”信号。 该信号表示在集成电路器件进入低功率模式时存储在I / O保持器单元中的I / O配置控制和数据状态已被恢复,并且可以将控制返回到逻辑电路和/或内部 半导体集成电路器件的寄存器。
    • 9. 发明申请
    • LOW POWER MODE FAULT RECOVERY APPARATUS AND METHOD THEREFOR
    • 低功耗模式故障恢复装置及其方法
    • WO2008118933A1
    • 2008-10-02
    • PCT/US2008/058196
    • 2008-03-26
    • MICROCHIP TECHNOLOGY INCORPORATEDSIMMONS, Michael
    • SIMMONS, Michael
    • G06F11/16G06F1/32
    • G06F1/3203G06F11/167
    • A semiconductor integrated circuit device uses two keeper cells per configuration and/or enable bit as dual redundant storage with error detection thereof. One of the two keeper cells stores a logic level and the other keeper cell stores the inverse of that logic level before the integrated circuit device goes into a low power mode. An exclusive OR (XOR) is performed on the outputs of the two keeper cells (a keeper cell pair) such that if the two keeper cells of the keeper cell pair do not have opposite logic levels stored therein, then the respective XOR outputs an error signal for that keeper cell pair and the error signal is used to force the integrated circuit device out of the low power mode, depending on software control, with or without disturbing input-output (I/O) configuration control and data states present at the time the low power mode was entered.
    • 半导体集成电路器件每个配置使用两个保持器单元和/或使能位作为具有错误检测的双冗余存储器。 两个保持单元之一存储逻辑电平,另一个保持单元在集成电路器件进入低功率模式之前存储该逻辑电平的倒数。 对两个保持单元(保持单元对)的输出执行异或(XOR),使得如果保持单元对的两个保持单元不具有存储在其中的相反逻辑电平,则相应的异或输出错误 根据软件控制,使用该保持单元对的信号和误差信号强制集成电路设备脱离低功耗模式,具有或不具有干扰输入输出(I / O)配置控制和存在于 时间输入低功耗模式。