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1. 发明申请

US20050164517A1 In-situ-etch-assisted HDP deposition using SiF4 失效
标题翻译：使用SiF4进行原位蚀刻辅助HDP沉积
公开(公告)号：US20050164517A1
公开(公告)日：2005-07-28
申请号：US11089874
申请日：2005-03-25
申请人： M. Karim , DongQing Li , Jeong Byun , Thanh Pham
发明人： M. Karim , DongQing Li , Jeong Byun , Thanh Pham
IPC分类号： C23C16/04 , C23C16/40 , C23C16/50 , H01L21/316 , H01L21/31 , H01L21/469
CPC分类号： C23C16/402 , C23C16/045 , H01L21/02164 , H01L21/02274 , H01L21/31612 , H01L21/76837
摘要： A process is provided for depositing an undoped silicon oxide film on a substrate disposed in a process chamber. A process gas that includes SiF4, a fluent gas, a silicon source, and an oxidizing gas reactant is flowed into the process chamber. A plasma having an ion density of at least 1011 ions/cm3 is formed from the process gas. The undoped silicon oxide film is deposited over the substrate with the plasma using a process that has simultaneous deposition and sputtering components.
摘要翻译：提供了一种用于在设置在处理室中的衬底上沉积未掺杂的氧化硅膜的工艺。包括SiF 4 N，流动气体，硅源和氧化性气体反应物的工艺气体流入处理室。从处理气体形成离子密度为至少10 11个/ cm 3的等离子体。使用具有同时沉积和溅射组分的工艺，用等离子体在衬底上沉积未掺杂的氧化硅膜。

2. 发明申请

US20060166515A1 In-situ-etch-assisted HDP deposition 失效
标题翻译：原位蚀刻辅助HDP沉积
公开(公告)号：US20060166515A1
公开(公告)日：2006-07-27
申请号：US11388657
申请日：2006-03-24
申请人： M. Karim , DongQing Li , Jeong Byun , Thanh Pham
发明人： M. Karim , DongQing Li , Jeong Byun , Thanh Pham
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： C23C16/402 , C23C16/045 , H01L21/02164 , H01L21/02274 , H01L21/31612 , H01L21/76837
摘要： A process is provided for depositing an silicon oxide film on a substrate disposed in a process chamber. A process gas that includes a halogen source, a fluent gas, a silicon source, and an oxidizing gas reactant is flowed into the process chamber. A plasma having an ion density of at least 1011 ions/cm3 is formed from the process gas. The silicon oxide film is deposited over the substrate with a halogen concentration less than 1.0%. The silicon oxide film is deposited with the plasma using a process that has simultaneous deposition and sputtering components. The flow rate of the halogen source to the process chamber to the flow rate of the silicon source to the process chamber is substantially between 0.5 and 3.0.
摘要翻译：提供了一种在设置在处理室中的衬底上沉积氧化硅膜的工艺。包括卤素源，流动气体，硅源和氧化性气体反应物的处理气体流入处理室。从处理气体形成离子密度为至少10×10 6离子/ cm 3的等离子体。氧化硅膜以低于1.0％的卤素浓度沉积在衬底上。使用具有同时沉积和溅射组分的工艺，用等离子体沉积氧化硅膜。卤素源到处理室的流速与硅源到处理室的流速基本上在0.5和3.0之间。

3. 发明申请

US20050048801A1 In-situ-etch-assisted HDP deposition using SiF4 and hydrogen 有权
标题翻译：使用SiF4和氢进行原位蚀刻辅助的HDP沉积
公开(公告)号：US20050048801A1
公开(公告)日：2005-03-03
申请号：US10655230
申请日：2003-09-03
申请人： M. Karim , DongQing Li , Jeong Byun , Thanh Pham
发明人： M. Karim , DongQing Li , Jeong Byun , Thanh Pham
IPC分类号： C23C16/04 , C23C16/40 , C23C16/50 , H01L21/316 , H01L21/31 , H01L21/469
CPC分类号： C23C16/402 , C23C16/045 , H01L21/02164 , H01L21/02274 , H01L21/31612 , H01L21/76837
摘要： A process is provided for depositing an undoped silicon oxide film on a substrate disposed in a process chamber. A process gas that includes SiF4, H2, a silicon source, and an oxidizing gas reactant is flowed into the process chamber. A plasma having an ion density of at least 1011 ions/cm3 is formed from the process gas. The undoped silicon oxide film is deposited over the substrate with the plasma using a process that has simultaneous deposition and sputtering components. A temperature of the substrate during such depositing is greater than 450° C.
摘要翻译：提供了一种用于在设置在处理室中的衬底上沉积未掺杂的氧化硅膜的工艺。包括SiF4，H2，硅源和氧化性气体反应物的工艺气体流入处理室。从工艺气体形成具有至少10 11 / cm 3离子密度的等离子体。使用具有同时沉积和溅射组分的工艺，用等离子体在衬底上沉积未掺杂的氧化硅膜。在这种沉积过程中，衬底的温度大于450℃

4. 发明申请

US20050277257A1 Gap filling with a composite layer 失效
标题翻译：间隙填充复合层
公开(公告)号：US20050277257A1
公开(公告)日：2005-12-15
申请号：US10857829
申请日：2004-06-01
申请人： Jeong Byun , Zheng Yuan , Shankar Venkataraman , M. Karim , Thanh Pham , Ellie Yieh
发明人： Jeong Byun , Zheng Yuan , Shankar Venkataraman , M. Karim , Thanh Pham , Ellie Yieh
IPC分类号： H01L21/76 , H01L21/762
CPC分类号： H01L21/76224
摘要： A method of filling a gap formed between adjacent raised surfaces on a substrate. In one embodiment the method comprises depositing a boron-doped silica glass (BSG) layer over the substrate to partially fill the gap using a thermal CVD process; exposing the BSG layer to a steam ambient at a temperature above the BSG layer's Eutectic temperature; removing an upper portion of the BSG layer by exposing the layer to a fluorine-containing etchant; and depositing an undoped silica glass (USG) layer over the BSG layer to fill the remainder of the gap.
摘要翻译：填充在基板上相邻的凸起表面之间形成的间隙的方法。在一个实施例中，该方法包括在衬底上沉积硼掺杂石英玻璃（BSG）层，以使用热CVD工艺部分填充间隙; 在高于BSG层的共晶温度的温度下将BSG层暴露于蒸汽环境; 通过将层暴露于含氟蚀刻剂来除去BSG层的上部; 以及在BSG层上沉积未掺杂的二氧化硅玻璃（USG）层以填补间隙的剩余部分。

5. 发明授权

US08993453B1 Method of fabricating a nonvolatile charge trap memory device 有权
标题翻译：制造非易失性电荷陷阱存储器件的方法
公开(公告)号：US08993453B1
公开(公告)日：2015-03-31
申请号：US13620071
申请日：2012-09-14
申请人： Krishnaswamy Ramkumar , Jeong Byun , Sagy Levy
发明人： Krishnaswamy Ramkumar , Jeong Byun , Sagy Levy
IPC分类号： H01L21/31
CPC分类号： H01L21/28282 , H01L21/3144 , H01L21/3145 , H01L29/4234 , H01L29/66833
摘要： A method for fabricating a nonvolatile charge trap memory device and the device are described. In one embodiment, the method includes providing a substrate in an oxidation chamber, wherein the substrate comprises a first exposed crystal plane and a second exposed crystal plane, and wherein the crystal orientation of the first exposed crystal plane is different from the crystal orientation of the second exposed crystal plane. The substrate is then subjected to a radical oxidation process to form a first portion of a dielectric layer on the first exposed crystal plane and a second portion of the dielectric layer on the second exposed crystal plane, wherein the thickness of the first portion of the dielectric layer is approximately equal to the thickness of the second portion of the dielectric layer.
摘要翻译：描述了一种用于制造非易失性电荷陷阱存储器件及其装置的方法。在一个实施例中，该方法包括在氧化室中提供衬底，其中衬底包括第一暴露的晶体面和第二暴露的晶面，并且其中第一暴露的晶面的晶体取向不同于第二次暴露的晶面。然后对基板进行自由基氧化处理，以在第一暴露的晶面上形成电介质层的第一部分，在第二暴露的晶面上形成电介质层的第二部分，其中电介质的第一部分的厚度层大致等于电介质层的第二部分的厚度。

6. 发明授权

US08592891B1 Methods for fabricating semiconductor memory with process induced strain 有权
标题翻译：用工艺诱导应变制造半导体存储器的方法
公开(公告)号：US08592891B1
公开(公告)日：2013-11-26
申请号：US13539463
申请日：2012-07-01
申请人： Igor Polishchuk , Sagy Levy , Krishnaswamy Ramkumar , Jeong Byun
发明人： Igor Polishchuk , Sagy Levy , Krishnaswamy Ramkumar , Jeong Byun
IPC分类号： H01L29/76
CPC分类号： H01L29/4234 , H01L21/28282 , H01L29/513 , H01L29/518 , H01L29/66833 , H01L29/792
摘要： A semiconductor device and method of fabricating the same are provided. In one embodiment, the semiconductor device includes a memory transistor with an oxide-nitride-nitride-oxide (ONNO) stack disposed above a channel region. The ONNO stack comprises a tunnel dielectric layer disposed above the channel region, a multi-layer charge-trapping region disposed above the tunnel dielectric layer, and a blocking dielectric layer disposed above the multi-layer charge-trapping region. The multi-layer charge-trapping region includes a substantially trap-free layer comprising an oxygen-rich nitride and a trap-dense layer disposed above the trap-free layer. The semiconductor device further includes a strain inducing structure including a strain inducing layer disposed proximal to the ONNO stack to increase charge retention of the multi-layer charge-trapping region. Other embodiments are also disclosed.
摘要翻译：提供了半导体器件及其制造方法。在一个实施例中，半导体器件包括具有设置在沟道区上方的氧化氮化物 - 氮化物 - 氧化物（ONNO）堆的存储晶体管。 ONNO堆叠包括设置在沟道区上方的隧道介电层，设置在隧道介电层上方的多层电荷捕获区，以及设置在多层电荷俘获区上方的阻挡介质层。多层电荷捕获区域包括基本上无陷阱层，其包含富含氧的氮化物和设置在无阱层之上的陷阱致密层。半导体器件还包括应变诱导结构，其包括设置在ONNO堆叠附近的应变诱导层，以增加多层电荷俘获区域的电荷保留。还公开了其他实施例。

7. 发明申请

US20060211202A1 Forming metal silicide on silicon-containing features of a substrate 失效
标题翻译：在基底的含硅特征上形成金属硅化物
公开(公告)号：US20060211202A1
公开(公告)日：2006-09-21
申请号：US11084450
申请日：2005-03-18
申请人： Jeong Byun , Jianxin Lei , Lisa Yang , Hien-Minh Le
发明人： Jeong Byun , Jianxin Lei , Lisa Yang , Hien-Minh Le
IPC分类号： H01L21/336
CPC分类号： C23C14/165 , H01L21/28518 , H01L21/2855 , H01L29/665 , H01L29/78
摘要： A metal suicide layer is formed on silicon-containing features of a substrate in a chamber. A metal film is sputter deposited on the substrate and a portion of the sputter deposited metal film is silicided. In the process, sputtering gas is energized by applying an electrical bias potential across the metal sputtering target and the substrate support to sputter deposit metal from a target onto the substrate. At least a portion of the deposited sputtered metal is silicided by heating the substrate to a silicidation temperature exceeding about 200° C. to form a combined sputtered metal and metal silicide layer on the substrate. The remaining sputtered metal can be silicided by maintaining the substrate at the silicidation temperature to form the metal silicide layer.
摘要翻译：在室中的衬底的含硅特征上形成金属硅化物层。金属膜被溅射沉积在衬底上，溅射沉积的金属膜的一部分被硅化。在该过程中，溅射气体通过在金属溅射靶和衬底支撑件上施加电偏压来激发，以将金属从靶溅射到衬底上。沉积的溅射金属的至少一部分通过将衬底加热到超过约200℃的硅化温度来硅化，以在衬底上形成组合的溅射金属和金属硅化物层。剩余的溅射金属可以通过将衬底保持在硅化温度下来硅化，形成金属硅化物层。

8. 发明授权

US08940645B2 Radical oxidation process for fabricating a nonvolatile charge trap memory device 有权
标题翻译：用于制造非易失性电荷陷阱存储器件的自由基氧化工艺
公开(公告)号：US08940645B2
公开(公告)日：2015-01-27
申请号：US13539458
申请日：2012-07-01
申请人： Krishnaswamy Ramkumar , Sagy Levy , Jeong Byun
发明人： Krishnaswamy Ramkumar , Sagy Levy , Jeong Byun
IPC分类号： H01L21/31
CPC分类号： H01L29/7926 , B82Y10/00 , H01L21/0214 , H01L21/02164 , H01L21/0217 , H01L21/022 , H01L21/02238 , H01L21/02252 , H01L21/02271 , H01L21/02326 , H01L21/02332 , H01L21/0234 , H01L21/28282 , H01L29/0669 , H01L29/0673 , H01L29/0676 , H01L29/16 , H01L29/4234 , H01L29/66833 , H01L29/775
摘要： A method for fabricating a nonvolatile charge trap memory device is described. The method includes subjecting a substrate to a first oxidation process to form a tunnel oxide layer overlying a polysilicon channel, and forming over the tunnel oxide layer a multi-layer charge storing layer comprising an oxygen-rich, first layer comprising a nitride, and an oxygen-lean, second layer comprising a nitride on the first layer. The substrate is then subjected to a second oxidation process to consume a portion of the second layer and form a high-temperature-oxide (HTO) layer overlying the multi-layer charge storing layer. The stoichiometric composition of the first layer results in it being substantially trap free, and the stoichiometric composition of the second layer results in it being trap dense. The second oxidation process can comprise a plasma oxidation process or a radical oxidation process using In-Situ Steam Generation.
摘要翻译：描述了制造非易失性电荷陷阱存储器件的方法。所述方法包括使衬底经受第一氧化工艺以形成覆盖多晶硅沟道的隧道氧化物层，以及在所述隧道氧化物层上形成多层电荷存储层，所述多层电荷存储层包含富氧的第一层，所述第一层包含氮化物，以及在第一层上包含氮化物的贫氧第二层。然后对衬底进行第二氧化处理以消耗第二层的一部分并形成覆盖多层电荷存储层的高温氧化物（HTO）层。第一层的化学计量组成导致其基本上无陷阱，并且第二层的化学计量组成使其陷入致密。第二氧化过程可以包括使用原位蒸汽发生的等离子体氧化过程或自由基氧化过程。

9. 发明申请

US20070197027A1 FORMATION OF BORIDE BARRIER LAYERS USING CHEMISORPTION TECHNIQUES 有权
标题翻译：使用化学技术形成硼化物屏障层
公开(公告)号：US20070197027A1
公开(公告)日：2007-08-23
申请号：US11739545
申请日：2007-04-24
申请人： Jeong Byun , Alfred Mak
发明人： Jeong Byun , Alfred Mak
IPC分类号： H01L21/44
CPC分类号： C23C16/45529 , C23C16/38 , C23C16/45531 , C23C16/45553 , H01L21/28562 , H01L21/76843 , H01L21/76846
摘要： In one embodiment, a method for depositing a boride-containing barrier layer on a substrate is provided which includes exposing the substrate sequentially to a boron-containing compound and a metal precursor to form a first boride-containing layer during a first sequential chemisorption process and exposing the substrate to the boron-containing compound, the metal precursor, and a second precursor to form a second boride-containing layer on the first boride-containing layer during a second sequential chemisorption process. In one example, the metal precursor contains tungsten hexafluoride and the boron-containing compound contains diborane. In another embodiment, a contact layer is deposited over the second boride-containing layer. The contact layer may contain tungsten and be deposited by a chemical vapor deposition process. Alternatively, the contact layer may contain copper and be deposited by a physical vapor deposition process. In other examples, boride-containing layers may be formed at a temperature of less than about 500° C.
摘要翻译：在一个实施例中，提供了一种用于在衬底上沉积含硼化物阻挡层的方法，其包括在第一顺序化学吸附过程期间将衬底依次暴露于含硼化合物和金属前体以形成第一含硼化物层，将基底暴露于含硼化合物，金属前体和第二前体，以在第二顺序化学吸附过程中在第一含硼化物层上形成第二含硼化物层。在一个实例中，金属前体含有六氟化钨，含硼化合物含有乙硼烷。在另一个实施方案中，在第二含硼化物层上沉积接触层。接触层可以含有钨并通过化学气相沉积工艺进行沉积。或者，接触层可以含有铜并通过物理气相沉积工艺进行沉积。在其他实例中，含硼化物的层可以在小于约500℃的温度下形成。

10. 发明申请

US20060292874A1 METHOD FOR FORMING TUNGSTEN MATERIALS DURING VAPOR DEPOSITION PROCESSES 有权
标题翻译：在蒸汽沉积过程中形成钨材料的方法
公开(公告)号：US20060292874A1
公开(公告)日：2006-12-28
申请号：US11468156
申请日：2006-08-29
申请人： Moris Kori , Alfred Mak , Jeong Byun , Lawrence Lei , Hua Chung , Ashok Sinha , Ming Xi
发明人： Moris Kori , Alfred Mak , Jeong Byun , Lawrence Lei , Hua Chung , Ashok Sinha , Ming Xi
IPC分类号： H01L21/44
CPC分类号： H01L21/76838 , C23C16/0272 , C23C16/14 , C23C16/4401 , C23C16/45525 , C23C16/45527 , C23C16/45529 , C23C16/45534 , C23C16/45561 , C30B25/02 , C30B25/14 , C30B29/38 , H01L21/28556 , H01L21/28562 , H01L21/76843 , H01L21/76876 , H01L21/76877
摘要： In one embodiment, a method for forming a tungsten material on a substrate surface is provide which includes positioning a substrate within a deposition chamber, heating the substrate to a deposition temperature, and exposing the substrate sequentially to a first reducing gas and a tungsten precursor gas to form a tungsten nucleation layer on the substrate during an atomic layer deposition (ALD) process. The method may further provide exposing the substrate to a deposition gas comprising a second reducing gas and the tungsten precursor gas to form a tungsten bulk layer on the tungsten nucleation layer during a chemical vapor deposition (CVD) process. Examples include that the ALD and CVD processes are conducted in the same deposition chamber or in different deposition chambers.
摘要翻译：在一个实施例中，提供了一种在衬底表面上形成钨材料的方法，其包括将衬底定位在沉积室内，将衬底加热至沉积温度，并将衬底依次暴露于第一还原气体和钨前体气体以在原子层沉积（ALD）工艺期间在衬底上形成钨成核层。该方法可以进一步提供将衬底暴露于包含第二还原气体和钨前体气体的沉积气体，以在化学气相沉积（CVD）工艺期间在钨成核层上形成钨体层。实例包括ALD和CVD工艺在相同的沉积室或不同的沉积室中进行。

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