专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明专利

JP2008108847A Composite semiconductor device, semiconductor package and spacer sheet employed therein, and manufacturing method of composite semiconductor device 有权
标题翻译：复合半导体器件，半导体封装和其使用的间隔片，以及复合半导体器件的制造方法
公开(公告)号：JP2008108847A
公开(公告)日：2008-05-08
申请号：JP2006289070
申请日：2006-10-24
申请人： Lintec Corp , Senju Metal Ind Co Ltd , リンテック株式会社 , 千住金属工業株式会社
发明人： SHINODA TOMONORI , SHIZUHATA HIRONORI , SHINODA HIROFUMI , KAWAMATA YUJI , TAJIMA TAKESHI , SHIMAMURA MASAHITO , WATANABE MASAKO , AMAMI MASAZUMI
IPC分类号： H01L25/10 , H01L25/11 , H01L25/18
CPC分类号： H01L25/0657 , H01L24/73 , H01L25/105 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48227 , H01L2224/48471 , H01L2224/73204 , H01L2224/73265 , H01L2225/0651 , H01L2225/06517 , H01L2225/06568 , H01L2225/06586 , H01L2225/1023 , H01L2225/1058 , H01L2924/00014 , H01L2924/01019 , H01L2924/01077 , H01L2924/01078 , H01L2924/01322 , H01L2924/15311 , H01L2924/15321 , H01L2924/15331 , H01L2924/00012 , H01L2924/00 , H01L2224/0401
摘要： PROBLEM TO BE SOLVED: To provide a method for ensuring wiring connection between both semiconductor packages by ensuring an installation space between an upper semiconductor package and a lower semiconductor package in a POP type semiconductor package and preventing a short circuit of adjoining connection terminals, and to provide a semiconductor device. SOLUTION: The composite semiconductor device comprises a spacer sheet 100 having the wiring connection substrate 12 of an upper semiconductor package having a lower surface on which electrodes 122 for conducting between the packages are arranged, the wiring connection substrate 13 of a lower semiconductor package having an upper surface on which electrodes 132 for conducting between the packages are arranged, and through holes 104 arranged around an air gap for interconnecting the electrodes which are arranged oppositely between the substrates and bonded to the substrates while being sandwiched, connection terminals 141 and 142 provided in the through hole of the spacer sheet in order to conduct between the substrates, and a terminal 140 for external connection formed on the lower surface of the wiring connection substrate of a semiconductor package located at the lowest portion. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种通过确保在POP型半导体封装中的上半导体封装和下半导体封装之间的安装空间来确保两个半导体封装之间的布线连接的方法，并防止邻接的连接端子的短路并提供半导体器件。解决方案：复合半导体器件包括具有上半导体封装的布线连接基板12的间隔片100，下布置有用于在封装之间导电的电极122，下半导体的布线连接基板13 具有上表面的封装，其上布置有用于在封装之间导电的电极132;以及通孔104，布置在气隙周围，用于互连电极，这些电极相互布置在基板之间并被夹在基板之间，连接端子141和 142，其设置在间隔片的通孔中以便在基板之间导通，以及形成在位于最下部的半导体封装的布线连接基板的下表面上的外部连接用端子140。版权所有（C）2008，JPO＆INPIT

2. 发明专利

JP2008108846A Spacer sheet for composite semiconductor device, manufacturing method of semiconductor package and composite semiconductor device employing it, and composite semiconductor device 有权
标题翻译：用于复合半导体器件的间隔片，半导体封装的制造方法和使用它的复合半导体器件以及复合半导体器件
公开(公告)号：JP2008108846A
公开(公告)日：2008-05-08
申请号：JP2006289066
申请日：2006-10-24
申请人： Lintec Corp , Senju Metal Ind Co Ltd , リンテック株式会社 , 千住金属工業株式会社
发明人： SHINODA TOMONORI , SHIZUHATA HIRONORI , SHINODA HIROFUMI , KAWAMATA YUJI , TAJIMA TAKESHI , SHIMAMURA MASAHITO , WATANABE MASAKO , AMAMI MASAZUMI
IPC分类号： H01L25/10 , H01L25/11 , H01L25/18
CPC分类号： H01L25/105 , H01L24/73 , H01L25/0657 , H01L2224/16 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48095 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2225/0651 , H01L2225/06568 , H01L2225/06586 , H01L2225/1023 , H01L2225/1058 , H01L2924/00014 , H01L2924/01019 , H01L2924/01077 , H01L2924/01078 , H01L2924/01322 , H01L2924/15311 , H01L2924/1532 , H01L2924/15321 , H01L2924/15331 , H01L2924/181 , H01L2924/00012 , H01L2924/00 , H01L2224/0401
摘要： PROBLEM TO BE SOLVED: To provide a wiring connection method by a spacer sheet which ensures the height of connection terminal distance and narrow pitch simultaneously in a POP type semiconductor package, and to provide a POP type composite semiconductor device of high mounting density. SOLUTION: The spacer sheet for composite semiconductor device arranged between the semiconductor packages of the composite semiconductor device formed by laminating a plurality of semiconductor packages comprises through holes arranged in correspondence with electrodes formed on a substrate which can be bonded to the substrate of one semiconductor package and connecting/wiring the one semiconductor package with the other semiconductor package, the main portion of one semiconductor package being mounted on the substrate, and an air gap portion corresponding to the main portion of the other semiconductor package opposing the substrate. A method for manufacturing the composite semiconductor device employing the spacer sheet is also provided. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：为了提供一种隔离片的布线连接方法，其在POP型半导体封装中同时确保了连接端子距离和窄间距的高度，并且提供了高安装密度的POP型复合半导体器件。解决方案：配置在通过层叠多个半导体封装形成的复合半导体器件的半导体封装之间的复合半导体器件用间隔片包括与形成在基板上的电极对应地布置的通孔，该基板可以结合到基板上一个半导体封装，并且将一个半导体封装与另一个半导体封装连接/布线，一个半导体封装的主要部分安装在基板上，以及对应于与该基板相对的另一个半导体封装的主要部分的气隙部分。还提供了使用间隔片的复合半导体器件的制造方法。版权所有（C）2008，JPO＆INPIT

3. 发明专利

JP2007122965A Insulation sheet for conductive junction sheet, conductive junction sheet, method of manufacturing conductive junction sheet and method of manufacturing electronic composite component 有权
标题翻译：导电连接片绝缘片，导电连接片，制造导电连接片的方法及制造电子复合组件的方法
公开(公告)号：JP2007122965A
公开(公告)日：2007-05-17
申请号：JP2005311379
申请日：2005-10-26
申请人： Lintec Corp , Senju Metal Ind Co Ltd , リンテック株式会社 , 千住金属工業株式会社
发明人： SHINODA TOMONORI , YAMAZAKI OSAMU , SAEKI NAOYA , KOYAKATA MASAHIRO , KAWAMATA YUJI , TAJIMA TAKESHI , SHIMAMURA MASAHITO , WATANABE MASAKO , AMAMI MASAZUMI
IPC分类号： H01B17/56 , B32B7/02 , H01B5/14 , H01B13/00 , H01L21/60 , H05K3/32
CPC分类号： H05K3/3478 , C09J7/29 , C09J2433/00 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/15311 , H05K2201/10424 , H05K2203/041 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide an insulation sheet for a conductive junction sheet capable of solidly holding arranged conductive particles and of preventing loss thereof; to provide a conductive junction sheet and its manufacturing method; and to provide a manufacturing method of an electronic composite component using the conductive junction sheet. SOLUTION: This insulation sheet for the conductive junction sheet is characterized by having at least one adhesive layer capable of holding conductive particles. This conductive junction sheet using it and this method of manufacturing an electronic composite component using the conductive junction sheet are also provided. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种能够牢固地保持布置的导电颗粒并防止其损失的导电接合片的绝缘片; 提供导电接合片及其制造方法; 并提供使用导电性接合片的电子复合元件的制造方法。解决方案：用于导电接合片的绝缘片的特征在于具有至少一个能够保持导电颗粒的粘合剂层。还提供了使用它的导电接合片和使用导电接合片制造电子复合元件的方法。版权所有（C）2007，JPO＆INPIT

4. 发明专利

JP2014030029A Dicing sheet with protective film formation layer and manufacturing method of chip 有权
标题翻译：具有保护膜形成层和芯片制造方法的标签
公开(公告)号：JP2014030029A
公开(公告)日：2014-02-13
申请号：JP2013184381
申请日：2013-09-05
申请人： Lintec Corp , リンテック株式会社
发明人： SHINODA TOMONORI , KOYAKATA MASAHIRO , TAKANO TAKESHI
IPC分类号： H01L21/301 , C09J7/02 , C09J201/00
CPC分类号： H01L21/6836 , C09J7/40 , C09J2201/622 , C09J2203/326 , H01L21/304 , H01L21/78 , H01L23/544 , H01L2221/68327 , H01L2221/68377 , H01L2223/54406 , H01L2223/54433 , H01L2223/54486 , H01L2924/0002 , Y10T428/24843 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a dicing sheet with a protective film formation layer having high uniformity of the thickness, capable of easily manufacturing a semiconductor chip including a protection film having excellent print precision, being expanded, and including a substrate having heat resistance.SOLUTION: A dicing sheet 10 with a protective film formation layer includes a substrate film 1, an adhesive layer 2, and a protective film formation layer 4, and the substrate film has a specific characteristic. In addition, the protective film formation layer is formed so as to be surrounded with the adhesive layer in the planar view, and has a thermosetting property.
摘要翻译：要解决的问题：为了提供具有高均匀度的保护膜形成层的切割片，能够容易地制造包括具有优异的印刷精度的保护膜的半导体芯片，并且包括具有耐热性的基板。解决方案：具有保护膜形成层的切割片10包括基底膜1，粘合剂层2和保护膜形成层4，并且基底膜具有特定的特性。此外，保护膜形成层形成为在平面图中被粘合剂层包围，并且具有热固性。

5. 发明专利

JP2013131593A Dicing sheet with protective film forming layer and chip manufacturing method 有权
标题翻译：具有保护膜形成层和芯片制造方法的标签
公开(公告)号：JP2013131593A
公开(公告)日：2013-07-04
申请号：JP2011279304
申请日：2011-12-21
申请人： Lintec Corp , リンテック株式会社
发明人： SHINODA TOMONORI , KOYAKATA MASAHIRO , TAKANO TAKESHI
IPC分类号： H01L21/301 , B32B27/00 , C09D201/00 , C09J7/02 , C09J201/00 , H01L23/00
摘要： PROBLEM TO BE SOLVED: To provide a dicing sheet with a protective film forming layer, which enables simple manufacturing of a semiconductor chip having a highly uniform thickness and excellent printing precision; and in which the protective film forming layer is cured and adhesion of a pressure-sensitive adhesive sheet is reduced in a heating process thereby to achieve easy pickup of the semiconductor chip having the protective film and a simple manufacturing process of the semiconductor chip.SOLUTION: A dicing sheet with a protective film forming layer comprises: a pressure-sensitive adhesive sheet 3 which includes a base film 1 and an adhesive layer 2; a heat-curable protective film forming layer 4 which is to be a protective film by heating and which is formed on the adhesive layer of the pressure-sensitive adhesive sheet 3. An adhesive strength between the pressure-sensitive sheet 3 and the protective film is reduced by heating. And a heat generation occurrence temperature of the heat-curable protective film forming layer 4 is lower than an adhesive strength reduction temperature.
摘要翻译：要解决的问题：为了提供具有保护膜形成层的切割片，能够简单地制造具有高度均匀的厚度和优异的印刷精度的半导体芯片; 并且其中保护膜形成层被固化并且在加热过程中降低了压敏粘合片的粘合，从而实现了具有保护膜的半导体芯片的容易拾取以及半导体芯片的简单制造工艺。解决方案：具有保护膜形成层的切割片包括：粘合片3，其包括基膜1和粘合剂层2; 通过加热成为保护膜的热固性保护膜形成层4，形成在粘合片3的粘合剂层上。压敏片3与保护膜之间的粘合强度为通过加热减少并且热固化保护膜形成层4的发热发生温度低于粘合强度降低温度。

6. 发明专利

JP2012207179A Protective film-forming film, protective film-forming sheet, and method of manufacturing semiconductor chip 有权
标题翻译：保护膜成型膜，保护膜成型片及制造半导体芯片的方法
公开(公告)号：JP2012207179A
公开(公告)日：2012-10-25
申请号：JP2011075569
申请日：2011-03-30
申请人： Lintec Corp , リンテック株式会社
发明人： SHINODA TOMONORI , TAKANO TAKESHI , AZUMA YUICHIRO
IPC分类号： C09J7/00 , C09J4/00 , C09J11/06 , C09J11/08 , C09J201/00 , H01L21/301
摘要： PROBLEM TO BE SOLVED: To provide a protective film-forming film capable of obtaining a protective film that is sufficiently cured.SOLUTION: The protective film-forming film comprises an ultraviolet-polymerizable compound (A), a chain transfer agent (B), and a binder polymer component (C).
摘要翻译：要解决的问题：提供能够获得充分固化的保护膜的保护膜形成膜。＆lt; P＆gt;解决方案：保护膜形成膜包括紫外线聚合性化合物（A），链转移剂（B）和粘合剂聚合物成分（C）。版权所有（C）2013，JPO＆INPIT

7. 发明专利

JP2011213875A Adhesive sheet and method for producing semiconductor device 有权
标题翻译：粘合片及其半导体器件的制造方法
公开(公告)号：JP2011213875A
公开(公告)日：2011-10-27
申请号：JP2010083683
申请日：2010-03-31
申请人： Lintec Corp , リンテック株式会社
发明人： SHINODA TOMONORI , WAKAYAMA YOJI
IPC分类号： C09J7/02 , C09J133/00 , C09J163/00 , H01L21/52
CPC分类号： H01L24/29 , H01L2924/10253 , H01L2924/181 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To impart a gettering function to a semiconductor device obtained, without performing special treatment to a semiconductor wafer and chip.SOLUTION: The adhesive sheet comprises a substrate and adhesive layers releasably laminated on the substrate. The adhesive layers are obtained by laminating a first adhesive layer and a second adhesive layer in this order from the substrate side, wherein the first adhesive layer includes an acrylic polymer (A), an epoxy-based thermosetting resin (B), and a thermo-curing agent (C), and the second adhesive layer includes an acrylic polymer (A), an epoxy-based thermosetting resin (B), an thermo-curing agent (C), and a gettering agent (D).
摘要翻译：要解决的问题：为获得的半导体器件提供吸气功能，而不对半导体晶片和芯片进行特殊处理。解决方案：粘合片包括可剥离地层压在基底上的基底和粘合剂层。粘合剂层通过从基材侧依次层叠第一粘合剂层和第二粘合剂层而获得，其中第一粘合剂层包含丙烯酸类聚合物（A），环氧类热固性树脂（B）固化剂（C），第二粘合层包括丙烯酸类聚合物（A），环氧类热固性树脂（B），热固化剂（C）和吸杂剂（D）。

8. 发明专利

JP2010109383A Method of manufacturing resin-sealed semiconductor device 有权
标题翻译：树脂密封半导体器件的制造方法
公开(公告)号：JP2010109383A
公开(公告)日：2010-05-13
申请号：JP2010003841
申请日：2010-01-12
申请人： Lintec Corp , リンテック株式会社
发明人： HAMAZAKI AKIE , IZUMI TADASHI , SHINODA TOMONORI
IPC分类号： H01L21/56
CPC分类号： H01L24/97 , H01L2224/16225 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2224/97 , H01L2924/00 , H01L2924/00014
摘要： PROBLEM TO BE SOLVED: To provide a method of sealing semiconductor components in which a resin sheet is high in general-purposeness, end faces of produced packages have a fixed shape and size reduction of a device is enabled, and also to provide a method for manufacturing semiconductor device that allows cost reduction and quality improvement.
SOLUTION: The method of manufacturing a semiconductor device includes: a step of preparing a circuit board 10, on which a plurality of semiconductor chips 11 are mounted; a step of filling a sealing resin layer 3 of a resin sheet for sealing the semiconductor 1 into each gap formed between a protrusion and a recess of the semiconductor chip mounted face of the circuit board, to bring the face of the sealing resin layer into contact with the face of the circuit board, while keeping a configuration such that the resin sheet for sealing the semiconductor 1 is attached to bridge across a frame 4, that has an opening that is slightly larger than the planar shape of the circuit board; and a step of cutting the circuit board, together with the sealing resin layer in units of semiconductor chips. The method includes a step of thermally curing the sealing resin layer, after the step of bringing the face of the sealing resin layer into contact with the face of the circuit board, or the like.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：解决的问题：为了提供一种密封树脂片材一般目的性高的半导体部件的方法，制造的封装的端面具有固定的形状，并且能够使器件的尺寸减小，并且还提供一种制造半导体器件的方法，其允许降低成本并提高质量。解决方案：制造半导体器件的方法包括：制备其上安装有多个半导体芯片11的电路板10的步骤; 将用于将半导体1密封的树脂片的密封树脂层3填充到形成在电路板的半导体芯片安装面的突起和凹部之间的每个间隙中以使密封树脂层的表面接触的步骤同时保持电路板的表面，同时保持用于密封半导体1的树脂片被安装到跨越架4的构造，框架4具有略大于电路板的平面形状的开口; 以及以半导体芯片为单位与密封树脂层一起切割电路板的步骤。该方法包括在使密封树脂层的表面与电路板的表面接触的步骤之后，热固化密封树脂层的步骤。版权所有（C）2010，JPO＆INPIT

9. 发明专利

JP2009127043A Tacky adhesive composition, tacky-adhesive sheet and method for manufacturing semiconductor device 有权
标题翻译：胶粘剂组合物，粘合剂粘合片和制造半导体器件的方法
公开(公告)号：JP2009127043A
公开(公告)日：2009-06-11
申请号：JP2007307395
申请日：2007-11-28
申请人： Lintec Corp , リンテック株式会社
发明人： SHINODA TOMONORI , KOYAKATA MASAHIRO , SHIZUHATA HIRONORI
IPC分类号： C09J133/00 , C09J5/06 , C09J7/02 , C09J11/00 , C09J163/10 , H01L21/301 , H01L21/52
摘要： PROBLEM TO BE SOLVED: To achieve high reliability of a semiconductor-mounted package even when the semiconductor-mounted package is exposed to a high-temperature and high-humidity atmosphere and even when the semiconductor-mounted package of a voltage-impressed state is exposed to the high-temperature and high-humidity atmosphere.
SOLUTION: The tacky adhesive composition comprises an acrylic polymer, a thermosetting epoxy resin having an unsaturated hydrocarbon group, a thermosetting agent and an ion capturing agent and has 1-15 parts weight ion capturing agent content on the basis of 100 parts weight all of resin components.
COPYRIGHT: (C)2009,JPO&INPIT

10. 发明专利

JP2008251582A Method of manufacturing chip provided with adhesive layer 审中-公开
标题翻译：制造粘合层的芯片的方法
公开(公告)号：JP2008251582A
公开(公告)日：2008-10-16
申请号：JP2007087342
申请日：2007-03-29
申请人： Lintec Corp , リンテック株式会社
发明人： SUGINO TAKASHI , SHINODA TOMONORI
IPC分类号： H01L21/52
CPC分类号： H01L24/743 , H01L2224/743 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a chip provided with an adhesive layer, concretely the chip wherein the adhesive layer having nearly the same shape as the bonding face of the chip and uniform thickness is provided on the bonding face thereof, and to provide a manufacturing method by which the chip provided with the adhesive layer can be efficiently obtained with high reliability.
SOLUTION: The method of manufacturing the chip 1 provided with the adhesive layer includes a step [1] to prepare a chip sticking film wherein a plurality of the chips are stuck at some spacing on a film that is provided with a base material 4 and adhesive layers 3A and 3B that are stacked thereon and are subjected to photolithography; a step [2] to expose the adhesive layer; and a step [3] to develop the exposed adhesive layer and remove the adhesive layer other than a portion with stuck chips.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了提供一种制造具有粘合剂层的芯片的方法，具体地说，其中具有与芯片的接合面几何相同形状的粘合剂层和均匀厚度的芯片设置在接合面并且提供可以高可靠性有效地获得设置有粘合剂层的芯片的制造方法。解决方案：制造具有粘合剂层的芯片1的方法包括步骤[1]，以制备芯片粘贴膜，其中多个芯片以一定距离粘附在设置有基材的膜上 4和层叠在其上并进行光刻的粘合剂层3A和3B; 暴露粘合剂层的步骤[2] 以及步骤[3]，以显影曝光的粘合剂层并除去具有卡住的碎片的部分之外的粘合剂层。版权所有（C）2009，JPO＆INPIT

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式