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    • 3. 发明授权
    • Tri-level-cell DRAM and sense amplifier with alternating offset voltage
    • 具有交替偏置电压的三电平单元DRAM和读出放大器
    • US09478277B1
    • 2016-10-25
    • US14844003
    • 2015-09-03
    • Bo Liu
    • Bo Liu
    • G11C11/401G11C11/4096G11C11/56
    • G11C11/4096G11C7/02G11C7/065G11C7/08G11C11/4091G11C11/4094G11C11/4099G11C11/565G11C16/10G11C16/30G11C2211/5634
    • Tri-level-cell dynamic random access memory (DRAM) stores 3 levels of voltage (0, VDD/2, VDD) into a plurality of memory cells. Selected memory cell connected to bitline (BLT) to develop signal voltage, and adjacent reference bitline (BLR) develops reference voltage at VDD/2. An asymmetrical sensing amplifier (ASA), which has alternative positive offset and negative offset, is used to sense signal voltage and reference voltage for both their difference and sameness. ASA control signals, A and B, switch at different timing points or at different voltage level or the combination of both to have offset voltage set at either positive or negative polarity. Two consecutive read out from one ASA or one single read out from two ASA can be implemented to read memory cells data to local IOs. Output from ASA will be used to restore voltage back to the accessed memory cells.
    • 三电平单元动态随机存取存储器(DRAM)将3级电压(0,VDD / 2,VDD)存储到多个存储单元中。 连接到位线(BLT)的选定存储单元产生信号电压,并且相邻的参考位线(BLR)产生VDD / 2的参考电压。 具有替代正偏移和负偏移的不对称感测放大器(ASA)用于检测信号电压和参考电压两者的差异和相同性。 ASA控制信号A和B在不同的定时点或不同的电压电平下进行切换,或者两者的组合使偏移电压设置为正或负极性。 可以实现从一个ASA或两个ASA读取的两个连续读出,以将内存单元数据读取到本地IO。 来自ASA的输出将用于将电压恢复到访问的存储单元。
    • 7. 发明授权
    • Method and data storage device for laser free heat-assisted magnetic recording
    • 无激光热辅助磁记录方法和数据存储装置
    • US08792211B2
    • 2014-07-29
    • US13977639
    • 2010-12-31
    • Zhimin YuanBo LiuBoon Hao LowTiejun ZhouSiang Huei LeongMingsheng Zhang
    • Zhimin YuanBo LiuBoon Hao LowTiejun ZhouSiang Huei LeongMingsheng Zhang
    • G11B5/127
    • G11B5/127G11B5/314G11B2005/0021
    • A data storage device with a heat assisted magnetic recording (HAMR) system, a magnetic recording medium, and method for data storage are provided. The data storage device includes a magnetic recording medium, a magnetic recording head, a power supply, a controller and a switching device. The magnetic recording head includes a main pole having a surface area facing the magnetic recording medium. The controller is coupled to the magnetic recording head for controlling writing information to and reading information from the magnetic recording medium. The switching device electrically couples the power supply between the main pole and the magnetic recording medium in response to a signal provided from the controller when writing information to the magnetic recording medium. The magnetic recording medium comprises a plurality of layers, including a heating layer, a field enhanced conduction layer, and an electrode layer. The electrode layer is electrically coupleable to the power supply and the magnetic recording head for heating a portion of the heating layer opposite the magnetic recording head during writing of data by the magnetic recording head to the magnetic recording medium, the portion of the heating layer defined by an electric field applied to the field enhanced conduction layer.
    • 提供具有热辅助磁记录(HAMR)系统,磁记录介质和数据存储方法的数据存储装置。 数据存储装置包括磁记录介质,磁记录头,电源,控制器和开关装置。 磁记录头包括具有面向磁记录介质的表面积的主极。 控制器耦合到磁记录头,用于控制向磁记录介质写入信息和从磁记录介质读取信息。 当将信息写入磁记录介质时,开关装置响应于从控制器提供的信号,在主极和磁记录介质之间电耦合电源。 磁记录介质包括多个层,包括加热层,场增强传导层和电极层。 所述电极层电耦合到所述电源和所述磁记录头,用于在由所述磁记录头向所述磁记录介质写入数据期间加热与所述磁记录头相对的所述加热层的一部分,所述加热层的所述部分被限定 通过施加到场增强导电层的电场。
    • 9. 发明授权
    • Column redundancy circuitry for non-volatile memory
    • 用于非易失性存储器的列冗余电路
    • US08681548B2
    • 2014-03-25
    • US13463422
    • 2012-05-03
    • Bo LiuFrank Wanfang TsaiJongmin ParkYan Li
    • Bo LiuFrank Wanfang TsaiJongmin ParkYan Li
    • G11C16/06G11C8/00G11C8/18
    • G11C29/848G11C7/1036G11C8/04G11C29/78
    • In a non-volatile memory circuit, techniques are presented so that bad columns can be ignored and/or replaced during memory data input and output operations. A column redundant circuit for this purpose reduces circuit size and improves performance. User data is grouped in an interleaved manner so that data belonging to consecutive logical address will be distributed into different physical locations. For example, all column data can be physically grouped into, say, 5 divisions and user data can be written into or accessed from one division after another consecutively. Each division has its own clock control. The column redundancy block can generate bad column locations' information and send it to control logic to switch the user clock to a different division clock, thereby skipping bad columns. By controlling the clocks for different columns, the user can directly access good columns without touching bad columns.
    • 在非易失性存储器电路中,呈现技术,使得在存储器数据输入和输出操作期间可以忽略和/或替换坏列。 用于此目的的列冗余电路可减少电路尺寸并提高性能。 用户数据以交错方式分组,使得属于连续逻辑地址的数据将被分配到不同的物理位置。 例如,所有列数据可以被物理地分组成5个部分,并且用户数据可以被连续地从一个部门写入或访问。 每个部门都有自己的时钟控制。 列冗余块可以产生错误的列位置信息,并将其发送到控制逻辑,以将用户时钟切换到不同的分频时钟,从而跳过不良列。 通过控制不同列的时钟,用户可以直接访问好的列,而不会碰坏列。