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    • 2. 发明公开
    • Systems and methods for data processing including EET feedback
    • Systeme und Verfahren zur Datenverarbeitung mit EET-Rückkoppelung
    • EP2670074A2
    • 2013-12-04
    • EP13160629.5
    • 2013-03-22
    • LSI Corporation
    • Zhang, FanWang, Chung-LiHan, YangYang, ShaohuaWu, XuebinXia, HaitaoJin, Ming
    • H04L1/00
    • H03M13/6331H03M13/1111H03M13/1128H03M13/1515H03M13/2957H04L1/005H04L25/061H04L25/067
    • The present invention is related to systems and methods for data processing system characterization. An embodiment of a data processing system comprises: a data processing circuit, wherein the data processing circuit includes: a data detector circuit operable to apply a data detection algorithm to a sample data set to yield a detected output; a detected output error count circuit operable to generate an output side error count corresponding to a number of errors remaining in the detected output, wherein the detected output error count circuit is operable to provide the output side error count external to the data processing circuit; a data decoder circuit operable to apply a data decoding algorithm to the detected output to yield a decoded output; and a decoded output error count circuit operable to generate an input side error count corresponding to a number of errors remaining in the decoded output, wherein the decoded output error count circuit is operable to provide the input side error count external to the data processing circuit
    • 本发明涉及用于数据处理系统表征的系统和方法。 数据处理系统的一个实施例包括:数据处理电路,其中所述数据处理电路包括:数据检测器电路,可操作以将数据检测算法应用于采样数据集以产生检测到的输出; 检测输出错误计数电路,用于产生对应于检测输出中剩余的错误数量的输出侧错误计数,其中所检测的输出错误计数电路可操作以提供数据处理电路外部的输出端误差计数; 数据解码器电路,可操作以将数据解码算法应用于所检测的输出以产生解码的输出; 以及解码输出错误计数电路,用于产生与解码输出中剩余的错误数量相对应的输入侧错误计数,其中解码输出错误计数电路可操作以提供数据处理电路外部的输入侧错误计数
    • 4. 发明公开
    • Systems and methods for handling out of order reporting in a storage device
    • 系统和用于在存储设备搬运他们的订单以外的报告方法
    • EP2605121A2
    • 2013-06-19
    • EP12192221.5
    • 2012-11-12
    • LSI Corporation
    • Yang, ShaohuaZhang, FanHan, YangWu, Xuebin
    • G06F3/06G11B20/10G11B20/12G11B20/18
    • G06F7/24G06F3/0604G06F3/0611G06F3/0659G06F3/0674G11B20/10G11B20/12G11B20/18
    • Various embodiments of the present invention provide systems and methods for handling out of order reporting in a storage device, the data storage system comprising: a host (290) operable to request an ordered data set, wherein the ordered data set includes: a first output and a second output, and wherein the first output precedes the second output in the ordered data set; a storage medium (150) maintaining the ordered data set; a data processing circuit (100) operable to access the ordered data set from the storage medium, and to process a first processing input corresponding to the first output and a second processing input corresponding to the second output to yield the first output and the second output, wherein the second output is available before the first output; and wherein the host (290) is further operable to receive the second output before the first output.
    • 本发明的各种实施例提供的系统和方法用于在存储设备处理无序报告,数据存储系统,包括:一个主机(290),可操作以有序数据集的请求,worin有序数据集,包括:第一输出 和第二输出,和worin第一输出之前在有序数据集的第二输出; 的存储介质(150)保持的有序数据集; 一个数据处理电路(100),其可操作以访问所述有序数据从存储介质设置,并且处理第一处理输入对应于所述第一输出端和第二处理输入对应于所述第二输出,以产生所述第一输出和所述第二输出 ,worin第二输出是可用的第一输出之前; 和worin主机(290)是可操作的。此外,第一输出之前,接收所述第二输出。
    • 9. 发明公开
    • Systems and methods for out of order data reporting
    • Systeme und VerfahrenfürirreguläreDatenberichterstattung
    • EP2637337A2
    • 2013-09-11
    • EP13152681.6
    • 2013-01-25
    • LSI Corporation
    • Yang, ShaohuaZhang, FanHan, Yang
    • H04L1/00
    • H04L1/0052G11B20/10527G11B2020/1062G11B2020/185G11B2220/2516H03M13/2957H03M13/6343H04L1/005
    • The present inventions are related to systems and methods for data processing, the data processing system comprising: a data processing circuit operable to: receive a first, a second and a third received data set; wherein the first data set is received prior to the second data set, and the second data set is received prior to the third data set; apply a data processing algorithm to the first received data set to yield a first output data set, apply the algorithm to the second received data set to yield a second output data set, and apply the algorithm to the third received data set to yield a third output data set; and an out of order enabling circuit operable to assert an order indicator output to indicate the second output data set is out of order when the second output data set is provided before the first output data set.
    • 本发明涉及用于数据处理的系统和方法,所述数据处理系统包括:数据处理电路,可操作以:接收第一,第二和第三接收数据集; 其中在所述第二数据集之前接收所述第一数据集,并且在所述第三数据集之前接收所述第二数据集; 将数据处理算法应用于第一接收数据集以产生第一输出数据集,将算法应用于第二接收数据集以产生第二输出数据集,并将算法应用于第三接收数据集,以产生第三数据集 输出数据集; 并且当在第一输出数据集之前提供第二输出数据集时,可操作以断言指示第二输出数据集的顺序指示符输出的失序使能电路是无序的。