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1. 发明申请

WO2010074510A3 STRUCTURE FOR MULTI-ROW LEADFRAME AND SEMICONDUCTOR PACKAGE THEREOF AND MANUFACTURE METHOD THEREOF 审中-公开
标题翻译：多引线框架结构及其半导体封装及其制造方法
公开(公告)号：WO2010074510A3
公开(公告)日：2010-09-10
申请号：PCT/KR2009007724
申请日：2009-12-23
申请人： LG INNOTEK CO LTD , CHUN HYUN A , CHOI JAE BONG , LEE SUNG WON , RYU SUNG WUK , LEE HYUK SOO , EOM SAI RAN
发明人： CHUN HYUN A , CHOI JAE BONG , LEE SUNG WON , RYU SUNG WUK , LEE HYUK SOO , EOM SAI RAN
IPC分类号： H01L23/495
CPC分类号： H01L21/4832 , H01L23/49582 , H01L24/29 , H01L24/48 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2224/92247 , H01L2924/00014 , H01L2924/01029 , H01L2924/01046 , H01L2924/01067 , H01L2924/01078 , H01L2924/01079 , H01L2924/0132 , H01L2924/01322 , H01L2924/181 , H01L2924/00 , H01L2924/01026 , H01L2924/01028 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： The present invention relates to a multi-row leadframe for semiconductor packaging, characterized by: forming a plating pattern on a leadframe material (first step); forming a protective pattern on the plating pattern (second step); and forming a nano pattern by using the protective pattern as a mask (third step), whereby a protective pattern is formed on an upper surface of a plating pattern to increase reliability of a product by preventing damage to a plating layer caused by etching solution during pattern formation of leadframe and to thereby solve the problem of using the plating layer as an etching mask.
摘要翻译：本发明涉及一种用于半导体封装的多列引线框，其特征在于：在引线框架材料上形成电镀图案（第一步骤）; 在电镀图案上形成保护图案（第二工序）; 并且通过使用保护图案作为掩模形成纳米图案（第三步骤），由此在电镀图案的上表面上形成保护图案，以通过防止由蚀刻溶液导致的镀层损伤而提高产品的可靠性引线框架的图案形成，从而解决了使用镀层作为蚀刻掩模的问题。

2. 发明申请

WO2010137899A2 LEADFRAME AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译： LEADFRAME及其制造方法
公开(公告)号：WO2010137899A2
公开(公告)日：2010-12-02
申请号：PCT/KR2010003384
申请日：2010-05-27
申请人： LG INNOTEK CO LTD , EOM SAI RAN , LEE HYUNG EUI , PARK CHUNG SIK , CHUN HYUN A , YOON HYE SUN
发明人： EOM SAI RAN , LEE HYUNG EUI , PARK CHUNG SIK , CHUN HYUN A , YOON HYE SUN
IPC分类号： H01L23/495 , H01L21/60
CPC分类号： H01L23/49861 , H01L21/4832 , H01L23/49548 , H01L23/49582 , H01L24/48 , H01L24/49 , H01L2224/48091 , H01L2224/48247 , H01L2224/48257 , H01L2224/49 , H01L2224/85411 , H01L2224/85439 , H01L2224/85444 , H01L2224/85447 , H01L2224/85455 , H01L2224/85464 , H01L2224/85471 , H01L2224/85871 , H01L2924/00014 , H01L2924/01005 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/181 , H01L2924/3025 , H01L2224/45099 , H01L2924/00012
摘要： Disclosed is a leadframe. The leadframe comprises a die pad part, at least one lead part, and at least one supporting part. A semiconductor chip is mounted on a first surface of the leadframe at the die pad. The at least one lead part electrically connects the semiconductor chip to at least one external circuit. The at least one supporting part is adjacent to a second surface opposited the first surface, includes an insulating material, and insulates the at least one lead part from each other.
摘要翻译：披露的是引线框架。引线框架包括芯片焊盘部分，至少一个引线部分和至少一个支撑部分。半导体芯片安装在引线框架的芯片焊盘的第一表面上。至少一个引线部分将半导体芯片电连接到至少一个外部电路。所述至少一个支撑部分邻近与所述第一表面相对的第二表面，包括绝缘材料并使所述至少一个引线部分彼此绝缘。

3. 发明申请

WO2012005435A9 MANUFACTURING METHOD OF CHIP PACKAGE AND CHIP PACKAGE MANUFACTURED USING THE SAME 审中-公开
标题翻译：使用其制造的芯片封装和芯片封装的制造方法
公开(公告)号：WO2012005435A9
公开(公告)日：2012-02-16
申请号：PCT/KR2011002628
申请日：2011-04-13
申请人： LG INNOTEK CO LTD , LEE HYUNG EUI , PARK CHUNG SIK , CHUN HYUN A , EOM SAI RAN
发明人： LEE HYUNG EUI , PARK CHUNG SIK , CHUN HYUN A , EOM SAI RAN
IPC分类号： H01L23/48 , H01L23/043
CPC分类号： H01L21/4832 , H01L23/49548 , H01L23/49582 , H01L24/29 , H01L24/45 , H01L24/48 , H01L24/83 , H01L24/85 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48247 , H01L2224/48639 , H01L2224/48644 , H01L2224/48647 , H01L2224/48655 , H01L2224/48664 , H01L2224/48839 , H01L2224/48844 , H01L2224/48847 , H01L2224/48855 , H01L2224/48864 , H01L2224/83 , H01L2224/85439 , H01L2224/85444 , H01L2224/85447 , H01L2224/85455 , H01L2224/85464 , H01L2224/92 , H01L2224/92247 , H01L2924/01014 , H01L2924/01028 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/15156 , H01L2924/157 , H01L2924/181 , H01L2924/00014 , H01L2224/85 , H01L2924/00 , H01L2924/00012
摘要： The present invention relates to a manufacturing method of a chip package, the method comprising: forming first leads and second leads, both having conductivity, on the top and bottom surfaces of a metal substrate; half-etching the top surface of the metal substrate to form a lead portion under the first leads and to form a die pad portion whose bottom is connected to the lead portion; attaching a chip onto the die pad portion and electrically connecting the chip and the first leads by a connector; forming an insulative molding portion on the metal substrate to bury the chip and the connector; and etching the bottom of the metal substrate to short-circuit the lead portion and the die pad portion, and a chip package manufactured using the same. Accordingly, the distance between a chip and first leads can be reduced by forming a conventional bump-shaped I/O pad in a lead shape, thus lead to cost reduction. Moreover, a large number of signal transmission systems can be reliably realized in a micro-pattern due to the lead shape. Moreover, the stability of the product can be improved by treating the thickness of the lead portion in the final step of the process.
摘要翻译：本发明涉及一种芯片封装的制造方法，该方法包括：在金属基板的顶表面和底表面上形成具有导电性的第一引线和第二引线; 半蚀刻金属基板的顶表面，以在第一引线下方形成引线部分并形成其底部连接到引线部分的芯片焊盘部分; 将芯片附接到芯片焊盘部分上并通过连接器电连接芯片和第一引线; 在所述金属基板上形成绝缘成型部，以埋设所述芯片和所述连接器; 并且蚀刻金属基板的底部以使引线部分和芯片焊盘部分短路，以及使用其形成的芯片封装。因此，可以通过形成引线形状的传统的凸起形状的I / O焊盘来减小芯片与第一引线之间的距离，从而降低成本。此外，由于引线形状，可以以微图案可靠地实现大量的信号传输系统。此外，通过在该方法的最后步骤中处理引线部分的厚度可以提高产品的稳定性。

4. 发明申请

WO2011059205A2 LEAD FRAME AND MANUFACTURING METHOD OF THE SAME 审中-公开
标题翻译：铅框架及其制造方法
公开(公告)号：WO2011059205A2
公开(公告)日：2011-05-19
申请号：PCT/KR2010007783
申请日：2010-11-05
申请人： LG INNOTEK CO LTD , EOM SAI RAN , CHUN HYUN A , PARK CHUNG SIK , LEE HYUNG EUI
发明人： EOM SAI RAN , CHUN HYUN A , PARK CHUNG SIK , LEE HYUNG EUI
CPC分类号： H01L23/49861 , H01L21/486 , H01L23/3121 , H01L24/48 , H01L24/49 , H01L2224/48011 , H01L2224/48091 , H01L2224/48247 , H01L2224/48257 , H01L2224/49 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01082 , H01L2924/014 , H01L2924/15153 , H01L2924/15165 , H01L2924/15747 , H01L2924/181 , H01L2924/00 , H01L2224/45099 , H01L2924/00012
摘要： An aspect of the present invention provides a lead frame, comprising lead portions each composed of a vertical portion and a horizontal portion, a die pad portion disconnected from the lead portions by support portions made of an insulating material, inner leads disposed to neighbor the die pad portion and formed on a top surface of the horizontal portions of the lead portions, and outer leads formed on a bottom surface of the vertical portions of the lead portions. In accordance with the present invention, a lead frame having a reduced wire length due to a fine circuit pattern, enabling flipchip bonding due to routability, and improving adhesive strength upon soldering due to a swell structure can be fabricated. Further, a warpage phenomenon in a manufacturing process can be prevented.
摘要翻译：本发明的一个方面提供了一种引线框架，其包括由垂直部分和水平部分构成的引线部分，通过由绝缘材料制成的支撑部分与引线部分断开的管芯焊盘部分，设置成邻近管芯的内部引线并且形成在引线部分的水平部分的顶表面上，以及形成在引线部分的垂直部分的底表面上的外引线。根据本发明，可以制造由于精细电路图形而具有减少的线长的引线框架，由于可布线性而实现倒装芯片接合，并且可以提高由于膨胀结构而导致的焊接时的粘合强度。此外，可以防止制造过程中的翘曲现象。

5. 发明申请

WO2011055984A2 LEADFRAME AND METHOD OF MANUFACURING THE SAME 审中-公开
标题翻译： LEADFRAME及其制造方法
公开(公告)号：WO2011055984A2
公开(公告)日：2011-05-12
申请号：PCT/KR2010007730
申请日：2010-11-04
申请人： LG INNOTEK CO LTD , CHUN HYUN A , PARK CHUNG SIK , EOM SAI RAN , LEE HYUNG EUI
发明人： CHUN HYUN A , PARK CHUNG SIK , EOM SAI RAN , LEE HYUNG EUI
IPC分类号： H01L23/495 , H01L23/498
CPC分类号： H01L21/4828 , H01L23/495 , H01L23/49558 , H01L24/48 , H01L2224/32257 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2924/00014 , H01L2924/181 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： The present invention relates to a leadframe and a method for manufacturing the same. The leadframe includes a lead unit having vertical and horizontal parts, a die pad unit separated from the lead unit by an support unit formed of insulating material, an inner lead formed adjacent to the die pad unit and on the horizontal part of the lead unit, and an outer lead formed on a bottom surface of the vertical part of the lead unit. Such a structure of the leadframe shortens a wire length, allows flip chip bonding, and improves soldering adhesive. The structure of the leadframe enhances physical strength thereof by enhancing a support force of an insulator. Moreover, the leadframe includes a fine plating pattern having a small plating deviation and a superior structure, and has excellent durability and improved thermal conduction by entirely plating surfaces of the die pad.
摘要翻译：引线框架及其制造方法技术领域本发明涉及一种引线框架及其制造方法。引线框架包括具有垂直和水平部分的引线单元，通过由绝缘材料形成的支撑单元与引线单元分离的管芯焊盘单元，邻近管芯焊盘单元和引线单元的水平部分形成的内部引线，以及形成在引线单元的垂直部分的底表面上的外部引线。引线框架的这种结构缩短了导线长度，允许倒装芯片结合，并改善了焊接粘合剂。引线框架的结构通过增强绝缘体的支撑力来提高其物理强度。此外，引线框架包括具有小电镀偏差和优良结构的精细电镀图案，并且通过整个电镀芯片焊盘的表面而具有优异的耐久性和改善的热传导。

6. 发明公开

KR20120016968A Leadframe and method for manufacturing the same 有权
标题翻译： LEADFRAME及其制造方法
公开(公告)号：KR20120016968A
公开(公告)日：2012-02-27
申请号：KR20100079536
申请日：2010-08-17
申请人： LG INNOTEK CO LTD
发明人： PARK CHUNG SIK , LEE HYUNG EUI , CHUN HYUN A , EOM SAI RAN
IPC分类号： H01L23/495
CPC分类号： H01L2224/45139 , H01L2224/48091 , H01L2924/00014 , H01L2924/00
摘要： PURPOSE: A lead frame and a manufacturing method thereof are provided to improve processing efficiency by forming 2 lead frames at the same time. CONSTITUTION: A semiconductor chip is mounted on the first surface of a die-pad part. A plurality of lead parts(100) electrically interlinks the semiconductor chip to an external circuit. A plurality of lead parts is extended from the first surface to a second surface which is opposed to the first surface. A plurality of lead parts is separated each other. An insulating layer(140) is formed on the first surface and insulates between the lead parts and between the lead part and the die-pad part. A supporting part(110) is formed on the second surface and includes insulating materials and insulates between the lead parts.
摘要翻译：目的：提供引线框及其制造方法，以通过同时形成2个引线框来提高加工效率。构成：半导体芯片安装在芯片部分的第一表面上。多个引线部分（100）将半导体芯片电连接到外部电路。多个引线部分从第一表面延伸到与第一表面相对的第二表面。多个引线部分彼此分离。绝缘层（140）形成在第一表面上并且在引线部分之间以及引线部分和芯片焊盘部分之间绝缘。支撑部分（110）形成在第二表面上并且包括绝缘材料并且在引线部分之间绝缘。

7. 发明公开

KR20120003125A Leadframe and method of manufacturig same 有权
标题翻译： LEADFRAME和制造方法
公开(公告)号：KR20120003125A
公开(公告)日：2012-01-10
申请号：KR20100063798
申请日：2010-07-02
申请人： LG INNOTEK CO LTD
发明人： PARK CHUNG SIK , LEE HYUNG EUI , CHUN HYUN A , EOM SAI RAN
IPC分类号： H01L23/495 , H01L23/52
CPC分类号： H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2224/92247 , H01L2924/00014 , H01L2924/00
摘要： PURPOSE: A lead frame and a manufacturing method thereof are provided to improve adhesion between a completed package and a PCB by thickening the lower thickness of a bump than the upper thickness of the bump. CONSTITUTION: A bump is formed on the side of an insulation unit. A first metal unit(195b) is formed on the bump. A lead unit(165a) is formed on the insulation unit and is connected to the first metal unit. An inner lead(180a) is plated on the upper side of the lead unit which is adjacent to a die pad unit. An outer lead(180b) is formed on the lower side of the bump.
摘要翻译：目的：提供一种引线框架及其制造方法，通过增加突起的厚度比凸起的较高厚度来增加完成的封装和PCB之间的粘合。构成：在绝缘单元的侧面形成凸点。第一金属单元（195b）形成在凸块上。引线单元（165a）形成在绝缘单元上并连接到第一金属单元。内引线（180a）被电镀在与引线单元相邻的引线单元的上侧。在凸块的下侧形成有外引线（180b）。

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