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1. 发明申请

WO02080230A2 METHOD OF PLASMA ETCHING LOW-K DIELECTRIC MATERIALS 审中-公开
标题翻译：等离子体蚀刻低K电介质材料的方法
公开(公告)号：WO02080230A2
公开(公告)日：2002-10-10
申请号：PCT/US0206648
申请日：2002-03-21
申请人： LAM RES CORP , LI SI YI , ZHU HELEN H , SADJADI S M REZA , TIETZ JAMES V , HELMER BRYAN A
发明人： LI SI YI , ZHU HELEN H , SADJADI S M REZA , TIETZ JAMES V , HELMER BRYAN A
IPC分类号： H01L21/311 , H01L21/768 , H01L
CPC分类号： H01L21/7681 , H01L21/31116 , H01L21/31138 , H01L21/76807
摘要： A semiconductor manufacturing process wherein organosilicate glass is plasma etched with selectivity to an overlying and/or underlying dielectric layer. The oxygen-free etchant gas includes a fluorocarbon reactant, a nitrogen reactant and an optional carrier gas, the fluorocarbon reactant and nitrogen reactant being supplied to the chamber at flow rates such that the fluorocarbon reactant flow rate is less than the nitrogen reactant flow rate. The etch rate of the organosilicate glass can be at least 5 times higher than that of the dielectric layer. The process is useful for etching 0.25 micron and smaller contact or via openings in forming structures such as damascene structures.
摘要翻译：半导体制造方法，其中有机硅酸盐玻璃被等离子体蚀刻，对上覆和/或下面的介电层具有选择性。无氧蚀刻剂气体包括氟碳反应物，氮反应物和任选的载气，氟烃反应物和氮反应物以流速供应到室，使得碳氟化合物反应物流速小于氮反应物流速。有机硅酸盐玻璃的蚀刻速率可以比介电层的蚀刻速率高至少5倍。该方法对于在形成结构如镶嵌结构中蚀刻0.25微米和较小的接触或通孔开口是有用的。

2. 发明申请

WO2004102277B1 METHOD PROVIDING AN IMPROVED BI-LAYER PHOTORESIST PATTERN 审中-公开
标题翻译：提供改进的双层光电子图案的方法
公开(公告)号：WO2004102277B1
公开(公告)日：2005-03-03
申请号：PCT/US2004013818
申请日：2004-04-29
申请人： LAM RES CORP , XIAO HANZHONG , ZHU HELEN H , TANG KUO-LUNG , SADJADI S M REZA
发明人： XIAO HANZHONG , ZHU HELEN H , TANG KUO-LUNG , SADJADI S M REZA
IPC分类号： G03F7/09 , G03F7/36 , H01L21/027 , H01L21/033 , H01L21/311 , H01L21/768
CPC分类号： H01L21/31138 , H01L21/0273 , H01L21/0332 , H01L21/31144
摘要： A method for etching a feature in a layer is provided. An underlayer of a polymer material is formed over the layer. A top image layer is formed over the underlayer. The top image layer is exposed to patterned radiation. A pattern is developed in the top image layer. The pattern is transferred from the top image layer to the underlayer with a reducing dry etch. The layer is etched through the underlayer, where the top image layer is completely removed and the underlayer is used as a pattern mask during the etching the layer to transfer the pattern from the underlayer to the layer.
摘要翻译：提供了蚀刻层中的特征的方法。在该层上形成聚合物材料的底层。在底层上形成顶部图像层。顶部图像层暴露于图案化辐射。在顶层图像层中开发出图案。该图案通过减少的干蚀刻从顶部图像层转移到底层。该层被蚀刻通过底层，其中顶部图像层被完全去除，并且在蚀刻层期间将底层用作图案掩模，以将图案从底层转移到层。

3. 发明申请

WO2004102277A2 METHOD PROVIDING AN IMPROVED BI-LAYER PHOTORESIST PATTERN 审中-公开
标题翻译：提供改进的双层光电子图案的方法
公开(公告)号：WO2004102277A2
公开(公告)日：2004-11-25
申请号：PCT/US2004013818
申请日：2004-04-29
申请人： LAM RES CORP , XIAO HANZHONG , ZHU HELEN H , TANG KUO-LUNG , SADJADI S M REZA
发明人： XIAO HANZHONG , ZHU HELEN H , TANG KUO-LUNG , SADJADI S M REZA
IPC分类号： G03F7/09 , G03F7/36 , H01L21/027 , H01L21/033 , H01L21/311 , H01L21/768
CPC分类号： H01L21/31138 , H01L21/0273 , H01L21/0332 , H01L21/31144
摘要： A method for etching a feature in a layer is provided. An underlayer of a polymer material is formed over the layer. A top image layer is formed over the underlayer. The top image layer is exposed to patterned radiation. A pattern is developed in the top image layer. The pattern is transferred from the top image layer to the underlayer with a reducing dry etch. The layer is etched through the underlayer, where the top image layer is completely removed and the underlayer is used as a pattern mask during the etching the layer to transfer the pattern from the underlayer to the layer.
摘要翻译：提供了蚀刻层中的特征的方法。在该层上形成聚合物材料的底层。在底层上形成顶层图像层。顶部图像层暴露于图案化辐射。在顶部图像层中开发出图案。图案通过减少的干蚀刻从顶部图像层转移到底层。该层被蚀刻通过底层，其中顶部图像层被完全去除，并且在蚀刻该层期间将底层用作图案掩模以将图案从底层转移到该层。

4. 发明申请

WO02065512A3 PROCESS FOR ETCHING ORGANIC LOW-K MATERIALS 审中-公开
标题翻译：蚀刻有机低K材料的方法
公开(公告)号：WO02065512A3
公开(公告)日：2003-03-13
申请号：PCT/US0202926
申请日：2002-01-29
申请人： LAM RES CORP , ZHU HELEN H , BOWERS JAMES R , MOREY IAN J , BABIE WAYNE , GOSS MICHAEL
发明人： ZHU HELEN H , BOWERS JAMES R , MOREY IAN J , BABIE WAYNE , GOSS MICHAEL
IPC分类号： H01L21/311
CPC分类号： H01L21/31138
摘要： Method for etching a feature in an integrated circuit wafer with minimized effect of micromasking. The method introduces a flow of etchant gas including a fluorocarbon gas to the wafer, and uses the etchant gas to form a plasma in proximity with at least a portion of the wafer. The plasma is used to etch at least a portion of the feature in the wafer. Disassociation of the fluorocarbon into fluorine and hydrocarbon species performs two functions. The fluorine species prevents or significantly reduces sputtered hardmask components from depositing on the floor of the etched feature during etching. The hydrocarbon species acts to form a passivation layer on the sidewalls of the feature.
摘要翻译：用微蚀刻效应最小化在集成电路晶片中蚀刻特征的方法。该方法将包括碳氟化合物气体的蚀刻剂气体流引入晶片，并且使用蚀刻剂气体在晶片的至少一部分附近形成等离子体。等离子体用于蚀刻晶片中的特征的至少一部分。将碳氟化合物分解成氟和烃类具有两个功能。氟化物防止或显着减少溅射的硬掩模组分在蚀刻期间沉积在蚀刻特征的地板上。烃类起到在特征的侧壁上形成钝化层的作用。

5. 发明申请

WO2005050700A3 LINE EDGE ROUGHNESS REDUCTION FOR TRENCH ETCH 审中-公开
标题翻译：线边缘粗糙度减少
公开(公告)号：WO2005050700A3
公开(公告)日：2005-12-01
申请号：PCT/US2004036746
申请日：2004-11-03
申请人： LAM RES CORP , WAGGANER ERIC , ZHU HELEN H , LE DANIEL , LOEWENHARDT PETER
发明人： WAGGANER ERIC , ZHU HELEN H , LE DANIEL , LOEWENHARDT PETER
IPC分类号： H01L20060101 , H01L21/311 , H01L21/4763 , H01L21/768
CPC分类号： H01J37/32082 , H01L21/31116 , H01L21/31138 , H01L21/31144 , H01L21/76802
摘要： A method for etching a trench (314, Fig. 3B) to a trench depth (318, Fig. 3B) in a dielectric layer (308, Fig. 3B) over a substrate (304, Fig. 3B) is provided. An ARC (310, Fig. 3B) is applied over the dielectric layer (308, Fig. 3B). A photoresist mask (312, Fig. 3B) is formed on the ARC (310, Fig. 3B), where the photoresist mask has a thickness. The ARC is etched through. A trench (314, Fig. 3B) is etched into the dielectric layer with a dielectric to photoresist etch selectivity between 1:1 and 2:1.
摘要翻译：提供了一种用于在衬底（304，图3B）上的介电层（图3B中的308）蚀刻沟槽（314，图3B）到沟槽深度（318，图3B）的方法。将ARC（图3B）310施加在电介质层（图3B的308）上。在ARC（310，图3B））上形成光致抗蚀剂掩模（312，图3B），其中光致抗蚀剂掩模具有厚度。 ARC蚀刻通过。在介质层中蚀刻具有介于1：1和2：1之间的光致抗蚀剂蚀刻选择性的沟槽（314，图3B）。

6. 发明公开

EP1683194A4 LINE EDGE ROUGHNESS REDUCTION FOR TRENCH ETCH 审中-公开
标题翻译： LINIENÄTZ-RAUHIGKEITREDUKTIONFÜRDIEGRABENÄTZUNG
公开(公告)号：EP1683194A4
公开(公告)日：2008-06-25
申请号：EP04810317
申请日：2004-11-03
申请人： LAM RES CORP
发明人： WAGGANER ERIC , ZHU HELEN H , LE DANIEL , LOEWENHARDT PETER
IPC分类号： H01L21/4763 , H01L20060101 , H01L21/311 , H01L21/768
CPC分类号： H01J37/32082 , H01L21/31116 , H01L21/31138 , H01L21/31144 , H01L21/76802
摘要： A method for etching a trench (314, Fig. 3B) to a trench depth (318, Fig. 3B) in a dielectric layer (308, Fig. 3B) over a substrate (304, Fig. 3B) is provided. An ARC (310, Fig. 3B) is applied over the dielectric layer (308, Fig. 3B). A photoresist mask (312, Fig. 3B) is formed on the ARC (310, Fig. 3B), where the photoresist mask has a thickness. The ARC is etched through. A trench (314, Fig. 3B) is etched into the dielectric layer with a dielectric to photoresist etch selectivity between 1:1 and 2:1.
摘要翻译：提供了用于在衬底（304，图3B）上方的介电层（308，图3B）中蚀刻沟槽（314，图3B）至沟槽深度（318，图3B）的方法。在介电层（308，图3B）上施加ARC（310，图3B）。在ARC（310，图3B）上形成光致抗蚀剂掩模（312，图3B），其中光致抗蚀剂掩模具有厚度。 ARC被蚀刻穿过。用介电材料将沟槽（图3B中的314）蚀刻到介电层中，使光致抗蚀剂蚀刻选择性在1：1和2：1之间。

7. 发明申请

WO9910923B1 METHOD FOR SELECTIVE PLASMA ETCH 审中-公开
标题翻译：选择性等离子体蚀刻的方法
公开(公告)号：WO9910923B1
公开(公告)日：1999-05-14
申请号：PCT/US9817607
申请日：1998-08-25
申请人： LAM RES CORP
发明人： ZHU HELEN H , MUELLER GEORGE A , NGUYEN THOMAS D , LI LUMIN
IPC分类号： H01L21/302 , H01L21/3065 , H01L21/311
CPC分类号： H01L21/31116
摘要： Disclosed is a method for improving the selectivity of dielectric layers to photoresist layers and base layers. The method is performed in a plasma processing chamber, and the photoresist layer is coated over the dielectric layer. The method includes introducing an etchant source gas into the plasma processing chamber, which consists essentially of a CxFy gas and an N2 gas. The method further includes striking a plasma in the plasma processing chamber from the etchant source gas. The method additionally includes etching at least a portion of the dielectric layer with the plasma through to a base layer that underlies the dielectric layer. The method is also well suited for anisotropically etching an oxide layer with very high selectivities to Si, Si3N4, TiN, and metal silicides.
摘要翻译：公开了一种用于改善电介质层对光致抗蚀剂层和基层的选择性的方法。该方法在等离子体处理室中执行，并且光致抗蚀剂层被涂覆在介电层上。该方法包括将蚀刻剂源气体引入等离子体处理室，该等离子体处理室基本上由CxFy气体和N 2气体组成。该方法还包括在等离子体处理室中从蚀刻剂源气体中打出等离子体。该方法另外包括用等离子体将至少一部分介电层蚀刻到位于介电层下面的基底层。该方法也非常适合于对Si，Si 3 N 4，TiN和金属硅化物具有非常高的选择性的各向异性蚀刻氧化物层。

8. 发明专利

AU2002240212A1 Process for etching organic low-k materials 未知
公开(公告)号：AU2002240212A1
公开(公告)日：2002-08-28
申请号：AU2002240212
申请日：2002-01-29
申请人： LAM RES CORP
发明人： ZHU HELEN H , MOREY IAN J , BOWERS JAMES R , BABIE WAYNE , GOSS MICHAEL
IPC分类号： H01L21/311
摘要： Method for etching a feature in an integrated circuit wafer with minimized effect of micromasking. The method introduces a flow of etchant gas including a fluorocarbon gas to the wafer, and uses the etchant gas to form a plasma in proximity with at least a portion of the wafer. The plasma is used to etch at least a portion of the feature in the wafer. Disassociation of the fluorocarbon into fluorine and hydrocarbon species performs two functions. The fluorine species prevents or significantly reduces sputtered hardmask components from depositing on the floor of the etched feature during etching. The hydrocarbon species acts to form a passivation layer on the sidewalls of the feature.

9. 发明专利

SG10201510382QA SELECTIVE NITRIDE ETCH 未知
公开(公告)号：SG10201510382QA
公开(公告)日：2016-07-28
申请号：SG10201510382Q
申请日：2015-12-17
申请人： LAM RES CORP
发明人： BERRY III IVAN L , ANGELOV IVELIN A , MARQUEZ LINDA , YAQOOB FAISAL , PARK PILYEON , ZHU HELEN H , THEDJOISWORO BAYU ATMAJA , LI ZHAO

10. 发明专利

AU2002250223A1 Method of plasma etching low-k organosilicate materials 未知
公开(公告)号：AU2002250223A1
公开(公告)日：2002-10-15
申请号：AU2002250223
申请日：2002-03-21
申请人： LAM RES CORP
发明人： HELMER BRYAN A , ZHU HELEN H , TIETZ JAMES V , LI SI YI , SADJADI S M REZA
IPC分类号： H01L21/311 , H01L21/768
摘要： A semiconductor manufacturing process wherein a low-k dielectric layer is plasma etched with selectivity to an overlying mask layer. The etchant gas can be oxygen-free and include a fluorocarbon reactant, a nitrogen reactant and an optional carrier gas, the fluorocarbon reactant and nitrogen reactant being supplied to a chamber of a plasma etch reactor at flow rates such that the fluorocarbon reactant flow rate is less than the nitrogen reactant flow rate. The etch rate of the low-k dielectric layer can be at least 5 times higher than that of a silicon dioxide, silicon nitride, silicon oxynitride or silicon carbide mask layer. The process is useful for etching 0.25 micron and smaller contact or via openings in forming structures such as damascene structures.

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