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    • 1. 发明授权
    • Disk cache control unit
    • 磁盘缓存控制单元
    • US5369751A
    • 1994-11-29
    • US721928
    • 1991-06-21
    • Kosaku KambayashiKatsunori NakamuraTakao SatohYoshihiro AsakaTeruo Nagasawa
    • Kosaku KambayashiKatsunori NakamuraTakao SatohYoshihiro AsakaTeruo Nagasawa
    • G06F12/08G06F3/06G06F13/00
    • G06F12/0866
    • A disk cache control unit disposed between an upper-rank processor and a disk unit, comprising a cache memory for holding a copy of data stored in the disk unit, at least one first interface controller which checks, in response to an input/output command requesting data to be read from the upper-rank processor, whether or not the data requested by the command is stored in the cache memory, and requests a head positioning of the disk unit when the data is not stored in the cache memory, and a second interface controller which indicates head positioning to the disk unit in response to a head positioning request, notifies the completion of the head positioning to the first interface controller in response to a notice of the completion of the head positioning, and which reads data from the disk unit and stores the data in the cache memory when a data transfer request did not come in a specified time period set to read data from the disk unit without a rotational delay after a notice of the head positioning head been given to the first interface controller and the subsequent transfer of data from the second interface controller had been completed, and which gives a notice of storage of the data in the cache memory through memory means to the first interface controller, and in response to this storage notice, the first interface controller reads the data from the cache memory and transfers the data to the upper-rank processor.
    • 布置在高级处理器和盘单元之间的盘缓存控制单元,包括用于保存存储在盘单元中的数据的副本的高速缓存存储器,至少一个第一接口控制器,其响应于输入/输出命令 请求数据从高级处理器读取,无论命令所请求的数据是否存储在高速缓冲存储器中,并且当数据未存储在高速缓冲存储器中时请求磁盘单元的磁头定位, 第二接口控制器,其响应于头部定位请求指示到盘单元的头部定位,响应于头部定位的完成的通知,将头部定位的完成通知给第一接口控制器,并且从第 磁盘单元,并且当数据传输请求没有进入设置为在没有旋转延迟的情况下从盘单元读取数据的指定时间段内时,将数据存储在高速缓冲存储器中 头部定位头已经被提供给第一接口控制器,并且随后从第二接口控制器传送数据已经完成,并且通过存储器装置将数据存储在高速缓冲存储器中通知给第一接口控制器,并且在 响应于该存储通知,第一接口控制器从高速缓冲存储器读取数据并将数据传送到高级处理器。
    • 2. 发明授权
    • Disk cache unit having reduced waiting times for data transfer
    • 磁盘缓存单元具有减少数据传输的等待时间
    • US5475859A
    • 1995-12-12
    • US231916
    • 1994-04-25
    • Kosaku KamabayashiKatsunori NakamuraTakao SatohTeruo Nagasawa
    • Kosaku KamabayashiKatsunori NakamuraTakao SatohTeruo Nagasawa
    • G06F12/08G06F3/06G06F13/00
    • G06F12/0866
    • A disk cache control unit disposed between an upper-rank processor and a disk unit, comprising a cache memory for holding a copy of data stored in the disk unit, at least one first interface controller which checks, in response to an input/output command requesting data to be read from the upper-rank processor, whether or not the data requested by the command is stored in the cache memory, and requests a head positioning of the disk unit when the data is not stored in the cache memory, and a second interface controller which indicates head positioning to the disk unit in response to a head positioning request, notifies the completion of the head positioning to the first interface controller in response to a notice of the completion of the head positioning, and which reads data from the disk unit and stores the data in the cache memory when a data transfer request did not come in a specified time period set to read data from the disk unit without a rotational delay after a notice of the head positioning head been given to the first interface controller and the subsequent transfer of data from the second interface controller had been completed, and which gives a notice of storage of the data in the cache memory through memory means to the first interface controller, and in response to this storage notice, the first interface controller reads the data from the cache memory and transfers the data to the upper-rank processor.
    • 布置在高级处理器和盘单元之间的盘缓存控制单元,包括用于保存存储在盘单元中的数据的副本的高速缓存存储器,至少一个第一接口控制器,其响应于输入/输出命令 请求数据从高级处理器读取,无论命令所请求的数据是否存储在高速缓冲存储器中,并且当数据未存储在高速缓冲存储器中时请求磁盘单元的磁头定位, 第二接口控制器,其响应于头部定位请求指示到盘单元的头部定位,响应于头部定位的完成的通知,将头部定位的完成通知给第一接口控制器,并且从第 磁盘单元,并且当数据传输请求没有进入设置为在没有旋转延迟的情况下从盘单元读取数据的指定时间段内时,将数据存储在高速缓冲存储器中 头部定位头已经被提供给第一接口控制器,并且来自第二接口控制器的后续的数据传输已经完成,并且其通过存储器装置向第一接口控制器通知将数据存储在高速缓冲存储器中,并且在 响应于该存储通知,第一接口控制器从高速缓冲存储器读取数据并将数据传送到高级处理器。
    • 8. 发明授权
    • Subsystem replacement method
    • 子系统更换方法
    • US06240494B1
    • 2001-05-29
    • US09212410
    • 1998-12-16
    • Teruo NagasawaTakeshi KoideKatsunori Nakamura
    • Teruo NagasawaTakeshi KoideKatsunori Nakamura
    • G06F1208
    • G06F3/0607G06F3/0647G06F3/0683G06F3/0689G06F11/1423G06F11/2071G06F11/2082
    • In order to enable data migration between old and new subsystems to be performed under stopless operation, a plurality of first access paths are prepared between a CPU and an old CU (old subsystem) having an old VOL and a plurality of third access paths are set between the old CU and a new CU (new subsystem) having a new VOL. The connection is switched from the first access paths of the old subsystem as a replacement source to the second access paths of the new subsystem as a replacement destination on a plurality of occasions. When the CPU accesses the new subsystem via the second access paths on the new subsystem side during the connection change, a path replacement controller relays the access to the old subsystem via the third access paths and allows the access to be processed. Data migration from the old subsystem to the new subsystem is executed after all of the first access paths are switched to the second access paths.
    • 为了使旧系统和新子系统之间的数据迁移能够在无级运行下进行,在CPU和具有旧VOL的旧CU(旧子系统)和多个第三访问路径被设置之间准备多个第一访问路径 在旧的CU和具有新的VOL的新的CU(新的子系统)之间。 在多个场合,连接从作为替换源的旧系统的第一访问路径切换到新子系统的第二访问路径作为替换目的地。 当CPU在连接更改期间通过新子系统侧的第二个访问路径访问新子系统时,路径更换控制器通过第三个访问路径中继对旧系统的访问,并允许访问进行处理。 在将所有第一访问路径切换到第二访问路径之后,执行从旧子系统到新子系统的数据迁移。
    • 9. 发明授权
    • Subsystem replacement method
    • 子系统更换方法
    • US06647476B2
    • 2003-11-11
    • US09742191
    • 2000-12-22
    • Teruo NagasawaTakeshi KoideKatsunori Nakamura
    • Teruo NagasawaTakeshi KoideKatsunori Nakamura
    • G06F1202
    • G06F3/0607G06F3/0647G06F3/0683G06F3/0689G06F11/1423G06F11/2071G06F11/2082
    • In order to enable data migration between old and new subsystems to be performed under stopless operation, a plurality of first access paths and are prepared between a CPU and an old CU (old subsystem) having an old VOL and a plurality of third access paths and are set between the old CU and a new CU (new subsystem) having a new VOL. The connection is switched from the first access paths and of the old subsystem as a replacement source to the second access paths and of the new subsystem as a replacement destination on a plurality of occasions. When the CPU accesses the new subsystem via the second access paths and on the new subsystem side during the connection change, a path replacement controller relays the access to the old subsystem via the third access paths and and allows the access to be processed. Data migration from the old subsystem to the new subsystem is executed after all of the first access paths are switched to the second access paths.
    • 为了使得能够在无级操作下执行旧系统和新子系统之间的数据迁移,在CPU和具有旧VOL和多个第三接入路径的旧CU(旧系统)之间准备多个第一接入路径,以及 设置在旧CU和具有新VOL的新CU(新子系统)之间。 在多个场合,连接从作为替换源的第一访问路径和旧子系统切换到第二访问路径和新子系统作为替换目的地。 当CPU在连接改变期间通过第二访问路径和新的子系统侧访问新的子系统时,路径更换控制器通过第三访问路径中继对旧的子系统的访问,并且允许访问被处理。 在将所有第一访问路径切换到第二访问路径之后,执行从旧子系统到新子系统的数据迁移。