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    • 2. 发明授权
    • Optical integrated circuit
    • 光集成电路
    • US4693543A
    • 1987-09-15
    • US711507
    • 1985-03-07
    • Hiroyoshi MatsumuraKoji Ishida
    • Hiroyoshi MatsumuraKoji Ishida
    • G02B6/12G02B6/122G02F1/01G02F1/025G02F1/03G02F1/035G02F1/313
    • G02F1/011G02B6/122
    • The present invention relates to an improvement in the optical transmission characteristics of a ridged type of optical waveguide in an optical integrated circuit. The invention is directed to reducing the effects of irregularities in the ridge sides on the optical transmission losses of the optical waveguide. According to the present invention, therefore, a hardened film of a heat-resistant, high-molecular resin is applied over the ridges and the optical waveguide, greatly reducing the optical transmission losses in the optical waveguide. An appropriate thickness of the heat-resistant, high-molecular resin film is between 200 to 1,000 nm, in consideration of the electric and magnetic fields applied thereto for the operation of the circuit. The present invention makes it possible to provide an optical integrated circuit with an optical waveguide which has low optical transmission losses.
    • PCT No.PCT / JP84 / 00311 Sec。 371日期:1985年3月7日 102(e)1985年3月7日PCT申请日1984年6月15日PCT公布。 公开号WO85 / 00431 日本1985年1月31日。本发明涉及光集成电路中脊形光波导的光传输特性的改进。 本发明旨在减少脊侧上的不规则性对光波导的光传输损耗的影响。 因此,根据本发明,在脊和光波导上施加耐热高分子树脂的硬化膜,大大降低了光波导中的光传输损耗。 考虑到施加到其上的用于操作电路的电场和磁场,耐热高分子树脂膜的适当厚度在200至1000nm之间。 本发明使得可以提供具有低光传输损耗的光波导的光集成电路。
    • 7. 发明授权
    • IF Signal processing circuit in a receiver
    • IF接收机中的信号处理电路
    • US4476586A
    • 1984-10-09
    • US464167
    • 1983-02-07
    • Koji Ishida
    • Koji Ishida
    • H03D3/00H04B1/26
    • H03D3/004
    • In an IF signal processing circuit in an FM receiver, distortion introduced by an IF filter is eliminated without degrading a selection characteristic thereof. The circuit includes a front end which converts an FM-RF signal into a first IF signal; an IF filter; an FM detector which detects the first IF signal which has passed through the IF filter; an FM modulation circuit which outputs an FM modulation signal in accordance with a detection output of the FM detector; a mixer for mixing the FM modulation signal with the first IF signal and providing a second IF signal; and another mixer for mixing the second IF signal with the FM modulation signal to convert into the first IF signal. The first IF signal thus converted is delivered to an FM detector.
    • 在FM接收机中的IF信号处理电路中,消除由IF滤波器引入的失真,而不降低其选择特性。 该电路包括将FM-RF信号转换成第一IF信号的前端; 中频滤波器 FM检测器,其检测已经通过IF滤波器的第一IF信号; FM调制电路,其根据FM检测器的检测输出输出FM调制信号; 混频器,用于将FM调制信号与第一IF信号混频并提供第二IF信号; 以及用于将第二IF信号与FM调制信号混合以转换成第一IF信号的另一个混频器。 如此转换的第一IF信号被传送到FM检测器。
    • 8. 发明授权
    • Semiconductor integrated circuit
    • 半导体集成电路
    • US08436352B2
    • 2013-05-07
    • US13156681
    • 2011-06-09
    • Yoshinobu KanedaKoji Ishida
    • Yoshinobu KanedaKoji Ishida
    • H01L23/58
    • G01R31/2896G01R31/2884H01L23/585H01L23/647H01L2224/13H01L2924/13091H01L2924/00
    • Whether there is a defect such as chipping of a die or separation of a resin in a wafer level package is electrically detected. A peripheral wiring is disposed along four peripheries of a semiconductor substrate outside a circuit region and pad electrodes P1-P8. The peripheral wiring is formed on the semiconductor substrate and is made of a metal layer that is the same layer as or an upper layer of a metal layer forming the pad electrodes P1-P8, or a polysilicon layer. A power supply electric potential Vcc is applied to a first end of the peripheral wiring, while a ground electric potential Vss is applied to a second end of the peripheral wiring through a resistor R2. A detection circuit is connected to a connecting node N1 between the peripheral wiring and the resistor R2, and is structured to generate an anomaly detection signal ERRFLG based on an electric potential at the connecting node N1.
    • 电子检测是否存在诸如芯片碎裂或晶片级封装中树脂分离的缺陷。 外围布线沿着电路区域外侧的半导体基板的四周以及焊盘电极P1〜P8配置。 外围布线形成在半导体基板上,并且由与构成焊盘电极P1-P8的金属层相同的层或上层的金属层或多晶硅层构成。 电源电位Vcc被施加到外围配线的第一端,而接地电位Vss通过电阻器R2施加到外围配线的第二端。 检测电路与外围配线和电阻R2之间的连接节点N1连接,构成为根据连接节点N1的电位生成异常检测信号ERRFLG。