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1. 发明授权

US06986198B2 Method of forming printed circuit card 失效
标题翻译：形成印刷电路卡的方法
公开(公告)号：US06986198B2
公开(公告)日：2006-01-17
申请号：US10744142
申请日：2003-12-22
申请人： Kenneth Fallon , Miguel A. Jimarez , Ross W. Keesler , John M. Lauffer , Roy H. Magnuson , Voya R. Markovich , Irv Memis , Jim P. Paoletti , Marybeth Perrino , John A. Welsh , William E. Wilson
发明人： Kenneth Fallon , Miguel A. Jimarez , Ross W. Keesler , John M. Lauffer , Roy H. Magnuson , Voya R. Markovich , Irv Memis , Jim P. Paoletti , Marybeth Perrino , John A. Welsh , William E. Wilson
IPC分类号： H05K3/36
CPC分类号： H05K3/445 , H01L23/49827 , H01L23/49833 , H01L23/50 , H01L2924/0002 , H05K1/056 , H05K1/113 , H05K3/0023 , H05K3/0052 , H05K3/0094 , H05K3/06 , H05K3/108 , H05K3/426 , H05K3/429 , H05K3/44 , H05K3/4623 , H05K3/4641 , H05K2201/0919 , H05K2201/09536 , H05K2201/09554 , H05K2201/096 , H05K2201/10734 , H05K2203/0323 , H05K2203/0574 , H05K2203/0733 , H05K2203/1394 , Y10T29/49117 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165 , H01L2924/00
摘要： A method of forming a printed circuit card with a metal power plane layer between two photoimageable dielectric layers is provided. Photoformed metal filled vias plated through holes are in the photopatternable material, and signal circuitry is on the surfaces of each of the dielectric materials connected to the vias and plated through holes. A border may be around the card including a metal layer termination in from the edge of one of the dielectric layers. Copper foil with clearance holes is provided. First and second layers of photoimageable curable dielectric material are on opposite sides of the copper. Patterns are developed on the first and second layers of the photoimageable material to reveal the metal layer through vias. Through holes are developed where holes were patterned in both dielectric layers. The surfaces of the photoimageable material, vias and through holes are metallized by copper plating, preferably using photoresist.
摘要翻译：提供了一种在两个可光成像的电介质层之间形成具有金属功率平面层的印刷电路卡的方法。通过孔穿过的光刻金属填充通孔位于光图案化材料中，信号电路位于连接到通孔和电镀通孔的每个介电材料的表面上。边框可以在卡周围，包括从电介质层之一的边缘终止的金属层。提供带有间隙孔的铜箔。第一层和第二层可光成像的可固化电介质材料位于铜的相对两侧。在可光成像材料的第一层和第二层上形成图案以通过通孔显露金属层。开发了通孔，在两个电介质层中对其进行图案化。可光成像材料，通孔和通孔的表面通过镀铜进行金属化，优选使用光致抗蚀剂。

2. 发明授权

US06750405B1 Two signal one power plane circuit board 有权
标题翻译：两个信号一个电源平面电路板
公开(公告)号：US06750405B1
公开(公告)日：2004-06-15
申请号：US09690485
申请日：2000-10-17
申请人： Kenneth Fallon , Miguel A. Jimarez , Ross W. Keesler , John M. Lauffer , Roy H. Magnuson , Voya R. Markovich , Irv Memis , Jim P. Paoletti , Marybeth Perrino , John A. Welsh , William E. Wilson
发明人： Kenneth Fallon , Miguel A. Jimarez , Ross W. Keesler , John M. Lauffer , Roy H. Magnuson , Voya R. Markovich , Irv Memis , Jim P. Paoletti , Marybeth Perrino , John A. Welsh , William E. Wilson
IPC分类号： H01R1204
CPC分类号： H05K3/445 , H01L23/49827 , H01L23/49833 , H01L23/50 , H01L2924/0002 , H05K1/056 , H05K1/113 , H05K3/0023 , H05K3/0052 , H05K3/0094 , H05K3/06 , H05K3/108 , H05K3/426 , H05K3/429 , H05K3/44 , H05K3/4623 , H05K3/4641 , H05K2201/0919 , H05K2201/09536 , H05K2201/09554 , H05K2201/096 , H05K2201/10734 , H05K2203/0323 , H05K2203/0574 , H05K2203/0733 , H05K2203/1394 , Y10T29/49117 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165 , H01L2924/00
摘要： A method of forming a printed circuit board or circuit card is provided with a metal layer which serves as a power plane sandwiched between a pair of photoimageable dielectric layers. Photoformed metal filled vias and photoformed plated through holes are in the photopatternable material, and signal circuitry is on the surfaces of each of the dielectric materials and connected to the vias and plated through holes. A border may be around the board or card including a metal layer terminating in from the edge of one of the dielectric layers. A copper foil is provided with clearance holes. First and second layers of photoimageable curable dielectric material is disposed on opposite sides of the copper which are photoimageable material. The patterns are developed on the first and second layers of the photoimageable material to reveal the metal layer through vias. At the clearance holes in the copper, through holes are developed where holes were patterned in both dielectric layers. Thereafter, the surfaces of the photoimageable material, vias and through holes are metalized by copper plating. This is preferably done by protecting the remainder of the circuitry with photoresist and utilizing photolithographic techniques. The photoresist is thereafter removed, leaving a circuit board or card having metalization on both sides, vias extending from both sides to the copper layer in the center, plated through holes connecting the two outer circuitized copper layers.
摘要翻译：形成印刷电路板或电路卡的方法设置有用作夹在一对可光成像的电介质层之间的电力平面的金属层。光刻图形金属填充的通孔和光成像的电镀通孔位于光图案化材料中，信号电路位于每个介电材料的表面上，并连接到通孔和电镀通孔。边界可以在板或卡周围，包括从电介质层之一的边缘终止的金属层。铜箔上设有间隙孔。可光成像的可固化介电材料的第一和第二层设置在作为可光成像的材料的铜的相对侧上。图案在可光成象材料的第一层和第二层上显影，以通过通孔显露金属层。在铜中的间隙孔处，通孔被开发成在两个电介质层中图案化孔。此后，可光成像材料，通孔和通孔的表面通过镀铜进行金属化。这优选通过用光致抗蚀剂和利用光刻技术保护电路的其余部分来实现。然后去除光致抗蚀剂，留下在两侧具有金属化的电路板或卡，其中心的两侧延伸到铜层，通孔连接两个外部电路化的铜层。

3. 发明授权

US07353590B2 Method of forming printed circuit card 失效
标题翻译：形成印刷电路卡的方法
公开(公告)号：US07353590B2
公开(公告)日：2008-04-08
申请号：US11224191
申请日：2005-09-12
申请人： Kenneth Fallon , Miguel A. Jimarez , Ross W. Keesler , John M. Lauffer , Roy H. Magnuson , Voya R. Markovich , Irv Memis , Jim P. Paoletti , Marybeth Perrino , John A. Welsh , William E. Wilson
发明人： Kenneth Fallon , Miguel A. Jimarez , Ross W. Keesler , John M. Lauffer , Roy H. Magnuson , Voya R. Markovich , Irv Memis , Jim P. Paoletti , Marybeth Perrino , John A. Welsh , William E. Wilson
IPC分类号： H05K3/36
CPC分类号： H05K3/445 , H01L23/49827 , H01L23/49833 , H01L23/50 , H01L2924/0002 , H05K1/056 , H05K1/113 , H05K3/0023 , H05K3/0052 , H05K3/0094 , H05K3/06 , H05K3/108 , H05K3/426 , H05K3/429 , H05K3/44 , H05K3/4623 , H05K3/4641 , H05K2201/0919 , H05K2201/09536 , H05K2201/09554 , H05K2201/096 , H05K2201/10734 , H05K2203/0323 , H05K2203/0574 , H05K2203/0733 , H05K2203/1394 , Y10T29/49117 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165 , H01L2924/00
摘要： A method of forming a printed circuit card with a metal power plane layer between two photoimageable dielectric layers is provided. Photoformed metal filled vias and plated through holes are in the photopatternable material, and signal circuitry is on the surfaces of each of the dielectric materials connected to the vias and plated through holes. A border may be around the card including a metal layer terminating in from the edge of one of the dielectric layers. Copper foil with clearance holes is provided. First and second layers of photoimageable curable dielectric material are on opposite sides of the copper. Patterns are developed on the first and second layers of the photoimageable material to reveal the metal layer through vias. Through holes are developed where holes were patterned in both dielectric layers. The surfaces of the photoimageable material, vias and through holes are metallized by copper plating, preferably using photoresist.
摘要翻译：提供了一种在两个可光成像的电介质层之间形成具有金属功率平面层的印刷电路卡的方法。光刻图形的金属填充通孔和电镀通孔位于光图案化材料中，信号电路位于连接到通孔和电镀通孔的每个介电材料的表面上。边框可以在卡的周围，包括从电介质层之一的边缘终止的金属层。提供带有间隙孔的铜箔。第一层和第二层可光成像的可固化电介质材料位于铜的相对两侧。在可光成像材料的第一层和第二层上形成图案以通过通孔显露金属层。开发了通孔，在两个电介质层中对其进行图案化。可光成像材料，通孔和通孔的表面通过镀铜进行金属化，优选使用光致抗蚀剂。

4. 发明授权

US06204453B1 Two signal one power plane circuit board 有权
标题翻译：两个信号一个电源平面电路板
公开(公告)号：US06204453B1
公开(公告)日：2001-03-20
申请号：US09203956
申请日：1998-12-02
申请人： Kenneth Fallon , Miguel A. Jimarez , Ross W. Keesler , John M. Lauffer , Roy H. Magnuson , Voya R. Markovich , Irv Memis , Jim P. Paoletti , Marybeth Perrino , John A. Welsh , William E. Wilson
发明人： Kenneth Fallon , Miguel A. Jimarez , Ross W. Keesler , John M. Lauffer , Roy H. Magnuson , Voya R. Markovich , Irv Memis , Jim P. Paoletti , Marybeth Perrino , John A. Welsh , William E. Wilson
IPC分类号： H05K103
CPC分类号： H05K3/44 , H05K1/056 , H05K3/0023 , H05K3/108 , H05K3/426 , H05K3/445 , H05K2201/09554 , H05K2203/0733
摘要： A method of forming a printed circuit board or circuit card is provided with a metal layer which serves as a power plane sandwiched between a pair of photoimageable dielectric layers. Photoformed metal filled vias and photoformed plated through holes are in the photopatternable material, and signal circuitry is on the surfaces of each of the dielectric materials and connected to the vias and plated through holes. A border may be around the board or card including a metal layer terminating in from the edge of one of the dielectric layers. A copper foil is provided with clearance holes. First and second layers of photoimageable curable dielectric material is disposed on opposite sides of the copper which are photoimageable material. The patterns are developed on the first and second layers of the photoimageable material to reveal the metal layer through vias. At the clearance holes in the copper, through holes are developed where holes were patterned in both dielectric layers. Thereafter, the surfaces of the photoimageable material, vias and through holes are metalized by copper plating. This is preferably done by protecting the remainder of the circuitry with photoresist and utilizing photolithographic techniques. The photoresist is thereafter removed, leaving a circuit board or card having metalization on both sides, vias extending from both sides to the copper layer in the center, plated through holes connecting the two outer circuitized copper layers.
摘要翻译：形成印刷电路板或电路卡的方法设置有用作夹在一对可光成像的电介质层之间的电力平面的金属层。光刻图形金属填充的通孔和光成像的电镀通孔位于光图案化材料中，信号电路位于每个介电材料的表面上，并连接到通孔和电镀通孔。边界可以在板或卡周围，包括从电介质层之一的边缘终止的金属层。铜箔上设有间隙孔。可光成像的可固化介电材料的第一和第二层设置在作为可光成像的材料的铜的相对侧上。图案在可光成象材料的第一层和第二层上显影，以通过通孔显露金属层。在铜中的间隙孔处，通孔被开发成在两个电介质层中图案化孔。此后，可光成像材料，通孔和通孔的表面通过镀铜进行金属化。这优选通过用光致抗蚀剂和利用光刻技术保护电路的其余部分来实现。然后去除光致抗蚀剂，留下在两侧具有金属化的电路板或卡，其中心的两侧延伸到铜层，通孔连接两个外部电路化的铜层。

5. 发明授权

US06201194B1 Multi-voltage plane, multi-signal plane circuit card with photoimageable dielectric 有权
标题翻译：多电平面，多信号平面电路卡，带有可光成像电介质
公开(公告)号：US06201194B1
公开(公告)日：2001-03-13
申请号：US09203978
申请日：1998-12-02
申请人： John M. Lauffer , Roy H. Magnuson , Voya R. Markovich , John A. Welsh
发明人： John M. Lauffer , Roy H. Magnuson , Voya R. Markovich , John A. Welsh
IPC分类号： H01R909
CPC分类号： H05K3/429 , H01R12/523 , H05K3/0023 , H05K3/4602 , H05K3/4608 , H05K3/4641 , H05K2201/0355 , H05K2201/09309 , H05K2201/09536 , H05K2201/096 , H05K2203/0554 , Y10T29/49165
摘要： A technique for forming an organic chip carrier or circuit board, having two voltage planes and at least two signal planes is provided which includes bonding a first layer of photolithographic dielectric material to a first metal layer and exposing the first layer of dielectric material to a pattern of radiation to provide at least one opening through the first layer of the dielectric material. A second metal layer is bonded to the first layer of photoimageable material on the opposite side from the first metal layer. Holes are etched in the first and second metal layers which correspond to and are larger than each of the patterns on said openings in the first layer of dielectric material. The exposed pattern on the first layer of dielectric material is then developed, with the openings in the first and second metal layers being larger than the corresponding developed opening in the first dielectric material. Second and third layers of photoimageable dielectric material are applied on the first and second metal layers, respectively and are photopatterned and developed to provide openings in each of the second and third layers of dielectric material some of which correspond to each of the holes in the first layer of dielectric material and the holes in the first and second metal layers, some of which terminate at the underlying metal layer. The exposed surfaces of both the second and third dielectric material, are circuitized and the holes plated or filled with metal.
摘要翻译：提供了一种用于形成具有两个电压平面和至少两个信号面的有机芯片载体或电路板的技术，其包括将第一层光刻电介质材料结合到第一金属层并将第一介电材料层暴露于图案的辐射以提供通过电介质材料的第一层的至少一个开口。第二金属层在与第一金属层相对的一侧上结合到可光成像材料的第一层。在第一和第二金属层中蚀刻孔，其对应于并且大于第一介电材料层中的所述开口上的每个图案。然后显影第一层介电材料上的暴露图案，其中第一和第二金属层中的开口大于第一介电材料中对应的显影开口。将第二和第三层可光成像介电材料分别施加在第一和第二金属层上，并对其进行光刻图案化和显影以在第二和第三层介电材料中的每一个中提供开口，其中的第一和第三层对应于第一和第二金属层中的每个孔介电材料层和第一和第二金属层中的孔，其中一些终止于下面的金属层。第二和第三介电材料的暴露表面被电路化，并且孔被镀金或填充金属。

6. 发明授权

US4918574A Multilayer circuit board with reduced susceptability to shorts caused by trapped impurities 失效
标题翻译：多层电路板由于被杂质杂质引起的短路易损性降低
公开(公告)号：US4918574A
公开(公告)日：1990-04-17
申请号：US183491
申请日：1988-04-15
申请人： Joseph G. Hoffarth , Donald J. Lazzarini , John A. Welsh , John P. Wiley
发明人： Joseph G. Hoffarth , Donald J. Lazzarini , John A. Welsh , John P. Wiley
IPC分类号： H05K1/00 , H05K3/46
CPC分类号： H05K3/4626 , H05K3/4676 , H05K2201/0154 , H05K2201/0195 , H05K2203/066
摘要： A multilayer circuit board having a conformal layer of an insulating material separating a circuit core from an adjacent insulating layer is disclosed. The conformal layer encapsulates the substrate and conductive pattern of circuit lines in the circuit core, thereby reducing failures caused by impurities trapped during lamination. The multilayer circuit board is manufactured by coating at least one circuit core with the conformal layer of insulating material before final lamination of the circuit cores into a multilayer circuit board.
摘要翻译：公开了一种具有将电路芯与相邻绝缘层分离的绝缘材料的共形层的多层电路板。保形层将电路线的衬底和导电图案封装在电路芯中，从而减少在层压期间被杂质捕获的故障。多层电路板通过在将电路芯最终层压成多层电路板之前，用绝缘材料的保形层涂覆至少一个电路芯。

7. 发明授权

US4810326A Interlaminate adhesion between polymeric materials and electrolytic copper surfaces 失效
标题翻译：聚合材料与电解铜表面之间的层间粘合
公开(公告)号：US4810326A
公开(公告)日：1989-03-07
申请号：US91549
申请日：1987-08-31
申请人： Suryadevara V. Babu , Vu Q. Bui , Joseph G. Hoffarth , John A. Welsh
发明人： Suryadevara V. Babu , Vu Q. Bui , Joseph G. Hoffarth , John A. Welsh
IPC分类号： B29C65/48 , B32B15/08 , C08J5/12 , C09J5/02 , C23C8/36 , H05K3/38 , H05K3/46 , B32B31/28 , C25D1/00
CPC分类号： H05K3/382 , H05K2203/095 , H05K3/4611
摘要： A method for improving the adhesion of a polymer such as an epoxy resin to an electrolytic copper surface wherein the copper surface to be adhered is exposed to gas plasma containing a fluorohydrocarbon.

8. 发明授权

US4431685A Decreasing plated metal defects 失效
标题翻译：减少电镀金属缺陷
公开(公告)号：US4431685A
公开(公告)日：1984-02-14
申请号：US394588
申请日：1982-07-02
申请人： Michael J. Canestaro , Donald G. McBride , John A. Welsh
发明人： Michael J. Canestaro , Donald G. McBride , John A. Welsh
IPC分类号： C23C18/18 , C23C18/16 , C23C18/38 , C23C18/42 , C25D5/02 , G03F7/11 , H01L21/70 , H05K3/10 , H05K3/24 , H05K3/38 , G03C5/00
CPC分类号： H05K3/244 , C23C18/1605 , C23C18/1651 , C23C18/54 , G03F7/11 , H01L21/707 , H05K3/384 , H05K2201/0347 , H05K2203/072 , H05K3/108 , H05K3/382
摘要： A method of decreasing plated metal defects by applying a layer of a noble metal such as palladium, platinum, gold, iridium, rhodium, or mixtures thereof between a photoresist and a metallic surface.
摘要翻译：一种通过在光致抗蚀剂和金属表面之间施加一层贵金属如钯，铂，金，铱，铑或其混合物来减少电镀金属缺陷的方法。

9. 发明授权

US06453549B1 Method of filling plated through holes 有权
标题翻译：填充电镀孔的方法
公开(公告)号：US06453549B1
公开(公告)日：2002-09-24
申请号：US09460278
申请日：1999-12-13
申请人： Anilkumar C. Bhatt , David E. Houser , John A. Welsh
发明人： Anilkumar C. Bhatt , David E. Houser , John A. Welsh
IPC分类号： H05K330
CPC分类号： H05K3/4046 , H05K3/427 , H05K2201/0347 , H05K2201/10416 , Y10T29/49139 , Y10T29/49144 , Y10T29/49155
摘要： A method for conductively filling a hole or via disposed in an electronic package to provide a structure having a lower coefficient of thermal expansion. After fabricating a through hole or a plated through hole in an electronic package, the hole or via is filled with metal, and the surface of the electronic package is sealed.
摘要翻译：用于导电地填充电子封装中的孔或通孔的方法，以提供具有较低热膨胀系数的结构。在电子封装中制造通孔或电镀通孔之后，孔或通孔被金属填充，电子封装的表面被密封。

10. 发明授权

US06432182B1 Treatment solution for reducing adhesive resin bleed 有权
标题翻译：用于减少粘合剂树脂流失的处理溶液
公开(公告)号：US06432182B1
公开(公告)日：2002-08-13
申请号：US09588459
申请日：2000-06-06
申请人： John Joseph Konrad , Konstantinos I. Papathomas , John A. Welsh
发明人： John Joseph Konrad , Konstantinos I. Papathomas , John A. Welsh
IPC分类号： C09D538
CPC分类号： H05K3/282 , H01L23/49894 , H01L2924/0002 , H01L2924/12044 , H05K3/28 , H05K3/305 , Y10S428/901 , Y10T428/12889 , Y10T428/265 , H01L2924/00
摘要： In accordance with the present invention, a method of treating the surface of an organic substrate, particularly a circuitized surface of an organic substrate, which method reduces the spread of adhesive resin that is subsequently deposited on the surface, is provided. This method comprises the steps of applying a treatment solution comprising a fatty acid compound, an alkalizing agent, and a solvent comprising water and from about 5% to about 90% by volume of an organic solvent selected from the group consisting of an alcohol, a glycol ether, and combinations thereof to the surface; and then removing substantially all of the solvent from the solution to provide a thin film on the surface of said substrate. The film comprises the fatty acids that were present in the treatment solution. In a preferred embodiment the treatment solution further comprises a chelating agent. The present invention also relates to a treatment solution for reducing adhesive resin bleed on the surface of a circuitized organic substrate. The present invention also relates to a circuitized organic substrate that is resistant to resin bleed. Such substrate has a film comprising a fatty acid compound disposed on the circuitized surface thereto.
摘要翻译：根据本发明，提供了一种处理有机基板的表面，特别是有机基板的电路化表面的方法，该方法减少随后沉积在表面上的粘合剂树脂的扩散。该方法包括以下步骤：施加包含脂肪酸化合物，碱化剂和包含水的溶剂和约5体积％至约90体积％的选自以下的有机溶剂的处理溶液：醇，乙二醇醚及其组合; 然后从溶液中基本上除去所有溶剂，以在所述基材的表面上提供薄膜。该膜包含存在于处理溶液中的脂肪酸。在优选的实施方案中，处理溶液还包含螯合剂。本发明还涉及一种用于在电路化的有机基底的表面上减少粘合剂树脂渗出的处理溶液。本发明还涉及耐树脂流出的电路化有机基材。这种基材具有包含设置在其电路化表面上的脂肪酸化合物的膜。

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